Searched refs:v1 (Results 26 - 40 of 40) sorted by relevance

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/art/compiler/optimizing/
H A Dinduction_var_range.h164 Value MulRangeAndConstant(Value v1, Value v2, Value c, bool is_min) const;
165 Value DivRangeAndConstant(Value v1, Value v2, Value c, bool is_min) const;
167 Value AddValue(Value v1, Value v2) const;
168 Value SubValue(Value v1, Value v2) const;
169 Value MulValue(Value v1, Value v2) const;
170 Value DivValue(Value v1, Value v2) const;
171 Value MergeVal(Value v1, Value v2, bool is_min) const;
H A Dinduction_var_range_test.cc44 void ExpectEqual(Value v1, Value v2) { argument
45 EXPECT_EQ(v1.instruction, v2.instruction);
46 EXPECT_EQ(v1.a_constant, v2.a_constant);
47 EXPECT_EQ(v1.b_constant, v2.b_constant);
48 EXPECT_EQ(v1.is_known, v2.is_known);
233 Value AddValue(Value v1, Value v2) { return range_.AddValue(v1, v2); } argument
234 Value SubValue(Value v1, Value v2) { return range_.SubValue(v1, v2); } argument
235 Value MulValue(Value v1, Valu argument
236 DivValue(Value v1, Value v2) argument
237 MinValue(Value v1, Value v2) argument
238 MaxValue(Value v1, Value v2) argument
569 Value v1, v2; local
596 Value v1, v2; local
623 Value v1, v2; local
693 Value v1, v2; local
700 ExpectEqual(Value(), v1); local
707 ExpectEqual(Value(x_, 1, 1), v1); local
712 ExpectEqual(Value(x_, 1, 0), v1); local
[all...]
H A Dbounds_check_elimination.cc1289 InductionVarRange::Value v1; local
1292 if (induction_range_.GetInductionRange(context, index, &v1, &v2, &needs_finite_test)) {
1294 if (v1.is_known && (v1.a_constant == 0 || v1.a_constant == 1) &&
1296 DCHECK(v1.a_constant == 1 || v1.instruction == nullptr);
1299 ValueBound(v1.instruction, v1.b_constant),
1312 } while (induction_range_.RefineOuter(&v1,
[all...]
/art/runtime/interpreter/mterp/mips/
H A Dop_shr_long.S19 sra v1, a1, a2 # rhi<- ahi >> (shift&31)
26 SET_VREG64_GOTO(v0, v1, t3, t0) # vAA/VAA+1 <- v0/v0
31 SET_VREG64_GOTO(v1, a3, t3, t0) # vAA/VAA+1 <- rlo/rhi
H A Dfooter.S172 sw v1, 4(a2)
H A Dheader.S72 #define rRESULT1 v1
78 #define v1 $$3 define
/art/test/425-invoke-super/smali/
H A Dinvokesuper.smali30 invoke-super {v1}, LInvokeSuper;->returnInt()I
/art/test/551-invoke-super/smali/
H A Dinvokesuper.smali30 invoke-super {v1}, LInvokeSuper;->returnInt()I
/art/test/552-invoke-non-existent-super/smali/
H A Dinvokesuper.smali30 invoke-super {v1}, LInvokeSuper;->returnInt()I
/art/test/553-invoke-super/smali/
H A Dinvokesuper.smali30 invoke-super {v1}, LInvokeSuper;->$noinline$returnInt()I
/art/test/591-new-instance-string/smali/
H A Dnew-instance.smali22 if-eqz v1, :Skip
/art/runtime/arch/mips64/
H A Dquick_entrypoints_mips64.S31 * This macro modifies v1 and t8.
34 move $v1, $ra
39 move $ra, $v1
425 dsrl $v1, $v0, 32 # put high half of result in v1
428 mfhc1 $v1, $f0 # put high half of FP result in v1
431 sw $v1, 4($a3) # store high half of result
536 ld $v1, 24($a0)
565 move $v0, $zero # clear result registers v0 and v1
[all...]
/art/runtime/interpreter/mterp/out/
H A Dmterp_mips.S79 #define rRESULT1 v1
85 #define v1 $3 define
812 move v1, zero
835 move v1, zero
856 LOAD64(v0, v1, a2) # v0/v1 <- vAA/vAA+1
880 move v1, zero
2819 SET_VREG64(v0, v1, a2) # fp[A] <- v0/v1
3200 SET_VREG64(v0, v1, a
[all...]
/art/runtime/arch/mips/
H A Dquick_entrypoints_mips.S389 sw $v1, 4($a2) # store v0/v1 into result
454 lw $v1, 12($a0)
481 move $v0, $zero # clear result registers v0 and v1 (in branch delay slot)
483 move $v1, $zero
559 * The helper will attempt to locate the target and return a 64-bit result in $v0/$v1 consisting
560 * of the target Method* in $v0 and method->code_ in $v1.
578 move $t9, $v1 # save $v0->code_
744 sw $v1, 4($t0) # store the other half of the result
872 sw $v1,
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/art/test/083-compiler-regressions/src/
H A DMain.java991 int v1 = B16177324Values.values[0]; // Null-check on array element access.
995 System.out.println("Unexpectedly retrieved all values: " + v1 + ", " + v2 + ", " + v3);

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