Searched refs:R13 (Results 1 - 8 of 8) sorted by relevance

/art/runtime/arch/x86_64/
H A Dregisters_x86_64.h43 R13 = 13, enumerator in enum:art::x86_64::Register
H A Dquick_method_frame_info_x86_64.h30 (1 << art::x86_64::R13) | (1 << art::x86_64::R14) | (1 << art::x86_64::R15);
/art/runtime/arch/arm/
H A Dregisters_arm.h40 R13 = 13, enumerator in enum:art::arm::Register
/art/compiler/jni/quick/x86_64/
H A Dcalling_convention_x86_64.cc131 callee_save_regs_.push_back(X86_64ManagedRegister::FromCpuRegister(R13));
141 return 1 << RBX | 1 << RBP | 1 << R12 | 1 << R13 | 1 << R14 | 1 << R15 |
/art/compiler/utils/x86_64/
H A Dassembler_x86_64_test.cc158 registers_.push_back(new x86_64::CpuRegister(x86_64::R13));
175 secondary_register_names_.emplace(x86_64::CpuRegister(x86_64::R13), "r13d");
192 tertiary_register_names_.emplace(x86_64::CpuRegister(x86_64::R13), "r13w");
209 quaternary_register_names_.emplace(x86_64::CpuRegister(x86_64::R13), "r13b");
697 x86_64::CpuRegister(x86_64::R13), 0), x86_64::CpuRegister(x86_64::RSI));
699 x86_64::CpuRegister(x86_64::R13), x86_64::CpuRegister(x86_64::R9), x86_64::TIMES_1, 0),
705 "lock cmpxchgl %ESI, (%R13)\n"
706 "lock cmpxchgl %ESI, (%R13,%R9,1)\n";
722 x86_64::CpuRegister(x86_64::R13), 0), x86_64::CpuRegister(x86_64::RSI));
724 x86_64::CpuRegister(x86_64::R13), x86_6
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/art/compiler/utils/arm/
H A Dassembler_arm32_test.cc76 new arm::Register(arm::R13),
96 new arm::Register(arm::R13),
158 shifter_operands_.push_back(arm::ShifterOperand(arm::R13));
166 shifter_operands_.push_back(arm::ShifterOperand(arm::R13));
H A Dassembler_thumb2_test.cc62 new arm::Register(arm::R13),
330 // force us to use SP (i.e. R13) as second source register, which
333 // UNPREDICTABLE when of the source registers is R13).
/art/compiler/optimizing/
H A Dcode_generator_x86_64.cc49 static constexpr Register kCoreCalleeSaves[] = { RBX, RBP, R12, R13, R14, R15 };

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