Searched refs:R13 (Results 1 - 8 of 8) sorted by relevance
/art/runtime/arch/x86_64/ |
H A D | registers_x86_64.h | 43 R13 = 13, enumerator in enum:art::x86_64::Register
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H A D | quick_method_frame_info_x86_64.h | 30 (1 << art::x86_64::R13) | (1 << art::x86_64::R14) | (1 << art::x86_64::R15);
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/art/runtime/arch/arm/ |
H A D | registers_arm.h | 40 R13 = 13, enumerator in enum:art::arm::Register
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/art/compiler/jni/quick/x86_64/ |
H A D | calling_convention_x86_64.cc | 131 callee_save_regs_.push_back(X86_64ManagedRegister::FromCpuRegister(R13)); 141 return 1 << RBX | 1 << RBP | 1 << R12 | 1 << R13 | 1 << R14 | 1 << R15 |
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/art/compiler/utils/x86_64/ |
H A D | assembler_x86_64_test.cc | 158 registers_.push_back(new x86_64::CpuRegister(x86_64::R13)); 175 secondary_register_names_.emplace(x86_64::CpuRegister(x86_64::R13), "r13d"); 192 tertiary_register_names_.emplace(x86_64::CpuRegister(x86_64::R13), "r13w"); 209 quaternary_register_names_.emplace(x86_64::CpuRegister(x86_64::R13), "r13b"); 697 x86_64::CpuRegister(x86_64::R13), 0), x86_64::CpuRegister(x86_64::RSI)); 699 x86_64::CpuRegister(x86_64::R13), x86_64::CpuRegister(x86_64::R9), x86_64::TIMES_1, 0), 705 "lock cmpxchgl %ESI, (%R13)\n" 706 "lock cmpxchgl %ESI, (%R13,%R9,1)\n"; 722 x86_64::CpuRegister(x86_64::R13), 0), x86_64::CpuRegister(x86_64::RSI)); 724 x86_64::CpuRegister(x86_64::R13), x86_6 [all...] |
/art/compiler/utils/arm/ |
H A D | assembler_arm32_test.cc | 76 new arm::Register(arm::R13), 96 new arm::Register(arm::R13), 158 shifter_operands_.push_back(arm::ShifterOperand(arm::R13)); 166 shifter_operands_.push_back(arm::ShifterOperand(arm::R13));
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H A D | assembler_thumb2_test.cc | 62 new arm::Register(arm::R13), 330 // force us to use SP (i.e. R13) as second source register, which 333 // UNPREDICTABLE when of the source registers is R13).
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/art/compiler/optimizing/ |
H A D | code_generator_x86_64.cc | 49 static constexpr Register kCoreCalleeSaves[] = { RBX, RBP, R12, R13, R14, R15 };
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