Searched refs:R7 (Results 1 - 8 of 8) sorted by relevance

/art/runtime/arch/arm/
H A Dregisters_arm.h34 R7 = 7, enumerator in enum:art::arm::Register
H A Dquick_method_frame_info_arm.h31 (1 << art::arm::R5) | (1 << art::arm::R6) | (1 << art::arm::R7) | (1 << art::arm::R8) |
/art/compiler/utils/arm/
H A Dmanaged_register_arm_test.cc284 EXPECT_EQ(R7, reg.AsRegisterPairHigh());
462 EXPECT_TRUE(!reg.Overlaps(ArmManagedRegister::FromCoreRegister(R7)));
484 EXPECT_TRUE(!reg.Overlaps(ArmManagedRegister::FromCoreRegister(R7)));
503 reg = ArmManagedRegister::FromCoreRegister(R7);
506 EXPECT_TRUE(reg.Overlaps(ArmManagedRegister::FromCoreRegister(R7)));
528 EXPECT_TRUE(!reg.Overlaps(ArmManagedRegister::FromCoreRegister(R7)));
550 EXPECT_TRUE(!reg.Overlaps(ArmManagedRegister::FromCoreRegister(R7)));
572 EXPECT_TRUE(!reg.Overlaps(ArmManagedRegister::FromCoreRegister(R7)));
594 EXPECT_TRUE(!reg.Overlaps(ArmManagedRegister::FromCoreRegister(R7)));
616 EXPECT_TRUE(!reg.Overlaps(ArmManagedRegister::FromCoreRegister(R7)));
[all...]
H A Dassembler_thumb2_test.cc56 new arm::Register(arm::R7),
186 __ ldrexd(arm::R5, arm::R3, arm::R7);
200 __ strexd(arm::R9, arm::R5, arm::R3, arm::R7);
H A Dassembler_arm32_test.cc90 new arm::Register(arm::R7),
152 shifter_operands_.push_back(arm::ShifterOperand(arm::R7));
/art/compiler/jni/quick/arm/
H A Dcalling_convention_arm.cc229 callee_save_regs_.push_back(ArmManagedRegister::FromCoreRegister(R7));
242 result = 1 << R5 | 1 << R6 | 1 << R7 | 1 << R8 | 1 << R10 | 1 << R11 | 1 << LR;
/art/compiler/optimizing/
H A Dcodegen_test.cc71 AddAllocatedRegister(Location::RegisterLocation(arm::R7));
78 blocked_core_registers_[arm::R7] = false;
79 // Makes pair R6-R7 available.
H A Dcode_generator_arm.cc52 { R5, R6, R7, R8, R10, R11, LR };

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