Searched refs:Restore (Results 1 - 15 of 15) sorted by relevance
/art/runtime/arch/mips64/ |
H A D | jni_entrypoints_mips64.S | 49 .cpreturn # Restore gp from t8 in branch delay slot. gp is not used
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H A D | quick_entrypoints_mips64.S | 144 ld $t8, 56($sp) # Restore gp back to it's temp storage. 168 ld $t8, 56($sp) # Restore gp back to it's temp storage. 272 ld $t8, 184($sp) # Restore gp back to it's temp storage. 412 // Restore return value address and shorty address 433 // Restore callee registers 440 ld $t8, 80($sp) # Restore gp back to it's temp storage. 1018 .cpreturn # Restore gp from t8 in branch delay slot. 1040 * Restore rReg's value from offset($sp) if rReg is not the same as rExclude. 1081 .cpreturn # Restore gp from t8 in branch delay slot. 1149 .cpreturn # Restore g [all...] |
/art/compiler/debug/dwarf/ |
H A D | dwarf_test.cc | 95 opcodes.Restore(Reg(0x3F)); 97 opcodes.Restore(Reg(0x40)); 99 opcodes.Restore(reg);
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H A D | debug_frame_opcode_writer.h | 106 Restore(Reg(reg_base.num() + i)); 139 void ALWAYS_INLINE Restore(Reg reg) { function in class:art::dwarf::DebugFrameOpCodeWriter
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/art/compiler/utils/arm64/ |
H A D | assembler_arm64.cc | 674 cfi_.Restore(DWARFReg(dst0)); 675 cfi_.Restore(DWARFReg(dst1)); 681 cfi_.Restore(DWARFReg(dst0)); 769 // Restore callee-saves.
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/art/runtime/arch/arm/ |
H A D | quick_entrypoints_arm.S | 491 ldr r10, [sp, #8] @ Restore JValue* result 492 ldr sp, [sp, #4] @ Restore saved stack pointer 686 // Restore rReg's value from [sp, #offset] if rReg is not the same as rExclude. 1379 // Restore self pointer.
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/art/runtime/arch/mips/ |
H A D | quick_entrypoints_mips.S | 378 lw $a2, 8($sp) # Restore JValue* result 379 lw $sp, 4($sp) # Restore saved stack pointer 979 * Restore rReg's value from offset($sp) if rReg is not the same as rExclude.
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/art/compiler/utils/mips/ |
H A D | assembler_mips.cc | 2495 cfi_.Restore(DWARFReg(reg)); 2499 cfi_.Restore(DWARFReg(RA));
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/art/compiler/utils/mips64/ |
H A D | assembler_mips64.cc | 2035 cfi_.Restore(DWARFReg(reg)); 2039 cfi_.Restore(DWARFReg(RA));
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/art/compiler/utils/x86_64/ |
H A D | assembler_x86_64.cc | 2712 cfi_.Restore(DWARFReg(spill.AsXmmRegister().AsFloatRegister())); 2725 cfi_.Restore(DWARFReg(spill.AsCpuRegister().AsRegister()));
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/art/compiler/optimizing/ |
H A D | code_generator_mips64.cc | 590 // Restore callee-saved registers. 603 __ cfi().Restore(DWARFReg(reg)); 612 __ cfi().Restore(DWARFReg(reg));
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H A D | code_generator_x86_64.cc | 1097 __ cfi().Restore(DWARFReg(kFpuCalleeSaves[i])); 1110 __ cfi().Restore(DWARFReg(reg));
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H A D | code_generator_mips.cc | 753 // Restore callee-saved registers. 779 // TODO: __ cfi().Restore(DWARFReg(reg)); 788 __ cfi().Restore(DWARFReg(reg));
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H A D | code_generator_x86.cc | 885 __ cfi().Restore(DWARFReg(reg));
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/art/compiler/utils/x86/ |
H A D | assembler_x86.cc | 1980 cfi_.Restore(DWARFReg(spill));
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