Searched refs:Restore (Results 1 - 15 of 15) sorted by relevance

/art/runtime/arch/mips64/
H A Djni_entrypoints_mips64.S49 .cpreturn # Restore gp from t8 in branch delay slot. gp is not used
H A Dquick_entrypoints_mips64.S144 ld $t8, 56($sp) # Restore gp back to it's temp storage.
168 ld $t8, 56($sp) # Restore gp back to it's temp storage.
272 ld $t8, 184($sp) # Restore gp back to it's temp storage.
412 // Restore return value address and shorty address
433 // Restore callee registers
440 ld $t8, 80($sp) # Restore gp back to it's temp storage.
1018 .cpreturn # Restore gp from t8 in branch delay slot.
1040 * Restore rReg's value from offset($sp) if rReg is not the same as rExclude.
1081 .cpreturn # Restore gp from t8 in branch delay slot.
1149 .cpreturn # Restore g
[all...]
/art/compiler/debug/dwarf/
H A Ddwarf_test.cc95 opcodes.Restore(Reg(0x3F));
97 opcodes.Restore(Reg(0x40));
99 opcodes.Restore(reg);
H A Ddebug_frame_opcode_writer.h106 Restore(Reg(reg_base.num() + i));
139 void ALWAYS_INLINE Restore(Reg reg) { function in class:art::dwarf::DebugFrameOpCodeWriter
/art/compiler/utils/arm64/
H A Dassembler_arm64.cc674 cfi_.Restore(DWARFReg(dst0));
675 cfi_.Restore(DWARFReg(dst1));
681 cfi_.Restore(DWARFReg(dst0));
769 // Restore callee-saves.
/art/runtime/arch/arm/
H A Dquick_entrypoints_arm.S491 ldr r10, [sp, #8] @ Restore JValue* result
492 ldr sp, [sp, #4] @ Restore saved stack pointer
686 // Restore rReg's value from [sp, #offset] if rReg is not the same as rExclude.
1379 // Restore self pointer.
/art/runtime/arch/mips/
H A Dquick_entrypoints_mips.S378 lw $a2, 8($sp) # Restore JValue* result
379 lw $sp, 4($sp) # Restore saved stack pointer
979 * Restore rReg's value from offset($sp) if rReg is not the same as rExclude.
/art/compiler/utils/mips/
H A Dassembler_mips.cc2495 cfi_.Restore(DWARFReg(reg));
2499 cfi_.Restore(DWARFReg(RA));
/art/compiler/utils/mips64/
H A Dassembler_mips64.cc2035 cfi_.Restore(DWARFReg(reg));
2039 cfi_.Restore(DWARFReg(RA));
/art/compiler/utils/x86_64/
H A Dassembler_x86_64.cc2712 cfi_.Restore(DWARFReg(spill.AsXmmRegister().AsFloatRegister()));
2725 cfi_.Restore(DWARFReg(spill.AsCpuRegister().AsRegister()));
/art/compiler/optimizing/
H A Dcode_generator_mips64.cc590 // Restore callee-saved registers.
603 __ cfi().Restore(DWARFReg(reg));
612 __ cfi().Restore(DWARFReg(reg));
H A Dcode_generator_x86_64.cc1097 __ cfi().Restore(DWARFReg(kFpuCalleeSaves[i]));
1110 __ cfi().Restore(DWARFReg(reg));
H A Dcode_generator_mips.cc753 // Restore callee-saved registers.
779 // TODO: __ cfi().Restore(DWARFReg(reg));
788 __ cfi().Restore(DWARFReg(reg));
H A Dcode_generator_x86.cc885 __ cfi().Restore(DWARFReg(reg));
/art/compiler/utils/x86/
H A Dassembler_x86.cc1980 cfi_.Restore(DWARFReg(spill));

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