/art/compiler/utils/arm/ |
H A D | assembler_thumb2.cc | 99 buffer_.Store<int16_t>(fixup_location, 0); 134 buffer_.Store<int16_t>(dependent->GetLocation(), 1); 162 buffer_.Store<int16_t>(fixup->GetLocation(), 0); 2129 buffer->Store<int16_t>(location_, encoding); 2144 buffer->Store<int16_t>(location_, encoding >> 16); 2145 buffer->Store<int16_t>(location_ + 2u, static_cast<int16_t>(encoding & 0xffff)); 2152 buffer->Store<int16_t>(location_, encoding); 2160 buffer->Store<int16_t>(location_, cmp_encoding); 2161 buffer->Store<int16_t>(location_ + 2, b_encoding); 2169 buffer->Store<int16_ [all...] |
H A D | assembler_arm.cc | 489 void ArmAssembler::Store(FrameOffset dest, ManagedRegister msrc, size_t size) {
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H A D | assembler_arm.h | 736 // Load and Store. May clobber IP. 921 // Store routines 922 void Store(FrameOffset offs, ManagedRegister src, size_t size) OVERRIDE;
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H A D | assembler_arm32.cc | 1336 buffer_.Store<int32_t>(position, encoded);
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/art/runtime/ |
H A D | stack_map.h | 188 * Store information on unique Dex register locations used in a method. 231 // art::MemoryRegion::Store to prevent unligned word accesses on ARM. 695 ALWAYS_INLINE void Store(MemoryRegion region, int32_t value) const { function in struct:art::DexRegisterLocation::FieldEncoding 803 encoding.GetDexPcEncoding().Store(region_, dex_pc); 811 encoding.GetNativePcEncoding().Store(region_, native_pc_offset); 819 encoding.GetDexRegisterMapEncoding().Store(region_, offset); 827 encoding.GetInlineInfoEncoding().Store(region_, offset); 835 encoding.GetRegisterMaskEncoding().Store(region_, mask); 964 encoding.GetMethodIndexEncoding().Store(GetRegionAtDepth(encoding, depth), index); 975 encoding.GetDexPcEncoding().Store(GetRegionAtDept [all...] |
H A D | memory_region.h | 61 // Store `value` (of type `T`) at `offset`. The memory address 65 ALWAYS_INLINE void Store(uintptr_t offset, T value) const { function in class:art::FINAL 86 // Store `value` (of type `T`) at `offset`. The memory address 136 // Store `value` on `length` bits in the region starting at bit offset
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/art/compiler/jni/quick/ |
H A D | jni_compiler.cc | 292 __ Store(saved_cookie_offset, main_jni_conv->IntReturnRegister(), 4); 393 __ Store(return_save_location, main_jni_conv->ReturnRegister(), main_jni_conv->SizeOfReturnValue()); 582 __ Store(out_off, in_reg, param_size);
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/art/compiler/utils/ |
H A D | assembler.h | 109 template<typename T> void Store(size_t position, T value) { function in class:art::AssemblerBuffer 387 // Store routines 388 virtual void Store(FrameOffset offs, ManagedRegister src, size_t size) = 0;
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/art/compiler/utils/arm64/ |
H A D | assembler_arm64.h | 123 // Store routines. 124 void Store(FrameOffset offs, ManagedRegister src, size_t size) OVERRIDE;
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H A D | assembler_arm64.cc | 127 void Arm64Assembler::Store(FrameOffset offs, ManagedRegister m_src, size_t size) { function in class:art::arm64::Arm64Assembler
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/art/compiler/utils/x86/ |
H A D | assembler_x86.cc | 1794 buffer_.Store<int32_t>(position, bound - (position + 4)); 1809 buffer_.Store<int8_t>(position, offset); 2000 void X86Assembler::Store(FrameOffset offs, ManagedRegister msrc, size_t size) { function in class:art::x86::X86Assembler 2214 Store(fr_offs, scratch, 4); 2232 Store(dest, scratch, 4); 2234 Store(FrameOffset(dest.Int32Value() + 4), scratch, 4); 2237 Store(dest, scratch, size); 2324 Store(out_off, scratch, 4);
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H A D | assembler_x86.h | 646 // Store routines 647 void Store(FrameOffset offs, ManagedRegister src, size_t size) OVERRIDE;
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/art/compiler/utils/x86_64/ |
H A D | assembler_x86_64.cc | 2355 buffer_.Store<int32_t>(position, bound - (position + 4)); 2370 buffer_.Store<int8_t>(position, offset); 2746 void X86_64Assembler::Store(FrameOffset offs, ManagedRegister msrc, size_t size) { function in class:art::x86_64::X86_64Assembler 2967 Store(fr_offs, scratch, 8); 2984 Store(dest, scratch, 4); 2986 Store(FrameOffset(dest.Int32Value() + 4), scratch, 4); 2989 Store(dest, scratch, size); 3082 Store(out_off, scratch, 8);
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H A D | assembler_x86_64.h | 717 // Store routines 718 void Store(FrameOffset offs, ManagedRegister src, size_t size) OVERRIDE;
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/art/runtime/arch/arm/ |
H A D | quick_entrypoints_arm.S | 178 str r0, [sp, #0] @ Store ArtMethod* to bottom of stack. 484 str ip, [sp] @ Store null for ArtMethod* at bottom of frame 499 strd r0, [r10] @ Store r0/r1 into result pointer 502 vstr d0, [r10] @ Store s0-s1/d0 into result pointer 507 str lr, [sp, r10] @ Store link register per the compiler ABI 1055 // Store the class pointer in the 1149 str r1, [r9, #THREAD_LOCAL_POS_OFFSET] // Store new thread_local_pos. 1154 str r2, [r0, #MIRROR_OBJECT_CLASS_OFFSET] // Store the class pointer.
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/art/compiler/optimizing/ |
H A D | code_generator_arm64.h | 434 void Store(Primitive::Type type, vixl::CPURegister src, const vixl::MemOperand& dst);
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H A D | code_generator_arm64.cc | 1386 void CodeGeneratorARM64::Store(Primitive::Type type, function in class:art::arm64::CodeGeneratorARM64 1712 codegen_->Store(field_type, source, HeapOperand(obj, offset)); 2191 codegen_->Store(value_type, value, destination);
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H A D | intrinsics_arm64.cc | 931 codegen->Store(type, source, mem_op); 1264 // Store offset of string value in preparation for comparison loop
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/art/runtime/arch/mips/ |
H A D | quick_entrypoints_mips.S | 368 sw $zero, 0($sp) # Store null for ArtMethod* at bottom of frame 423 sw $ra, 0($t0) # Store RA per the compiler ABI 1561 # Store the class pointer in the header. This also overwrites the first pointer. The offsets are
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/art/runtime/arch/mips64/ |
H A D | quick_entrypoints_mips64.S | 409 sd $zero, 0($sp) # Store null for ArtMethod* at bottom of frame 465 sw $ra, 0($t0) # Store low half of RA per compiler ABI 467 sw $t1, 4($t0) # Store high half of RA per compiler ABI 1586 # Store the class pointer in the header. This also overwrites the first pointer. The offsets are
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/art/compiler/utils/mips/ |
H A D | assembler_mips.h | 427 // Store routines. 428 void Store(FrameOffset offs, ManagedRegister msrc, size_t size) OVERRIDE;
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H A D | assembler_mips.cc | 116 buffer_.Store<uint32_t>(overwrite_location_, value); 1865 // Store the previously unknown target addresses in them. 2531 void MipsAssembler::Store(FrameOffset dest, ManagedRegister msrc, size_t size) { function in class:art::mips::MipsAssembler
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/art/compiler/utils/mips64/ |
H A D | assembler_mips64.h | 379 // Store routines. 380 void Store(FrameOffset offs, ManagedRegister msrc, size_t size) OVERRIDE;
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H A D | assembler_mips64.cc | 82 buffer_.Store<uint32_t>(overwrite_location_, value); 1530 // Store the previously unknown target addresses in them. 2067 void Mips64Assembler::Store(FrameOffset dest, ManagedRegister msrc, size_t size) { function in class:art::mips64::Mips64Assembler 2078 UNIMPLEMENTED(FATAL) << "We only support Store() of size 4 and 8"; 2087 UNIMPLEMENTED(FATAL) << "We only support Store() of size 4 and 8";
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