Searched refs:os (Results 1 - 25 of 229) sorted by relevance

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/art/compiler/linker/
H A Doutput_stream.cc21 std::ostream& operator<<(std::ostream& os, const Whence& rhs) { argument
23 case kSeekSet: os << "SEEK_SET"; break;
24 case kSeekCurrent: os << "SEEK_CUR"; break;
25 case kSeekEnd: os << "SEEK_END"; break;
28 return os;
/art/runtime/arch/arm64/
H A Dregisters_arm64.cc38 std::ostream& operator<<(std::ostream& os, const XRegister& rhs) { argument
40 os << kRegisterNames[rhs];
42 os << "XRegister[" << static_cast<int>(rhs) << "]";
44 return os;
47 std::ostream& operator<<(std::ostream& os, const WRegister& rhs) { argument
49 os << kWRegisterNames[rhs];
51 os << "WRegister[" << static_cast<int>(rhs) << "]";
53 return os;
56 std::ostream& operator<<(std::ostream& os, const DRegister& rhs) { argument
58 os << "
65 operator <<(std::ostream& os, const SRegister& rhs) argument
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/art/runtime/arch/arm/
H A Dregisters_arm.cc28 std::ostream& operator<<(std::ostream& os, const Register& rhs) { argument
30 os << kRegisterNames[rhs];
32 os << "Register[" << static_cast<int>(rhs) << "]";
34 return os;
37 std::ostream& operator<<(std::ostream& os, const SRegister& rhs) { argument
39 os << "s" << static_cast<int>(rhs);
41 os << "SRegister[" << static_cast<int>(rhs) << "]";
43 return os;
/art/runtime/arch/mips/
H A Dregisters_mips.cc30 std::ostream& operator<<(std::ostream& os, const Register& rhs) { argument
32 os << kRegisterNames[rhs];
34 os << "Register[" << static_cast<int>(rhs) << "]";
36 return os;
39 std::ostream& operator<<(std::ostream& os, const FRegister& rhs) { argument
41 os << "f" << static_cast<int>(rhs);
43 os << "FRegister[" << static_cast<int>(rhs) << "]";
45 return os;
/art/runtime/arch/mips64/
H A Dregisters_mips64.cc31 std::ostream& operator<<(std::ostream& os, const GpuRegister& rhs) { argument
33 os << kRegisterNames[rhs];
35 os << "GpuRegister[" << static_cast<int>(rhs) << "]";
37 return os;
40 std::ostream& operator<<(std::ostream& os, const FpuRegister& rhs) { argument
42 os << "f" << static_cast<int>(rhs);
44 os << "FpuRegister[" << static_cast<int>(rhs) << "]";
46 return os;
/art/runtime/arch/x86_64/
H A Dregisters_x86_64.cc28 std::ostream& operator<<(std::ostream& os, const Register& rhs) { argument
30 os << kRegisterNames[rhs];
32 os << "Register[" << static_cast<int>(rhs) << "]";
34 return os;
37 std::ostream& operator<<(std::ostream& os, const FloatRegister& rhs) { argument
39 os << "xmm" << static_cast<int>(rhs);
41 os << "Register[" << static_cast<int>(rhs) << "]";
43 return os;
/art/compiler/utils/mips64/
H A Dmanaged_register_mips64.cc32 void Mips64ManagedRegister::Print(std::ostream& os) const {
34 os << "No Register";
36 os << "GPU: " << static_cast<int>(AsGpuRegister());
38 os << "FpuRegister: " << static_cast<int>(AsFpuRegister());
40 os << "??: " << RegId();
44 std::ostream& operator<<(std::ostream& os, const Mips64ManagedRegister& reg) { argument
45 reg.Print(os);
46 return os;
/art/runtime/
H A Doffsets.cc23 std::ostream& operator<<(std::ostream& os, const Offset& offs) { argument
24 return os << offs.Int32Value();
H A Druntime_linux.cc44 void Dump(std::ostream& os) const {
45 DumpNativeStack(os, GetTid(), nullptr, "\t", nullptr, raw_context_);
55 void Dump(std::ostream& os) const {
60 os << info.sysname << " " << info.release << " (" << info.machine << ")";
156 void Dump(std::ostream& os) const {
159 DumpRegister32(os, "eax", context->__ss.__eax);
160 DumpRegister32(os, "ebx", context->__ss.__ebx);
161 DumpRegister32(os, "ecx", context->__ss.__ecx);
162 DumpRegister32(os, "edx", context->__ss.__edx);
163 os << '\
250 DumpRegister32(std::ostream& os, const char* name, uint32_t value) const argument
254 DumpRegister64(std::ostream& os, const char* name, uint64_t value) const argument
258 DumpX86Flags(std::ostream& os, uint32_t flags) const argument
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H A Dprimitive.cc39 std::ostream& operator<<(std::ostream& os, const Primitive::Type& type) { argument
42 os << kTypeNames[int_type];
44 os << "Type[" << int_type << "]";
46 return os;
H A Ddex_instruction.cc134 std::ostringstream os; local
137 os << StringPrintf("0x%04x", insn[i]) << " ";
140 os << " ";
142 return os.str();
150 std::ostringstream os; local
153 os << StringPrintf("%02x%02x", static_cast<uint8_t>(insn[i] & 0x00FF),
157 os << " ";
159 return os.str();
163 std::ostringstream os; local
166 case k10x: os << opcod
472 operator <<(std::ostream& os, const Instruction::Code& code) argument
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H A Dprocess_state.h29 std::ostream& operator<<(std::ostream& os, const ProcessState& process_state);
/art/runtime/arch/x86/
H A Dregisters_x86.cc27 std::ostream& operator<<(std::ostream& os, const Register& rhs) { argument
29 os << kRegisterNames[rhs];
31 os << "Register[" << static_cast<int>(rhs) << "]";
33 return os;
/art/compiler/utils/arm/
H A Dmanaged_register_arm.cc75 void ArmManagedRegister::Print(std::ostream& os) const {
77 os << "No Register";
79 os << "Core: " << static_cast<int>(AsCoreRegister());
81 os << "Pair: " << static_cast<int>(AsRegisterPairLow()) << ", "
84 os << "SRegister: " << static_cast<int>(AsSRegister());
86 os << "DRegister: " << static_cast<int>(AsDRegister());
88 os << "??: " << RegId();
92 std::ostream& operator<<(std::ostream& os, const ArmManagedRegister& reg) { argument
93 reg.Print(os);
94 return os;
97 operator <<(std::ostream& os, const RegisterPair& r) argument
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/art/runtime/base/
H A Ddumpable.h26 // A convenience to allow any class with a "Dump(std::ostream& os)" member function
29 // os << Dumpable<MyType>(my_type_instance);
37 void Dump(std::ostream& os) const {
38 value_.Dump(os);
48 std::ostream& operator<<(std::ostream& os, const Dumpable<T>& rhs) { argument
49 rhs.Dump(os);
50 return os;
H A Dto_str.h30 std::ostringstream os; local
31 os << value;
32 s_ = os.str();
H A Dhex_dump.h37 void Dump(std::ostream& os) const;
48 inline std::ostream& operator<<(std::ostream& os, const HexDump& rhs) { argument
49 rhs.Dump(os);
50 return os;
/art/compiler/utils/arm64/
H A Dmanaged_register_arm64.cc86 void Arm64ManagedRegister::Print(std::ostream& os) const {
88 os << "No Register";
90 os << "XCore: " << static_cast<int>(AsXRegister());
92 os << "WCore: " << static_cast<int>(AsWRegister());
94 os << "DRegister: " << static_cast<int>(AsDRegister());
96 os << "SRegister: " << static_cast<int>(AsSRegister());
98 os << "??: " << RegId();
102 std::ostream& operator<<(std::ostream& os, const Arm64ManagedRegister& reg) { argument
103 reg.Print(os);
104 return os;
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/art/compiler/utils/mips/
H A Dmanaged_register_mips.cc76 void MipsManagedRegister::Print(std::ostream& os) const {
78 os << "No Register";
80 os << "Core: " << static_cast<int>(AsCoreRegister());
82 os << "Pair: " << AsRegisterPairLow() << ", " << AsRegisterPairHigh();
84 os << "FRegister: " << static_cast<int>(AsFRegister());
86 os << "DRegister: " << static_cast<int>(AsDRegister());
88 os << "??: " << RegId();
92 std::ostream& operator<<(std::ostream& os, const MipsManagedRegister& reg) { argument
93 reg.Print(os);
94 return os;
97 operator <<(std::ostream& os, const RegisterPair& reg) argument
[all...]
/art/runtime/gc/
H A Dgc_cause.cc46 std::ostream& operator<<(std::ostream& os, const GcCause& gc_cause) { argument
47 os << PrettyCause(gc_cause);
48 return os;
H A Dweak_root_state.h36 std::ostream& operator<<(std::ostream& os, const WeakRootState&);
/art/disassembler/
H A Ddisassembler_arm.h31 size_t Dump(std::ostream& os, const uint8_t* begin) OVERRIDE;
32 void Dump(std::ostream& os, const uint8_t* begin, const uint8_t* end) OVERRIDE;
35 void DumpArm(std::ostream& os, const uint8_t* instr);
38 size_t DumpThumb16(std::ostream& os, const uint8_t* instr);
39 size_t DumpThumb32(std::ostream& os, const uint8_t* instr_ptr);
41 void DumpBranchTarget(std::ostream& os, const uint8_t* instr_ptr, int32_t imm32);
42 void DumpCond(std::ostream& os, uint32_t cond);
43 void DumpMemoryDomain(std::ostream& os, uint32_t domain);
/art/compiler/utils/x86/
H A Dmanaged_register_x86.cc53 std::ostream& operator<<(std::ostream& os, const RegisterPair& reg) { argument
55 os << "kNoRegisterPair";
57 os << X86ManagedRegister::FromRegisterPair(reg);
59 return os;
98 void X86ManagedRegister::Print(std::ostream& os) const {
100 os << "No Register";
102 os << "XMM: " << AsXmmRegister();
104 os << "X87: " << AsX87Register();
106 os << "CPU: " << AsCpuRegister();
108 os << "Pai
114 operator <<(std::ostream& os, const X86ManagedRegister& reg) argument
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/art/compiler/optimizing/
H A Dnodes_arm64.cc67 std::ostream& operator<<(std::ostream& os, const HArm64DataProcWithShifterOp::OpKind op) { argument
69 case HArm64DataProcWithShifterOp::kLSL: return os << "LSL";
70 case HArm64DataProcWithShifterOp::kLSR: return os << "LSR";
71 case HArm64DataProcWithShifterOp::kASR: return os << "ASR";
72 case HArm64DataProcWithShifterOp::kUXTB: return os << "UXTB";
73 case HArm64DataProcWithShifterOp::kUXTH: return os << "UXTH";
74 case HArm64DataProcWithShifterOp::kUXTW: return os << "UXTW";
75 case HArm64DataProcWithShifterOp::kSXTB: return os << "SXTB";
76 case HArm64DataProcWithShifterOp::kSXTH: return os << "SXTH";
77 case HArm64DataProcWithShifterOp::kSXTW: return os << "SXT
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/art/compiler/utils/x86_64/
H A Dmanaged_register_x86_64.cc52 std::ostream& operator<<(std::ostream& os, const RegisterPair& reg) { argument
53 os << X86_64ManagedRegister::FromRegisterPair(reg);
54 return os;
93 void X86_64ManagedRegister::Print(std::ostream& os) const {
95 os << "No Register";
97 os << "XMM: " << static_cast<int>(AsXmmRegister().AsFloatRegister());
99 os << "X87: " << static_cast<int>(AsX87Register());
101 os << "CPU: " << static_cast<int>(AsCpuRegister().AsRegister());
103 os << "Pair: " << AsRegisterPairLow() << ", " << AsRegisterPairHigh();
105 os << "
109 operator <<(std::ostream& os, const X86_64ManagedRegister& reg) argument
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