Searched refs:CurrCycle (Results 1 - 4 of 4) sorted by relevance

/external/llvm/lib/Target/Hexagon/
H A DHexagonMachineScheduler.cpp295 if (ReadyCycle > CurrCycle || checkHazard(SU))
308 unsigned NextCycle = std::max(CurrCycle + 1, MinReadyCycle);
312 CurrCycle = NextCycle;
315 for (; CurrCycle != NextCycle; ++CurrCycle) {
325 << CurrCycle << '\n');
349 DEBUG(dbgs() << "*** Max instrs at cycle " << CurrCycle << '\n');
354 << " at cycle " << CurrCycle << '\n'); local
373 if (ReadyCycle > CurrCycle)
682 << (IsTopNode ? Top.CurrCycle
[all...]
H A DHexagonMachineScheduler.h144 unsigned CurrCycle; member in struct:llvm::ConvergingVLIWScheduler::VLIWSchedBoundary
159 CurrCycle(0), IssueCount(0),
/external/llvm/include/llvm/CodeGen/
H A DMachineScheduler.h593 unsigned CurrCycle; member in class:llvm::SchedBoundary
610 /// time=CurrCycle assuming the first scheduled instr is retired at time=0.
661 unsigned getCurrCycle() const { return CurrCycle; }
677 return std::max(ExpectedLatency, CurrCycle);
700 return std::max(CurrCycle * SchedModel->getLatencyFactor(),
/external/llvm/lib/CodeGen/
H A DMachineScheduler.cpp559 // SU->TopReadyCycle was set to CurrCycle when it was scheduled. However,
560 // CurrCycle may have advanced since then.
598 // SU->BotReadyCycle was set to CurrCycle when it was scheduled. However,
599 // CurrCycle may have advanced since then.
722 // This sets the scheduled node's ReadyCycle to CurrCycle. When updateQueues
1670 CurrCycle = 0;
1736 if (ReadyCycle > CurrCycle)
1737 return ReadyCycle - CurrCycle;
1785 if (NRCycle > CurrCycle) {
1852 // ReadyCycle was been bumped up to the CurrCycle whe
2093 << " at cycle " << CurrCycle << '\\n'); local
[all...]

Completed in 86 milliseconds