Searched refs:MF (Results 1 - 25 of 555) sorted by relevance

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/external/llvm/lib/Target/AMDGPU/
H A DR600MachineFunctionInfo.cpp19 R600MachineFunctionInfo::R600MachineFunctionInfo(const MachineFunction &MF) argument
20 : AMDGPUMachineFunction(MF) { }
H A DAMDGPUMachineFunction.cpp11 AMDGPUMachineFunction::AMDGPUMachineFunction(const MachineFunction &MF) : argument
19 ShaderType = AMDGPU::getShaderType(*MF.getFunction());
H A DAMDGPUFrameLowering.h34 unsigned getStackWidth(const MachineFunction &MF) const;
35 int getFrameIndexReference(const MachineFunction &MF, int FI,
39 void emitPrologue(MachineFunction &MF, MachineBasicBlock &MBB) const override;
40 void emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const override;
41 bool hasFP(const MachineFunction &MF) const override;
/external/llvm/lib/CodeGen/
H A DTargetOptionsImpl.cpp25 bool TargetOptions::DisableFramePointerElim(const MachineFunction &MF) const {
27 if (MF.getSubtarget().getFrameLowering()->noFramePointerElim(MF))
31 if (MF.getFunction()->hasFnAttribute("no-frame-pointer-elim-non-leaf"))
32 return MF.getFrameInfo()->hasCalls();
H A DTargetFrameLoweringImpl.cpp31 bool TargetFrameLowering::noFramePointerElim(const MachineFunction &MF) const {
32 auto Attr = MF.getFunction()->getFnAttribute("no-frame-pointer-elim");
40 int TargetFrameLowering::getFrameIndexReference(const MachineFunction &MF, argument
42 const MachineFrameInfo *MFI = MF.getFrameInfo();
43 const TargetRegisterInfo *RI = MF.getSubtarget().getRegisterInfo();
48 FrameReg = RI->getFrameRegister(MF);
55 const MachineFunction &MF) const {
56 return MF.getFrameInfo()->hasStackObjects();
59 void TargetFrameLowering::determineCalleeSaves(MachineFunction &MF, argument
63 const TargetRegisterInfo &TRI = *MF
[all...]
H A DMachineFunctionAnalysis.cpp25 : FunctionPass(ID), TM(tm), MF(nullptr), MFInitializer(MFInitializer) {
31 assert(!MF && "MachineFunctionAnalysis left initialized!");
49 assert(!MF && "MachineFunctionAnalysis already initialized!");
50 MF = new MachineFunction(&F, TM, NextFnNum++,
53 MFInitializer->initializeMachineFunction(*MF);
58 delete MF;
59 MF = nullptr;
/external/llvm/lib/Target/PowerPC/
H A DPPCMachineFunctionInfo.cpp21 const DataLayout &DL = MF.getDataLayout();
22 return MF.getContext().getOrCreateSymbol(Twine(DL.getPrivateGlobalPrefix()) +
23 Twine(MF.getFunctionNumber()) +
/external/mesa3d/src/gallium/drivers/radeon/
H A DR600MachineFunctionInfo.cpp14 R600MachineFunctionInfo::R600MachineFunctionInfo(const MachineFunction &MF) argument
H A DSIMachineFunctionInfo.cpp15 SIMachineFunctionInfo::SIMachineFunctionInfo(const MachineFunction &MF) argument
H A DAMDILFrameLowering.h37 virtual int getFrameIndexOffset(const MachineFunction &MF,
41 virtual void emitPrologue(MachineFunction &MF) const;
42 virtual void emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const;
43 virtual bool hasFP(const MachineFunction &MF) const;
H A DAMDILFrameLowering.cpp29 int AMDGPUFrameLowering::getFrameIndexOffset(const MachineFunction &MF, argument
31 const MachineFrameInfo *MFI = MF.getFrameInfo();
42 AMDGPUFrameLowering::emitPrologue(MachineFunction &MF) const
46 AMDGPUFrameLowering::emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const argument
50 AMDGPUFrameLowering::hasFP(const MachineFunction &MF) const
/external/llvm/lib/Target/XCore/
H A DXCoreRegisterInfo.h32 const MCPhysReg *getCalleeSavedRegs(const MachineFunction *MF) const override;
34 BitVector getReservedRegs(const MachineFunction &MF) const override;
36 bool requiresRegisterScavenging(const MachineFunction &MF) const override;
38 bool trackLivenessAfterRegAlloc(const MachineFunction &MF) const override;
40 bool useFPForScavengingIndex(const MachineFunction &MF) const override;
47 unsigned getFrameRegister(const MachineFunction &MF) const override;
50 static bool needsFrameMoves(const MachineFunction &MF);
/external/llvm/lib/Target/Sparc/
H A DSparcFrameLowering.h29 void emitPrologue(MachineFunction &MF, MachineBasicBlock &MBB) const override;
30 void emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const override;
33 eliminateCallFramePseudoInstr(MachineFunction &MF,
37 bool hasReservedCallFrame(const MachineFunction &MF) const override;
38 bool hasFP(const MachineFunction &MF) const override;
39 void determineCalleeSaves(MachineFunction &MF, BitVector &SavedRegs,
42 int getFrameIndexReference(const MachineFunction &MF, int FI,
52 void remapRegsForLeafProc(MachineFunction &MF) const;
54 // Returns true if MF is a leaf procedure.
55 bool isLeafProc(MachineFunction &MF) cons
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/external/llvm/lib/Target/Hexagon/
H A DHexagonRegisterInfo.h45 const MCPhysReg *getCalleeSavedRegs(const MachineFunction *MF)
49 BitVector getReservedRegs(const MachineFunction &MF) const override;
56 bool requiresRegisterScavenging(const MachineFunction &MF) const override {
62 bool requiresFrameIndexScavenging(const MachineFunction &MF) const override {
67 bool useFPForScavengingIndex(const MachineFunction &MF) const override;
69 bool trackLivenessAfterRegAlloc(const MachineFunction &MF) const override {
75 unsigned getFrameRegister(const MachineFunction &MF) const override;
79 const MCPhysReg *getCallerSavedRegs(const MachineFunction *MF) const;
/external/llvm/lib/Target/MSP430/
H A DMSP430RegisterInfo.h29 const MCPhysReg *getCalleeSavedRegs(const MachineFunction *MF) const override;
31 BitVector getReservedRegs(const MachineFunction &MF) const override;
33 getPointerRegClass(const MachineFunction &MF,
41 unsigned getFrameRegister(const MachineFunction &MF) const override;
/external/llvm/lib/Target/NVPTX/
H A DNVPTXFrameLowering.h25 bool hasFP(const MachineFunction &MF) const override;
26 void emitPrologue(MachineFunction &MF, MachineBasicBlock &MBB) const override;
27 void emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const override;
30 eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB,
H A DNVPTXFrameLowering.cpp32 bool NVPTXFrameLowering::hasFP(const MachineFunction &MF) const { return true; }
34 void NVPTXFrameLowering::emitPrologue(MachineFunction &MF, argument
36 if (MF.getFrameInfo()->hasStackObjects()) {
37 assert(&MF.front() == &MBB && "Shrink-wrapping not yet supported");
39 MachineRegisterInfo &MR = MF.getRegInfo();
48 // for local address accesses in MF.
50 static_cast<const NVPTXTargetMachine &>(MF.getTarget()).is64Bit();
58 MF.getSubtarget().getInstrInfo()->get(CvtaLocalOpcode),
62 BuildMI(MBB, MI, dl, MF.getSubtarget().getInstrInfo()->get(MovDepotOpcode),
64 .addImm(MF
68 emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const argument
73 eliminateCallFramePseudoInstr( MachineFunction &MF, MachineBasicBlock &MBB, MachineBasicBlock::iterator I) const argument
[all...]
/external/llvm/lib/Target/ARM/
H A DARMMachineFunctionInfo.cpp16 ARMFunctionInfo::ARMFunctionInfo(MachineFunction &MF) argument
17 : isThumb(MF.getSubtarget<ARMSubtarget>().isThumb()),
18 hasThumb2(MF.getSubtarget<ARMSubtarget>().hasThumb2()),
/external/llvm/lib/Target/AArch64/
H A DAArch64RegisterInfo.h34 bool isReservedReg(const MachineFunction &MF, unsigned Reg) const;
37 const MCPhysReg *getCalleeSavedRegs(const MachineFunction *MF) const override;
39 getCalleeSavedRegsViaCopy(const MachineFunction *MF) const override;
40 const uint32_t *getCallPreservedMask(const MachineFunction &MF,
62 const uint32_t *getThisReturnPreservedMask(const MachineFunction &MF,
65 BitVector getReservedRegs(const MachineFunction &MF) const override;
67 getPointerRegClass(const MachineFunction &MF,
72 bool requiresRegisterScavenging(const MachineFunction &MF) const override;
73 bool useFPForScavengingIndex(const MachineFunction &MF) const override;
74 bool requiresFrameIndexScavenging(const MachineFunction &MF) cons
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H A DAArch64RegisterInfo.cpp42 AArch64RegisterInfo::getCalleeSavedRegs(const MachineFunction *MF) const {
43 assert(MF && "Invalid MachineFunction pointer.");
44 if (MF->getFunction()->getCallingConv() == CallingConv::GHC)
48 if (MF->getFunction()->getCallingConv() == CallingConv::AnyReg)
50 if (MF->getFunction()->getCallingConv() == CallingConv::CXX_FAST_TLS)
51 return MF->getInfo<AArch64FunctionInfo>()->isSplitCSR() ?
59 const MachineFunction *MF) const {
60 assert(MF && "Invalid MachineFunction pointer.");
61 if (MF->getFunction()->getCallingConv() == CallingConv::CXX_FAST_TLS &&
62 MF
68 getCallPreservedMask(const MachineFunction &MF, CallingConv::ID CC) const argument
90 getThisReturnPreservedMask(const MachineFunction &MF, CallingConv::ID CC) const argument
132 isReservedReg(const MachineFunction &MF, unsigned Reg) const argument
159 getPointerRegClass(const MachineFunction &MF, unsigned Kind) const argument
324 const MachineFunction &MF = *MBB->getParent(); local
362 MachineFunction &MF = *MBB.getParent(); local
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/external/llvm/lib/Target/BPF/
H A DBPFFrameLowering.cpp24 bool BPFFrameLowering::hasFP(const MachineFunction &MF) const { return true; }
26 void BPFFrameLowering::emitPrologue(MachineFunction &MF, argument
29 void BPFFrameLowering::emitEpilogue(MachineFunction &MF, argument
32 void BPFFrameLowering::determineCalleeSaves(MachineFunction &MF, argument
35 TargetFrameLowering::determineCalleeSaves(MF, SavedRegs, RS);
H A DBPFFrameLowering.h27 void emitPrologue(MachineFunction &MF, MachineBasicBlock &MBB) const override;
28 void emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const override;
30 bool hasFP(const MachineFunction &MF) const override;
31 void determineCalleeSaves(MachineFunction &MF, BitVector &SavedRegs,
35 eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB,
/external/llvm/lib/Target/WebAssembly/
H A DWebAssemblyFrameLowering.h32 eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB,
36 void emitPrologue(MachineFunction &MF, MachineBasicBlock &MBB) const override;
37 void emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const override;
39 bool hasFP(const MachineFunction &MF) const override;
40 bool hasReservedCallFrame(const MachineFunction &MF) const override;
/external/llvm/lib/Target/Mips/
H A DMipsRegisterInfo.h36 void adjustMipsStackFrame(MachineFunction &MF) const;
39 const TargetRegisterClass *getPointerRegClass(const MachineFunction &MF,
43 MachineFunction &MF) const override;
44 const MCPhysReg *getCalleeSavedRegs(const MachineFunction *MF) const override;
45 const uint32_t *getCallPreservedMask(const MachineFunction &MF,
49 BitVector getReservedRegs(const MachineFunction &MF) const override;
51 bool requiresRegisterScavenging(const MachineFunction &MF) const override;
53 bool trackLivenessAfterRegAlloc(const MachineFunction &MF) const override;
60 void processFunctionBeforeFrameFinalized(MachineFunction &MF,
64 bool canRealignStack(const MachineFunction &MF) cons
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H A DMipsSEFrameLowering.h27 void emitPrologue(MachineFunction &MF, MachineBasicBlock &MBB) const override;
28 void emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const override;
30 int getFrameIndexReference(const MachineFunction &MF, int FI,
38 bool hasReservedCallFrame(const MachineFunction &MF) const override;
40 void determineCalleeSaves(MachineFunction &MF, BitVector &SavedRegs,
45 void emitInterruptEpilogueStub(MachineFunction &MF,
47 void emitInterruptPrologueStub(MachineFunction &MF,

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