Searched refs:NewVRegs (Results 1 - 2 of 2) sorted by relevance
/external/llvm/lib/CodeGen/ |
H A D | RegAllocGreedy.cpp | 378 SmallVectorImpl<unsigned> &NewVRegs); 383 SmallVectorImpl<unsigned> &NewVRegs); 618 SmallVectorImpl<unsigned> &NewVRegs) { 637 evictInterference(VirtReg, Hint, NewVRegs); 651 unsigned CheapReg = tryEvict(VirtReg, Order, NewVRegs, Cost); 806 SmallVectorImpl<unsigned> &NewVRegs) { 838 NewVRegs.push_back(Intf->reg); 858 SmallVectorImpl<unsigned> &NewVRegs, 918 evictInterference(VirtReg, BestPhys, NewVRegs); 1346 SmallVectorImpl<unsigned> &NewVRegs) { 616 tryAssign(LiveInterval &VirtReg, AllocationOrder &Order, SmallVectorImpl<unsigned> &NewVRegs) argument 805 evictInterference(LiveInterval &VirtReg, unsigned PhysReg, SmallVectorImpl<unsigned> &NewVRegs) argument 856 tryEvict(LiveInterval &VirtReg, AllocationOrder &Order, SmallVectorImpl<unsigned> &NewVRegs, unsigned CostPerUseLimit) argument 1345 tryRegionSplit(LiveInterval &VirtReg, AllocationOrder &Order, SmallVectorImpl<unsigned> &NewVRegs) argument 1455 doRegionSplit(LiveInterval &VirtReg, unsigned BestCand, bool HasCompact, SmallVectorImpl<unsigned> &NewVRegs) argument 1503 tryBlockSplit(LiveInterval &VirtReg, AllocationOrder &Order, SmallVectorImpl<unsigned> &NewVRegs) argument 1571 tryInstructionSplit(LiveInterval &VirtReg, AllocationOrder &Order, SmallVectorImpl<unsigned> &NewVRegs) argument 1715 tryLocalSplit(LiveInterval &VirtReg, AllocationOrder &Order, SmallVectorImpl<unsigned> &NewVRegs) argument [all...] |
H A D | RegAllocPBQP.cpp | 606 SmallVector<unsigned, 8> NewVRegs; local 607 spillVReg(VReg, NewVRegs, MF, LIS, VRM, VRegSpiller); 608 Worklist.insert(Worklist.end(), NewVRegs.begin(), NewVRegs.end()); 685 SmallVector<unsigned, 8> NewVRegs; local 686 spillVReg(VReg, NewVRegs, MF, LIS, VRM, VRegSpiller); 687 AnotherRoundNeeded |= !NewVRegs.empty();
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