Searched refs:SRC0 (Results 1 - 5 of 5) sorted by relevance

/external/mesa3d/src/mesa/x86/
H A Dx86_xform3.S41 #define SRC0 REGOFF(0, ESI) define
100 FLD_S( SRC0 ) /* F4 */
102 FLD_S( SRC0 ) /* F5 F4 */
104 FLD_S( SRC0 ) /* F6 F5 F4 */
106 FLD_S( SRC0 ) /* F7 F6 F5 F4 */
208 FLD_S( SRC0 ) /* F4 */
288 FLD_S( SRC0 ) /* F4 */
290 FLD_S( SRC0 ) /* F5 F4 */
292 FLD_S( SRC0 ) /* F6 F5 F4 */
383 FLD_S( SRC0 ) /* F
[all...]
H A Dx86_xform2.S41 #define SRC0 REGOFF(0, ESI) define
100 FLD_S( SRC0 ) /* F4 */
102 FLD_S( SRC0 ) /* F5 F4 */
104 FLD_S( SRC0 ) /* F6 F5 F4 */
106 FLD_S( SRC0 ) /* F7 F6 F5 F4 */
194 FLD_S( SRC0 ) /* F4 */
257 FLD_S( SRC0 ) /* F4 */
259 FLD_S( SRC0 ) /* F5 F4 */
261 FLD_S( SRC0 ) /* F6 F5 F4 */
342 FLD_S( SRC0 ) /* F
[all...]
H A Dx86_xform4.S41 #define SRC0 REGOFF(0, ESI) define
100 FLD_S( SRC0 ) /* F4 */
102 FLD_S( SRC0 ) /* F5 F4 */
104 FLD_S( SRC0 ) /* F6 F5 F4 */
106 FLD_S( SRC0 ) /* F7 F6 F5 F4 */
215 FLD_S( SRC0 ) /* F4 */
298 FLD_S( SRC0 ) /* F4 */
300 FLD_S( SRC0 ) /* F5 F4 */
302 FLD_S( SRC0 ) /* F6 F5 F4 */
401 FLD_S( SRC0 ) /* F
[all...]
H A Dx86_cliptest.S36 #define SRC0 REGOFF(0, ESI) define
58 * bit1 = SRC0 < 0
189 MOV_L( SRC0, EBX )
227 FLD_S( SRC0 ) /* F0 F3 */
355 MOV_L( SRC0, EBX )
/external/webp/src/dsp/
H A Drescaler_neon.c31 #define STORE_32x8(SRC0, SRC1, DST) do { \
32 vst1q_u32((DST) + 0, SRC0); \

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