Searched refs:SuperReg (Results 1 - 9 of 9) sorted by relevance

/external/llvm/lib/CodeGen/
H A DAggressiveAntiDepBreaker.cpp556 unsigned SuperReg = 0;
559 if ((SuperReg == 0) || TRI->isSuperRegister(SuperReg, Reg))
560 SuperReg = Reg;
576 // All group registers should be a subreg of SuperReg.
579 if (Reg == SuperReg) continue;
580 bool IsSub = TRI->isSubRegister(SuperReg, Reg);
595 dbgs() << "*** Performing rename " << TRI->getName(SuperReg) <<
600 // Check each possible rename register for SuperReg in round-robin
609 TRI->getMinimalPhysRegClass(SuperReg, MV
[all...]
H A DScheduleDAGInstrs.cpp1235 const unsigned SuperReg = MO.getReg(); local
1237 for (MCSubRegIterator SubRegs(SuperReg, TRI); SubRegs.isValid(); ++SubRegs) {
/external/llvm/lib/Target/PowerPC/
H A DPPCInstrInfo.cpp823 unsigned SuperReg = local
826 if (VSXSelfCopyCrash && SrcReg == SuperReg)
829 DestReg = SuperReg;
832 unsigned SuperReg = local
835 if (VSXSelfCopyCrash && SrcReg == SuperReg)
838 DestReg = SuperReg;
841 unsigned SuperReg = local
844 if (VSXSelfCopyCrash && DestReg == SuperReg)
847 SrcReg = SuperReg;
850 unsigned SuperReg local
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/external/llvm/lib/Target/AMDGPU/
H A DSIInstrInfo.h31 MachineOperand &SuperReg,
37 MachineOperand &SuperReg,
H A DSIInstrInfo.cpp1708 MachineOperand &SuperReg,
1717 if (SuperReg.getSubReg() == AMDGPU::NoSubRegister) {
1719 .addReg(SuperReg.getReg(), 0, SubIdx);
1730 .addReg(SuperReg.getReg(), 0, SuperReg.getSubReg());
H A DR600InstrInfo.cpp1085 unsigned SuperReg = AMDGPU::R600_Reg128RegClass.getRegister(Index); local
1086 Reserved.set(SuperReg);
/external/llvm/lib/Target/ARM/
H A DARMISelDAGToDAG.cpp1924 SDValue SuperReg = SDValue(VLd, 0);
1930 CurDAG->getTargetExtractSubreg(Sub0 + Vec, dl, VT, SuperReg));
2158 SDValue SuperReg; local
2163 SuperReg = SDValue(createDRegPairNode(MVT::v2i64, V0, V1), 0);
2165 SuperReg = SDValue(createQRegPairNode(MVT::v4i64, V0, V1), 0);
2172 SuperReg = SDValue(createQuadDRegsNode(MVT::v4i64, V0, V1, V2, V3), 0);
2174 SuperReg = SDValue(createQuadQRegsNode(MVT::v8i64, V0, V1, V2, V3), 0);
2176 Ops.push_back(SuperReg);
2190 SuperReg = SDValue(VLdLn, 0);
2196 CurDAG->getTargetExtractSubreg(Sub0 + Vec, dl, VT, SuperReg));
2245 SDValue SuperReg; local
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/external/llvm/lib/Target/AArch64/
H A DAArch64ISelDAGToDAG.cpp1146 SDValue SuperReg = SDValue(Ld, 0); local
1149 CurDAG->getTargetExtractSubreg(SubRegIdx + i, dl, VT, SuperReg));
1174 SDValue SuperReg = SDValue(Ld, 1); local
1176 ReplaceUses(SDValue(N, 0), SuperReg); local
1180 CurDAG->getTargetExtractSubreg(SubRegIdx + i, dl, VT, SuperReg));
1282 SDValue SuperReg = SDValue(Ld, 0); local
1288 SDValue NV = CurDAG->getTargetExtractSubreg(QSubs[i], dl, WideVT, SuperReg);
1332 SDValue SuperReg = SDValue(Ld, 1); local
1335 Narrow ? NarrowVector(SuperReg, *CurDAG) : SuperReg);
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/external/llvm/lib/Target/ARM/AsmParser/
H A DARMAsmParser.cpp5927 unsigned SuperReg = MRI->getMatchingSuperReg( local
5930 assert(SuperReg && "expected register pair");
5932 unsigned PairedReg = MRI->getSubReg(SuperReg, ARM::gsub_1);

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