Searched refs:dlgr (Results 1 - 7 of 7) sorted by relevance

/external/valgrind/none/tests/s390x/
H A Ddiv.c11 regsweep(dlgr, m2);
H A Ddiv.stdout.exp61 dlgr 00000000000000000000000000000000 / 7FFFFFFFFFFFFFFA = 0000000000000000 (rem 0000000000000000)
62 dlgr 00000000000000000000000000000001 / 7FFFFFFFFFFFFFFA = 0000000000000000 (rem 0000000000000001)
63 dlgr 0000000000000000000000000000FFFF / 7FFFFFFFFFFFFFFA = 0000000000000000 (rem 000000000000FFFF)
64 dlgr 00000000000000000000000000007FFF / 7FFFFFFFFFFFFFFA = 0000000000000000 (rem 0000000000007FFF)
65 dlgr 00000000000000000000000000008000 / 7FFFFFFFFFFFFFFA = 0000000000000000 (rem 0000000000008000)
66 dlgr 000000000000000000000000FFFFFFFF / 7FFFFFFFFFFFFFFA = 0000000000000000 (rem 00000000FFFFFFFF)
67 dlgr 00000000000000000000000080000000 / 7FFFFFFFFFFFFFFA = 0000000000000000 (rem 0000000080000000)
68 dlgr 0000000000000000000000007FFFFFFF / 7FFFFFFFFFFFFFFA = 0000000000000000 (rem 000000007FFFFFFF)
69 dlgr 0000000000000000FFFFFFFFFFFFFFFF / 7FFFFFFFFFFFFFFA = 0000000000000002 (rem 000000000000000B)
70 dlgr 0000000000000000800000000000000
[all...]
/external/v8/src/compiler/s390/
H A Dcode-generator-s390.cc1172 __ dlgr(r0, i.InputRegister(1)); // R0:R1: Dividend
1223 __ dlgr(r0, i.InputRegister(1)); // R0:R1: Dividend
/external/llvm/test/MC/SystemZ/
H A Dinsn-bad.s1277 #CHECK: dlgr %r1, %r0
1279 dlgr %r1, %r0
H A Dinsn-good.s4391 #CHECK: dlgr %r0, %r0 # encoding: [0xb9,0x87,0x00,0x00]
4392 #CHECK: dlgr %r0, %r15 # encoding: [0xb9,0x87,0x00,0x0f]
4393 #CHECK: dlgr %r14, %r0 # encoding: [0xb9,0x87,0x00,0xe0]
4394 #CHECK: dlgr %r6, %r9 # encoding: [0xb9,0x87,0x00,0x69]
4396 dlgr %r0,%r0
4397 dlgr %r0,%r15
4398 dlgr %r14,%r0
4399 dlgr %r6,%r9
/external/v8/src/s390/
H A Dassembler-s390.h1072 void dlgr(Register r1, Register r2);
H A Dassembler-s390.cc2174 void Assembler::dlgr(Register r1, Register r2) { rre_form(DLGR, r1, r2); } function in class:v8::internal::Assembler

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