Searched refs:laneNo (Results 1 - 4 of 4) sorted by relevance

/external/valgrind/VEX/priv/
H A Dguest_arm64_toIR.c1408 /* Find the offset of the laneNo'th lane of type laneTy in the given
1411 static Int offsetQRegLane ( UInt qregNo, IRType laneTy, UInt laneNo )
1429 UInt minOff = laneNo * laneSzB;
1536 static void putQRegLane ( UInt qregNo, UInt laneNo, IRExpr* e ) argument
1539 Int off = offsetQRegLane(qregNo, laneTy, laneNo);
1553 static IRExpr* getQRegLane ( UInt qregNo, UInt laneNo, IRType laneTy ) argument
1555 Int off = offsetQRegLane(qregNo, laneTy, laneNo);
7598 (1 << size) obtained from src[laneNo]. */
7600 IRTemp math_DUP_VEC_ELEM ( IRExpr* src, UInt size, UInt laneNo )
7603 /* Normalise |laneNo| s
7656 handle_DUP_VEC_ELEM( UInt* laneNo, UInt* laneSzLg2, HChar* laneCh, IRExpr* srcV, UInt imm5 ) argument
8593 UInt laneNo = 0; local
8671 UInt laneNo = 16; local
8735 UInt laneNo = 16; /* invalid */ local
9031 UInt laneNo = 16; /* invalid */ local
[all...]
H A Dhost_arm64_defs.h856 UInt laneNo; /* either 0 or 1 */ member in struct:__anon17954::__anon17955::__anon18007
948 extern ARM64Instr* ARM64Instr_VXfromQ ( HReg rX, HReg rQ, UInt laneNo );
H A Dhost_arm64_defs.c1310 ARM64Instr* ARM64Instr_VXfromQ ( HReg rX, HReg rQ, UInt laneNo ) {
1315 i->ARM64in.VXfromQ.laneNo = laneNo;
1316 vassert(laneNo <= 1);
1858 vex_printf(".d[%u]", i->ARM64in.VXfromQ.laneNo);
5288 UInt laneNo = i->ARM64in.VXfromQ.laneNo; local
5290 vassert(laneNo < 2);
5292 laneNo == 1 ? X11000 : X01000, X001111, nn, dd);
H A Dhost_arm64_isel.c1837 UInt laneNo = (e->Iex.Unop.op == Iop_V128HIto64) ? 1 : 0; local
1838 addInstr(env, ARM64Instr_VXfromQ(dst, src, laneNo));
1918 addInstr(env, ARM64Instr_VXfromQ(dst, tmp, 0/*laneNo*/));

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