Searched refs:nr_vs_entries (Results 1 - 5 of 5) sorted by relevance
/external/mesa3d/src/mesa/drivers/dri/i965/ |
H A D | gen6_urb.c | 53 int nr_vs_entries, nr_gs_entries; local 69 nr_vs_entries = (total_urb_size/2) / (brw->urb.vs_size * 128); 72 nr_vs_entries = total_urb_size / (brw->urb.vs_size * 128); 77 if (nr_vs_entries > brw->urb.max_vs_entries) 78 nr_vs_entries = brw->urb.max_vs_entries; 84 brw->urb.nr_vs_entries = ROUND_DOWN_TO(nr_vs_entries, 4); 87 assert(brw->urb.nr_vs_entries >= 24); 88 assert(brw->urb.nr_vs_entries % 4 == 0); 96 ((brw->urb.nr_vs_entries) << GEN6_URB_VS_ENTRIES_SHIF [all...] |
H A D | gen7_urb.c | 87 int nr_vs_entries = handle_region_size / (brw->urb.vs_size * 64); local 88 if (nr_vs_entries > brw->urb.max_vs_entries) 89 nr_vs_entries = brw->urb.max_vs_entries; 91 /* According to volume 2a, nr_vs_entries must be a multiple of 8. */ 92 brw->urb.nr_vs_entries = ROUND_DOWN_TO(nr_vs_entries, 8); 97 assert(brw->urb.nr_vs_entries % 8 == 0); 103 gen7_emit_urb_state(brw, brw->urb.nr_vs_entries, brw->urb.vs_size, 108 gen7_emit_urb_state(struct brw_context *brw, GLuint nr_vs_entries, argument 115 OUT_BATCH(nr_vs_entries | [all...] |
H A D | brw_vs_state.c | 105 switch (brw->urb.nr_vs_entries) { 117 vs->thread4.nr_urb_entries = brw->urb.nr_vs_entries >> 2; 123 switch (brw->urb.nr_vs_entries) { 135 vs->thread4.nr_urb_entries = brw->urb.nr_vs_entries; 140 vs->thread4.max_threads = CLAMP(brw->urb.nr_vs_entries / 2,
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H A D | brw_urb.c | 103 brw->urb.gs_start = brw->urb.nr_vs_entries * brw->urb.vsize; 143 brw->urb.nr_vs_entries = limits[VS].preferred_nr_entries; 152 brw->urb.nr_vs_entries = 128; 158 brw->urb.nr_vs_entries = limits[VS].preferred_nr_entries; 162 brw->urb.nr_vs_entries = 64; 167 brw->urb.nr_vs_entries = limits[VS].preferred_nr_entries; 172 brw->urb.nr_vs_entries = limits[VS].min_nr_entries;
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H A D | brw_context.h | 826 GLuint nr_vs_entries; member in struct:brw_context::__anon14525 1197 gen7_emit_urb_state(struct brw_context *brw, GLuint nr_vs_entries,
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