Searched refs:Rd (Results 1 - 14 of 14) sorted by relevance

/system/core/libpixelflinger/codeflinger/
H A DARMAssemblerInterface.cpp68 void ARMAssemblerInterface::ADDR_LDR(int cc, int Rd, argument
71 LDR(cc, Rd, Rn, offset);
73 void ARMAssemblerInterface::ADDR_STR(int cc, int Rd, argument
76 STR(cc, Rd, Rn, offset);
79 int Rd, int Rn, uint32_t Op2)
81 dataProcessing(opADD, cc, s, Rd, Rn, Op2);
84 int Rd, int Rn, uint32_t Op2)
86 dataProcessing(opSUB, cc, s, Rd, Rn, Op2);
78 ADDR_ADD(int cc, int s, int Rd, int Rn, uint32_t Op2) argument
83 ADDR_SUB(int cc, int s, int Rd, int Rn, uint32_t Op2) argument
H A DARMAssemblerProxy.cpp161 int Rd, int Rn, uint32_t Op2)
163 mTarget->dataProcessing(opcode, cc, s, Rd, Rn, Op2);
166 void ARMAssemblerProxy::MLA(int cc, int s, int Rd, int Rm, int Rs, int Rn) { argument
167 mTarget->MLA(cc, s, Rd, Rm, Rs, Rn);
169 void ARMAssemblerProxy::MUL(int cc, int s, int Rd, int Rm, int Rs) { argument
170 mTarget->MUL(cc, s, Rd, Rm, Rs);
212 void ARMAssemblerProxy::LDR(int cc, int Rd, int Rn, uint32_t offset) { argument
213 mTarget->LDR(cc, Rd, Rn, offset);
215 void ARMAssemblerProxy::LDRB(int cc, int Rd, int Rn, uint32_t offset) { argument
216 mTarget->LDRB(cc, Rd, R
160 dataProcessing( int opcode, int cc, int s, int Rd, int Rn, uint32_t Op2) argument
218 STR(int cc, int Rd, int Rn, uint32_t offset) argument
221 STRB(int cc, int Rd, int Rn, uint32_t offset) argument
224 LDRH(int cc, int Rd, int Rn, uint32_t offset) argument
227 LDRSB(int cc, int Rd, int Rn, uint32_t offset) argument
230 LDRSH(int cc, int Rd, int Rn, uint32_t offset) argument
233 STRH(int cc, int Rd, int Rn, uint32_t offset) argument
243 SWP(int cc, int Rn, int Rd, int Rm) argument
246 SWPB(int cc, int Rn, int Rd, int Rm) argument
257 CLZ(int cc, int Rd, int Rm) argument
260 QADD(int cc, int Rd, int Rm, int Rn) argument
263 QDADD(int cc, int Rd, int Rm, int Rn) argument
266 QSUB(int cc, int Rd, int Rm, int Rn) argument
269 QDSUB(int cc, int Rd, int Rm, int Rn) argument
272 SMUL(int cc, int xy, int Rd, int Rm, int Rs) argument
275 SMULW(int cc, int y, int Rd, int Rm, int Rs) argument
278 SMLA(int cc, int xy, int Rd, int Rm, int Rs, int Rn) argument
285 SMLAW(int cc, int y, int Rd, int Rm, int Rs, int Rn) argument
289 UXTB16(int cc, int Rd, int Rm, int rotate) argument
293 UBFX(int cc, int Rd, int Rn, int lsb, int width) argument
297 ADDR_LDR(int cc, int Rd, int Rn, uint32_t offset) argument
300 ADDR_STR(int cc, int Rd, int Rn, uint32_t offset) argument
303 ADDR_ADD(int cc, int s, int Rd, int Rn, uint32_t Op2) argument
306 ADDR_SUB(int cc, int s, int Rd, int Rn, uint32_t Op2) argument
[all...]
H A DARMAssemblerInterface.h124 int Rd, int Rn,
129 int Rd, int Rm, int Rs, int Rn) = 0;
131 int Rd, int Rm, int Rs) = 0;
154 virtual void LDR (int cc, int Rd,
156 virtual void LDRB(int cc, int Rd,
158 virtual void STR (int cc, int Rd,
160 virtual void STRB(int cc, int Rd,
163 virtual void LDRH (int cc, int Rd,
165 virtual void LDRSB(int cc, int Rd,
167 virtual void LDRSH(int cc, int Rd,
225 ADC(int cc, int s, int Rd, int Rn, uint32_t Op2) argument
229 ADD(int cc, int s, int Rd, int Rn, uint32_t Op2) argument
233 AND(int cc, int s, int Rd, int Rn, uint32_t Op2) argument
237 BIC(int cc, int s, int Rd, int Rn, uint32_t Op2) argument
241 EOR(int cc, int s, int Rd, int Rn, uint32_t Op2) argument
245 MOV(int cc, int s, int Rd, uint32_t Op2) argument
249 MVN(int cc, int s, int Rd, uint32_t Op2) argument
253 ORR(int cc, int s, int Rd, int Rn, uint32_t Op2) argument
257 RSB(int cc, int s, int Rd, int Rn, uint32_t Op2) argument
261 RSC(int cc, int s, int Rd, int Rn, uint32_t Op2) argument
265 SBC(int cc, int s, int Rd, int Rn, uint32_t Op2) argument
269 SUB(int cc, int s, int Rd, int Rn, uint32_t Op2) argument
289 SMULBB(int cc, int Rd, int Rm, int Rs) argument
291 SMULTB(int cc, int Rd, int Rm, int Rs) argument
293 SMULBT(int cc, int Rd, int Rm, int Rs) argument
295 SMULTT(int cc, int Rd, int Rm, int Rs) argument
298 SMULWB(int cc, int Rd, int Rm, int Rs) argument
300 SMULWT(int cc, int Rd, int Rm, int Rs) argument
304 SMLABB(int cc, int Rd, int Rm, int Rs, int Rn) argument
307 SMLATB(int cc, int Rd, int Rm, int Rs, int Rn) argument
310 SMLABT(int cc, int Rd, int Rm, int Rs, int Rn) argument
313 SMLATT(int cc, int Rd, int Rm, int Rs, int Rn) argument
330 SMLAWB(int cc, int Rd, int Rm, int Rs, int Rn) argument
333 SMLAWT(int cc, int Rd, int Rm, int Rs, int Rn) argument
[all...]
H A DArm64Assembler.cpp341 int s, int Rd, int Rn, uint32_t Op2)
398 case opADD: *mPC++ = A64_ADD_W(Rd, Rn, Rm, shift, amount); break;
399 case opAND: *mPC++ = A64_AND_W(Rd, Rn, Rm, shift, amount); break;
400 case opORR: *mPC++ = A64_ORR_W(Rd, Rn, Rm, shift, amount); break;
401 case opMVN: *mPC++ = A64_ORN_W(Rd, Rn, Rm, shift, amount); break;
402 case opSUB: *mPC++ = A64_SUB_W(Rd, Rn, Rm, shift, amount, s);break;
409 int s, int Rd, int Rn, uint32_t Op2)
416 Wd = Rd;
456 *mPC++ = A64_CSEL_W(Rd, mTmpReg1, Rd, c
340 dataProcessingCommon(int opcode, int s, int Rd, int Rn, uint32_t Op2) argument
408 dataProcessing(int opcode, int cc, int s, int Rd, int Rn, uint32_t Op2) argument
463 ADDR_ADD(int cc, int s, int Rd, int Rn, uint32_t Op2) argument
498 ADDR_SUB(int cc, int s, int Rd, int Rn, uint32_t Op2) argument
519 MLA(int cc, int s,int Rd, int Rm, int Rs, int Rn) argument
527 MUL(int cc, int s, int Rd, int Rm, int Rs) argument
577 dataTransfer(int op, int cc, int Rd, int Rn, uint32_t op_type, uint32_t size) argument
634 ADDR_LDR(int cc, int Rd, int Rn, uint32_t op_type) argument
638 ADDR_STR(int cc, int Rd, int Rn, uint32_t op_type) argument
642 LDR(int cc, int Rd, int Rn, uint32_t op_type) argument
646 LDRB(int cc, int Rd, int Rn, uint32_t op_type) argument
650 STR(int cc, int Rd, int Rn, uint32_t op_type) argument
655 STRB(int cc, int Rd, int Rn, uint32_t op_type) argument
660 LDRH(int cc, int Rd, int Rn, uint32_t op_type) argument
673 STRH(int cc, int Rd, int Rn, uint32_t op_type) argument
774 SMUL(int cc, int xy, int Rd, int Rm, int Rs) argument
794 SMULW(int cc, int y, int Rd, int Rm, int Rs) argument
810 SMLA(int cc, int xy, int Rd, int Rm, int Rs, int Rn) argument
837 UXTB16(int cc, int Rd, int Rm, int rotate) argument
852 UBFX(int cc, int Rd, int Rn, int lsb, int width) argument
1045 A64_ADD_X_Wm_SXTW(uint32_t Rd, uint32_t Rn, uint32_t Rm, uint32_t amount) argument
1056 A64_SUB_X_Wm_SXTW(uint32_t Rd, uint32_t Rn, uint32_t Rm, uint32_t amount) argument
1073 A64_ADD_X(uint32_t Rd, uint32_t Rn, uint32_t Rm, uint32_t shift, uint32_t amount) argument
1082 A64_ADD_IMM_X(uint32_t Rd, uint32_t Rn, uint32_t imm, uint32_t shift) argument
1089 A64_SUB_IMM_X(uint32_t Rd, uint32_t Rn, uint32_t imm, uint32_t shift) argument
1096 A64_ADD_W(uint32_t Rd, uint32_t Rn, uint32_t Rm, uint32_t shift, uint32_t amount) argument
1106 A64_SUB_W(uint32_t Rd, uint32_t Rn, uint32_t Rm, uint32_t shift, uint32_t amount, uint32_t setflag) argument
1127 A64_AND_W(uint32_t Rd, uint32_t Rn, uint32_t Rm, uint32_t shift, uint32_t amount) argument
1137 A64_ORR_W(uint32_t Rd, uint32_t Rn, uint32_t Rm, uint32_t shift, uint32_t amount) argument
1147 A64_ORN_W(uint32_t Rd, uint32_t Rn, uint32_t Rm, uint32_t shift, uint32_t amount) argument
1157 A64_CSEL_X(uint32_t Rd, uint32_t Rn, uint32_t Rm, uint32_t cond) argument
1164 A64_CSEL_W(uint32_t Rd, uint32_t Rn, uint32_t Rm, uint32_t cond) argument
1177 A64_MOVZ_X(uint32_t Rd, uint32_t imm, uint32_t shift) argument
1184 A64_MOVK_W(uint32_t Rd, uint32_t imm, uint32_t shift) argument
1191 A64_MOVZ_W(uint32_t Rd, uint32_t imm, uint32_t shift) argument
1198 A64_SMADDL(uint32_t Rd, uint32_t Rn, uint32_t Rm, uint32_t Ra) argument
1205 A64_MADD_W(uint32_t Rd, uint32_t Rn, uint32_t Rm, uint32_t Ra) argument
1212 A64_SBFM_W(uint32_t Rd, uint32_t Rn, uint32_t immr, uint32_t imms) argument
1219 A64_UBFM_W(uint32_t Rd, uint32_t Rn, uint32_t immr, uint32_t imms) argument
1226 A64_UBFM_X(uint32_t Rd, uint32_t Rn, uint32_t immr, uint32_t imms) argument
1234 A64_EXTR_W(uint32_t Rd, uint32_t Rn, uint32_t Rm, uint32_t lsb) argument
[all...]
H A DArm64Assembler.h99 int Rd, int Rn,
102 int Rd, int Rm, int Rs, int Rn);
104 int Rd, int Rm, int Rs);
123 virtual void ADDR_LDR(int cc, int Rd,
125 virtual void ADDR_ADD(int cc, int s, int Rd,
127 virtual void ADDR_SUB(int cc, int s, int Rd,
129 virtual void ADDR_STR (int cc, int Rd,
132 virtual void LDR (int cc, int Rd,
134 virtual void LDRB(int cc, int Rd,
136 virtual void STR (int cc, int Rd,
[all...]
H A DARMAssemblerProxy.h80 int Rd, int Rn,
83 int Rd, int Rm, int Rs, int Rn);
85 int Rd, int Rm, int Rs);
104 virtual void LDR (int cc, int Rd,
106 virtual void LDRB(int cc, int Rd,
108 virtual void STR (int cc, int Rd,
110 virtual void STRB(int cc, int Rd,
112 virtual void LDRH (int cc, int Rd,
114 virtual void LDRSB(int cc, int Rd,
116 virtual void LDRSH(int cc, int Rd,
[all...]
H A DARMAssembler.h91 int Rd, int Rn,
94 int Rd, int Rm, int Rs, int Rn);
96 int Rd, int Rm, int Rs);
115 virtual void LDR (int cc, int Rd,
117 virtual void LDRB(int cc, int Rd,
119 virtual void STR (int cc, int Rd,
121 virtual void STRB(int cc, int Rd,
123 virtual void LDRH (int cc, int Rd,
125 virtual void LDRSB(int cc, int Rd,
127 virtual void LDRSH(int cc, int Rd,
[all...]
H A DMIPS64Assembler.cpp344 void ArmToMips64Assembler::protectConditionalOperands(int Rd) argument
346 if (Rd == cond.r1) {
350 if (cond.type == CMP_COND && Rd == cond.r2) {
402 int s, int Rd, int Rn, uint32_t Op2)
407 protectConditionalOperands(Rd);
418 mMips->AND(Rd, Rn, src);
420 mMips->ANDI(Rd, Rn, src);
427 mMips->ADDU(Rd, Rn, src);
429 mMips->ADDIU(Rd, Rn, src);
436 mMips->SUBU(Rd, R
401 dataProcessing(int opcode, int cc, int s, int Rd, int Rn, uint32_t Op2) argument
604 MLA(int cc, int s, int Rd, int Rm, int Rs, int Rn) argument
618 MUL(int cc, int s, int Rd, int Rm, int Rs) argument
760 LDR(int cc, int Rd, int Rn, uint32_t offset) argument
794 LDRB(int cc, int Rd, int Rn, uint32_t offset) argument
823 STR(int cc, int Rd, int Rn, uint32_t offset) argument
859 STRB(int cc, int Rd, int Rn, uint32_t offset) argument
887 LDRH(int cc, int Rd, int Rn, uint32_t offset) argument
915 LDRSB(int cc, int Rd, int Rn, uint32_t offset) argument
922 LDRSH(int cc, int Rd, int Rn, uint32_t offset) argument
929 STRH(int cc, int Rd, int Rn, uint32_t offset) argument
997 SWP(int cc, int Rn, int Rd, int Rm) argument
1004 SWPB(int cc, int Rn, int Rd, int Rm) argument
1034 CLZ(int cc, int Rd, int Rm) argument
1040 QADD(int cc, int Rd, int Rm, int Rn) argument
1048 QDADD(int cc, int Rd, int Rm, int Rn) argument
1056 QSUB(int cc, int Rd, int Rm, int Rn) argument
1064 QDSUB(int cc, int Rd, int Rm, int Rn) argument
1073 SMUL(int cc, int xy, int Rd, int Rm, int Rs) argument
1102 SMULW(int cc, int y, int Rd, int Rm, int Rs) argument
1121 SMLA(int cc, int xy, int Rd, int Rm, int Rs, int Rn) argument
1160 SMLAW(int cc, int y, int Rd, int Rm, int Rs, int Rn) argument
1170 UXTB16(int cc, int Rd, int Rm, int rotate) argument
1183 UBFX(int cc, int Rd, int Rn, int lsb, int width) argument
1196 ADDR_ADD(int cc, int s, int Rd, int Rn, uint32_t Op2) argument
1204 ADDR_SUB(int cc, int s, int Rd, int Rn, uint32_t Op2) argument
1212 ADDR_LDR(int cc, int Rd, int Rn, uint32_t offset) argument
1245 ADDR_STR(int cc, int Rd, int Rn, uint32_t offset) argument
1383 DADDU(int Rd, int Rs, int Rt) argument
1394 DSUBU(int Rd, int Rs, int Rt) argument
1405 MUL(int Rd, int Rs, int Rt) argument
1411 MUH(int Rd, int Rs, int Rt) argument
1417 CLO(int Rd, int Rs) argument
1423 CLZ(int Rd, int Rs) argument
[all...]
H A DMIPSAssembler.cpp355 void ArmToMipsAssembler::protectConditionalOperands(int Rd) argument
357 if (Rd == cond.r1) {
361 if (cond.type == CMP_COND && Rd == cond.r2) {
418 int s, int Rd, int Rn, uint32_t Op2)
424 protectConditionalOperands(Rd);
435 mMips->AND(Rd, Rn, src);
437 mMips->ANDI(Rd, Rn, src);
444 mMips->ADDU(Rd, Rn, src);
446 mMips->ADDIU(Rd, Rn, src);
453 mMips->SUBU(Rd, R
417 dataProcessing(int opcode, int cc, int s, int Rd, int Rn, uint32_t Op2) argument
613 MLA(int cc, int s, int Rd, int Rm, int Rs, int Rn) argument
626 MUL(int cc, int s, int Rd, int Rm, int Rs) argument
768 LDR(int cc, int Rd, int Rn, uint32_t offset) argument
802 LDRB(int cc, int Rd, int Rn, uint32_t offset) argument
831 STR(int cc, int Rd, int Rn, uint32_t offset) argument
867 STRB(int cc, int Rd, int Rn, uint32_t offset) argument
895 LDRH(int cc, int Rd, int Rn, uint32_t offset) argument
923 LDRSB(int cc, int Rd, int Rn, uint32_t offset) argument
930 LDRSH(int cc, int Rd, int Rn, uint32_t offset) argument
937 STRH(int cc, int Rd, int Rn, uint32_t offset) argument
1005 SWP(int cc, int Rn, int Rd, int Rm) argument
1012 SWPB(int cc, int Rn, int Rd, int Rm) argument
1042 CLZ(int cc, int Rd, int Rm) argument
1048 QADD(int cc, int Rd, int Rm, int Rn) argument
1056 QDADD(int cc, int Rd, int Rm, int Rn) argument
1064 QSUB(int cc, int Rd, int Rm, int Rn) argument
1072 QDSUB(int cc, int Rd, int Rm, int Rn) argument
1081 SMUL(int cc, int xy, int Rd, int Rm, int Rs) argument
1120 SMULW(int cc, int y, int Rd, int Rm, int Rs) argument
1140 SMLA(int cc, int xy, int Rd, int Rm, int Rs, int Rn) argument
1189 SMLAW(int cc, int y, int Rd, int Rm, int Rs, int Rn) argument
1199 UXTB16(int cc, int Rd, int Rm, int rotate) argument
1210 UBFX(int cc, int Rd, int Rn, int lsb, int width) argument
1445 ADDU(int Rd, int Rs, int Rt) argument
1458 SUBU(int Rd, int Rs, int Rt) argument
1471 NEGU(int Rd, int Rs) argument
1476 MUL(int Rd, int Rs, int Rt) argument
1514 SEB(int Rd, int Rt) argument
1520 SEH(int Rd, int Rt) argument
1533 SLT(int Rd, int Rs, int Rt) argument
1545 SLTU(int Rd, int Rs, int Rt) argument
1563 AND(int Rd, int Rs, int Rt) argument
1575 OR(int Rd, int Rs, int Rt) argument
1586 NOR(int Rd, int Rs, int Rt) argument
1592 NOT(int Rd, int Rs) argument
1597 XOR(int Rd, int Rs, int Rt) argument
1608 SLL(int Rd, int Rt, int shft) argument
1614 SLLV(int Rd, int Rt, int Rs) argument
1620 SRL(int Rd, int Rt, int shft) argument
1626 SRLV(int Rd, int Rt, int Rs) argument
1632 SRA(int Rd, int Rt, int shft) argument
1638 SRAV(int Rd, int Rt, int Rs) argument
1644 ROTR(int Rd, int Rt, int shft) argument
1651 ROTRV(int Rd, int Rt, int Rs) argument
1659 RORsyn(int Rd, int Rt, int Rs) argument
1669 RORIsyn(int Rd, int Rt, int rot) argument
1678 CLO(int Rd, int Rs) argument
1685 CLZ(int Rd, int Rs) argument
1692 WSBH(int Rd, int Rt) argument
1759 MOVE(int Rd, int Rs) argument
1766 MOVN(int Rd, int Rs, int Rt) argument
1772 MOVZ(int Rd, int Rs, int Rt) argument
1778 MFHI(int Rd) argument
1783 MFLO(int Rd) argument
[all...]
H A DMIPSAssembler.h91 int Rd, int Rn,
94 int Rd, int Rm, int Rs, int Rn);
96 int Rd, int Rm, int Rs);
115 virtual void LDR (int cc, int Rd,
117 virtual void LDRB(int cc, int Rd,
119 virtual void STR (int cc, int Rd,
121 virtual void STRB(int cc, int Rd,
123 virtual void LDRH (int cc, int Rd,
125 virtual void LDRSB(int cc, int Rd,
127 virtual void LDRSH(int cc, int Rd,
[all...]
H A DARMAssembler.cpp217 int s, int Rd, int Rn, uint32_t Op2)
219 *mPC++ = (cc<<28) | (opcode<<21) | (s<<20) | (Rn<<16) | (Rd<<12) | Op2;
229 int Rd, int Rm, int Rs, int Rn) {
230 if (Rd == Rm) { int t = Rm; Rm=Rs; Rs=t; }
231 LOG_FATAL_IF(Rd==Rm, "MLA(r%u,r%u,r%u,r%u)", Rd,Rm,Rs,Rn);
233 (Rd<<16) | (Rn<<12) | (Rs<<8) | 0x90 | Rm;
236 int Rd, int Rm, int Rs) {
237 if (Rd == Rm) { int t = Rm; Rm=Rs; Rs=t; }
238 LOG_FATAL_IF(Rd
216 dataProcessing(int opcode, int cc, int s, int Rd, int Rn, uint32_t Op2) argument
228 MLA(int cc, int s, int Rd, int Rm, int Rs, int Rn) argument
235 MUL(int cc, int s, int Rd, int Rm, int Rs) argument
299 LDR(int cc, int Rd, int Rn, uint32_t offset) argument
302 LDRB(int cc, int Rd, int Rn, uint32_t offset) argument
305 STR(int cc, int Rd, int Rn, uint32_t offset) argument
308 STRB(int cc, int Rd, int Rn, uint32_t offset) argument
312 LDRH(int cc, int Rd, int Rn, uint32_t offset) argument
315 LDRSB(int cc, int Rd, int Rn, uint32_t offset) argument
318 LDRSH(int cc, int Rd, int Rn, uint32_t offset) argument
321 STRH(int cc, int Rd, int Rn, uint32_t offset) argument
355 SWP(int cc, int Rn, int Rd, int Rm) argument
358 SWPB(int cc, int Rn, int Rd, int Rm) argument
377 CLZ(int cc, int Rd, int Rm) argument
382 QADD(int cc, int Rd, int Rm, int Rn) argument
387 QDADD(int cc, int Rd, int Rm, int Rn) argument
392 QSUB(int cc, int Rd, int Rm, int Rn) argument
397 QDSUB(int cc, int Rd, int Rm, int Rn) argument
402 SMUL(int cc, int xy, int Rd, int Rm, int Rs) argument
408 SMULW(int cc, int y, int Rd, int Rm, int Rs) argument
414 SMLA(int cc, int xy, int Rd, int Rm, int Rs, int Rn) argument
426 SMLAW(int cc, int y, int Rd, int Rm, int Rs, int Rn) argument
437 UXTB16(int cc, int Rd, int Rm, int rotate) argument
447 UBFX(int cc, int Rd, int Rn, int lsb, int width) argument
[all...]
H A DMIPS64Assembler.h96 int Rd, int Rn,
99 int Rd, int Rm, int Rs, int Rn);
101 int Rd, int Rm, int Rs);
120 virtual void LDR (int cc, int Rd,
122 virtual void LDRB(int cc, int Rd,
124 virtual void STR (int cc, int Rd,
126 virtual void STRB(int cc, int Rd,
128 virtual void LDRH (int cc, int Rd,
130 virtual void LDRSB(int cc, int Rd,
132 virtual void LDRSH(int cc, int Rd,
[all...]
/system/core/libpixelflinger/tests/arch-mips64/assembler/
H A Dmips64_assembler_test.cpp372 void dataOpTest(dataOpTest_t test, ArmToMips64Assembler *a64asm, uint32_t Rd = R_v1,
386 regs[Rd] = test.RdValue;
412 case INSTR_ADD: a64asm->ADD(test.cond, test.setFlags, Rd,Rn,op2); break;
413 case INSTR_SUB: a64asm->SUB(test.cond, test.setFlags, Rd,Rn,op2); break;
414 case INSTR_RSB: a64asm->RSB(test.cond, test.setFlags, Rd,Rn,op2); break;
415 case INSTR_AND: a64asm->AND(test.cond, test.setFlags, Rd,Rn,op2); break;
416 case INSTR_ORR: a64asm->ORR(test.cond, test.setFlags, Rd,Rn,op2); break;
417 case INSTR_BIC: a64asm->BIC(test.cond, test.setFlags, Rd,Rn,op2); break;
418 case INSTR_MUL: a64asm->MUL(test.cond, test.setFlags, Rd,Rm,Rs); break;
419 case INSTR_MLA: a64asm->MLA(test.cond, test.setFlags, Rd,R
[all...]
/system/core/libpixelflinger/tests/arch-arm64/assembler/
H A Darm64_assembler_test.cpp414 void dataOpTest(dataOpTest_t test, ARMAssemblerInterface *a64asm, uint32_t Rd = 0,
428 regs[Rd] = test.RdValue;
450 case INSTR_ADD: a64asm->ADD(test.cond, test.setFlags, Rd,Rn,op2); break;
451 case INSTR_SUB: a64asm->SUB(test.cond, test.setFlags, Rd,Rn,op2); break;
452 case INSTR_RSB: a64asm->RSB(test.cond, test.setFlags, Rd,Rn,op2); break;
453 case INSTR_AND: a64asm->AND(test.cond, test.setFlags, Rd,Rn,op2); break;
454 case INSTR_ORR: a64asm->ORR(test.cond, test.setFlags, Rd,Rn,op2); break;
455 case INSTR_BIC: a64asm->BIC(test.cond, test.setFlags, Rd,Rn,op2); break;
456 case INSTR_MUL: a64asm->MUL(test.cond, test.setFlags, Rd,Rm,Rs); break;
457 case INSTR_MLA: a64asm->MLA(test.cond, test.setFlags, Rd,R
753 uint32_t Rd, Rm, Rs, Rn; local
[all...]

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