Search

Home

Sort by

Searched refs:Rt (Results 1 - 6 of 6) sorted by relevance

/system/core/libpixelflinger/codeflinger/
H A D	MIPSAssembler.h	`273 void ADDU(int Rd, int Rs, int Rt); 274 void ADDIU(int Rt, int Rs, int16_t imm); 275 void SUBU(int Rd, int Rs, int Rt); 276 void SUBIU(int Rt, int Rs, int16_t imm); 278 void MUL(int Rd, int Rs, int Rt); 279 void MULT(int Rs, int Rt); // dest is hi,lo 280 void MULTU(int Rs, int Rt); // dest is hi,lo 281 void MADD(int Rs, int Rt); // hi,lo = hi,lo + Rs * Rt 282 void MADDU(int Rs, int Rt); // h [all...]`
H A D	MIPSAssembler.cpp	1445 void MIPSAssembler::ADDU(int Rd, int Rs, int Rt) argument 1448 \| (Rs<<RS_SHF) \| (Rt<<RT_SHF) \| (Rd<<RD_SHF); 1452 void MIPSAssembler::ADDIU(int Rt, int Rs, int16_t imm) argument 1454 mPC++ = (addiu_op<<OP_SHF) \| (Rt<<RT_SHF) \| (Rs<<RS_SHF) \| (imm & MSK_16); 1458 void MIPSAssembler::SUBU(int Rd, int Rs, int Rt) argument 1461 (Rs<<RS_SHF) \| (Rt<<RT_SHF) \| (Rd<<RD_SHF) ; 1465 void MIPSAssembler::SUBIU(int Rt, int Rs, int16_t imm) // really addiu(d, s, -j) argument 1467 mPC++ = (addiu_op<<OP_SHF) \| (Rt<<RT_SHF) \| (Rs<<RS_SHF) \| ((-imm) & MSK_16); 1476 void MIPSAssembler::MUL(int Rd, int Rs, int Rt) argument 1479 (Rs<<RS_SHF) \| (Rt<<RT_SH 1482 MULT(int Rs, int Rt) argument 1487 MULTU(int Rs, int Rt) argument 1492 MADD(int Rs, int Rt) argument 1497 MADDU(int Rs, int Rt) argument 1503 MSUB(int Rs, int Rt) argument 1508 MSUBU(int Rs, int Rt) argument 1514 SEB(int Rd, int Rt) argument 1520 SEH(int Rd, int Rt) argument 1533 SLT(int Rd, int Rs, int Rt) argument 1539 SLTI(int Rt, int Rs, int16_t imm) argument 1545 SLTU(int Rd, int Rs, int Rt) argument 1551 SLTIU(int Rt, int Rs, int16_t imm) argument 1563 AND(int Rd, int Rs, int Rt) argument 1569 ANDI(int Rt, int Rs, uint16_t imm) argument 1575 OR(int Rd, int Rs, int Rt) argument 1581 ORI(int Rt, int Rs, uint16_t imm) argument 1586 NOR(int Rd, int Rs, int Rt) argument 1597 XOR(int Rd, int Rs, int Rt) argument 1603 XORI(int Rt, int Rs, uint16_t imm) argument 1608 SLL(int Rd, int Rt, int shft) argument 1614 SLLV(int Rd, int Rt, int Rs) argument 1620 SRL(int Rd, int Rt, int shft) argument 1626 SRLV(int Rd, int Rt, int Rs) argument 1632 SRA(int Rd, int Rt, int shft) argument 1638 SRAV(int Rd, int Rt, int Rs) argument 1644 ROTR(int Rd, int Rt, int shft) argument 1651 ROTRV(int Rd, int Rt, int Rs) argument 1659 RORsyn(int Rd, int Rt, int Rs) argument 1669 RORIsyn(int Rd, int Rt, int rot) argument 1692 WSBH(int Rd, int Rt) argument 1705 LW(int Rt, int Rbase, int16_t offset) argument 1710 SW(int Rt, int Rbase, int16_t offset) argument 1716 LB(int Rt, int Rbase, int16_t offset) argument 1721 LBU(int Rt, int Rbase, int16_t offset) argument 1726 SB(int Rt, int Rbase, int16_t offset) argument 1732 LH(int Rt, int Rbase, int16_t offset) argument 1737 LHU(int Rt, int Rbase, int16_t offset) argument 1742 SH(int Rt, int Rbase, int16_t offset) argument 1747 LUI(int Rt, int16_t offset) argument 1766 MOVN(int Rd, int Rs, int Rt) argument 1772 MOVZ(int Rd, int Rs, int Rt) argument 1818 BEQ(int Rs, int Rt, const char* label) argument 1825 BNE(int Rs, int Rt, const char* label) argument 1884 BGE(int Rs, int Rt, const char* label) argument 1890 BGEU(int Rs, int Rt, const char* label) argument 1896 BGT(int Rs, int Rt, const char* label) argument 1902 BGTU(int Rs, int Rt, const char* label) argument 1908 BLE(int Rs, int Rt, const char* label) argument 1914 BLEU(int Rs, int Rt, const char* label) argument 1920 BLT(int Rs, int Rt, const char* label) argument 1926 BLTU(int Rs, int Rt, const char* label) argument [all...]
H A D	MIPS64Assembler.h	`273 void DADDU(int Rd, int Rs, int Rt); 274 void DADDIU(int Rt, int Rs, int16_t imm); 275 void DSUBU(int Rd, int Rs, int Rt); 276 void DSUBIU(int Rt, int Rs, int16_t imm); 277 virtual void MUL(int Rd, int Rs, int Rt); 278 void MUH(int Rd, int Rs, int Rt); 293 void LD(int Rt, int Rbase, int16_t offset); 294 void SD(int Rt, int Rbase, int16_t offset); 295 virtual void LUI(int Rt, int16_t offset);`
H A D	MIPS64Assembler.cpp	1383 void MIPS64Assembler::DADDU(int Rd, int Rs, int Rt) argument 1386 \| (Rs<<RS_SHF) \| (Rt<<RT_SHF) \| (Rd<<RD_SHF); 1389 void MIPS64Assembler::DADDIU(int Rt, int Rs, int16_t imm) argument 1391 mPC++ = (daddiu_op<<OP_SHF) \| (Rt<<RT_SHF) \| (Rs<<RS_SHF) \| (imm & MSK_16); 1394 void MIPS64Assembler::DSUBU(int Rd, int Rs, int Rt) argument 1397 (Rs<<RS_SHF) \| (Rt<<RT_SHF) \| (Rd<<RD_SHF) ; 1400 void MIPS64Assembler::DSUBIU(int Rt, int Rs, int16_t imm) // really addiu(d, s, -j) argument 1402 mPC++ = (daddiu_op<<OP_SHF) \| (Rt<<RT_SHF) \| (Rs<<RS_SHF) \| ((-imm) & MSK_16); 1405 void MIPS64Assembler::MUL(int Rd, int Rs, int Rt) argument 1408 (Rs<<RS_SHF) \| (Rt<<RT_SH 1411 MUH(int Rd, int Rs, int Rt) argument 1429 LD(int Rt, int Rbase, int16_t offset) argument 1434 SD(int Rt, int Rbase, int16_t offset) argument 1439 LUI(int Rt, int16_t offset) argument [all...]
H A D	Arm64Assembler.cpp	1003 uint32_t size, uint32_t Rt, 1009 dataTransferOpName[op], Rt, Rn, Rm); 1010 return(dataTransferOpCode[op] \| (Rm << 16) \| (Rn << 5) \| Rt); 1015 dataTransferOpName[op], Rt, Rn, Rm); 1016 return(dataTransferOpCode[op] \| (0x1<<30) \| (Rm<<16) \| (Rn<<5)\|Rt); 1020 uint32_t ArmToArm64Assembler::A64_STR_IMM_PreIndex(uint32_t Rt, argument 1024 LOG_INSTR("STR W%d, [SP, #%d]!\n", Rt, simm); 1026 LOG_INSTR("STR W%d, [X%d, #%d]!\n", Rt, Rn, simm); 1029 return (0xB8 << 24) \| (imm9 << 12) \| (0x3 << 10) \| (Rn << 5) \| Rt; 1032 uint32_t ArmToArm64Assembler::A64_LDR_IMM_PostIndex(uint32_t Rt, argument 1002 A64_LDRSTR_Wm_SXTW_0(uint32_t op, uint32_t size, uint32_t Rt, uint32_t Rn, uint32_t Rm) argument [all...]
H A D	Arm64Assembler.h	`198 uint32_t size, uint32_t Rt, 201 uint32_t A64_STR_IMM_PreIndex(uint32_t Rt, uint32_t Rn, int32_t simm); 202 uint32_t A64_LDR_IMM_PostIndex(uint32_t Rt,uint32_t Rn, int32_t simm);`

Completed in 14 milliseconds