Searched refs:LoadConst64 (Results 1 - 7 of 7) sorted by last modified time
| /art/compiler/optimizing/ |
| H A D | code_generator_mips.cc | 929 __ LoadConst64(r_h, r_l, value);
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| H A D | code_generator_mips64.cc | 696 __ LoadConst64(gpr, value);
775 __ LoadConst64(gpr, value);
1716 __ LoadConst64(rhs, value);
2025 __ LoadConst64(TMP, magic);
2046 __ LoadConst64(TMP, imm);
2269 __ LoadConst64(rhs_reg, rhs_imm);
2287 __ LoadConst64(rhs_reg, rhs_imm);
2311 __ LoadConst64(rhs_reg, rhs_imm);
2333 __ LoadConst64(rhs_reg, rhs_imm);
2363 __ LoadConst64(rhs_re
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| H A D | intrinsics_mips64.cc | 769 __ LoadConst64(TMP, kPrimLongMax);
1412 __ LoadConst64(out, 1);
1460 __ LoadConst64(out, 1);
1465 __ LoadConst64(out, 0);
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| /art/compiler/utils/mips/ |
| H A D | assembler_mips.cc | 1373 void MipsAssembler::LoadConst64(Register reg_hi, Register reg_lo, int64_t value) { function in class:art::mips::MipsAssembler
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| H A D | assembler_mips.h | 357 void LoadConst64(Register reg_hi, Register reg_lo, int64_t value);
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| /art/compiler/utils/mips64/ |
| H A D | assembler_mips64.cc | 1049 void Mips64Assembler::LoadConst64(GpuRegister rd, int64_t value) { function in class:art::mips64::Mips64Assembler
1165 LoadConst64(rtmp, value);
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| H A D | assembler_mips64.h | 325 void LoadConst64(GpuRegister rd, int64_t value); // MIPS64
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