| /art/compiler/optimizing/ |
| H A D | code_generator_mips.cc | 772 __ Lw(TMP, SP, ofs + 4);
786 __ Lw(reg, SP, ofs);
3458 __ Lw(ZERO, locations->GetTemp(0).AsRegister<Register>(), 0);
3585 __ Lw(ZERO, locations->GetTemp(0).AsRegister<Register>(), 0);
3868 __ Lw(reg, SP, kCurrentMethodStackOffset);
4270 __ Lw(current_method_register, SP, kCurrentMethodStackOffset);
4380 __ Lw(ZERO, obj.AsRegister<Register>(), 0);
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| H A D | code_generator_mips64.cc | 3535 __ Lw(ZERO, obj.AsRegister<GpuRegister>(), 0);
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| H A D | intrinsics_mips.cc | 1347 __ Lw(out, adr, 0);
1366 __ Lw(out_lo, adr, 0);
1367 __ Lw(out_hi, adr, 4);
1518 __ Lw(trg_lo, TMP, 0);
1519 __ Lw(trg_hi, TMP, 4);
1530 __ Lw(trg, TMP, 0);
1910 __ Lw(TMP, obj, count_offset);
2016 __ Lw(temp1, str, class_offset);
2017 __ Lw(temp2, arg, class_offset);
2021 __ Lw(temp
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| H A D | intrinsics_mips64.cc | 829 __ Lw(out, adr, 0);
954 __ Lw(trg, TMP, 0);
1321 __ Lw(TMP, obj, count_offset);
1426 __ Lw(temp1, str, class_offset);
1427 __ Lw(temp2, arg, class_offset);
1431 __ Lw(temp1, str, count_offset);
1432 __ Lw(temp2, arg, count_offset);
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| /art/compiler/utils/mips/ |
| H A D | assembler_mips.cc | 425 void MipsAssembler::Lw(Register rt, Register rs, uint16_t imm16) { function in class:art::mips::MipsAssembler
1349 Lw(rd, SP, 0);
1354 Lw(rd, SP, 0);
2083 Lw(RA, SP, 0);
2099 Lw(RA, SP, 0);
2290 Lw(reg, base, offset);
2296 Lw(static_cast<Register>(reg + 1), base, offset + kMipsWordSize);
2297 Lw(reg, base, offset);
2299 Lw(reg, base, offset);
2300 Lw(static_cas
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| H A D | assembler_mips.h | 180 void Lw(Register rt, Register rs, uint16_t imm16);
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| H A D | assembler_mips_test.cc | 444 TEST_F(AssemblerMIPSTest, Lw) {
445 DriverStr(RepeatRRIb(&mips::MipsAssembler::Lw, -16, "lw ${reg1}, {imm}(${reg2})"), "Lw");
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| /art/compiler/utils/mips64/ |
| H A D | assembler_mips64.cc | 428 void Mips64Assembler::Lw(GpuRegister rt, GpuRegister rs, uint16_t imm16) { function in class:art::mips64::Mips64Assembler
1829 Lw(reg, base, offset);
1868 Lw(TMP2, base, offset + kMips64WordSize);
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| H A D | assembler_mips64.h | 187 void Lw(GpuRegister rt, GpuRegister rs, uint16_t imm16);
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