Searched refs:Srl (Results 1 - 9 of 9) sorted by path

/art/compiler/optimizing/
H A Dcode_generator_mips.cc986 __ Srl(temp, object, gc::accounting::CardTable::kCardShift);
1453 __ Srl(dst, lhs, shift_value);
1459 __ Srl(dst, lhs, shift_value);
1500 __ Srl(dst_high, lhs_low, kMipsBitsPerWord - shift_value);
1504 __ Srl(dst_low, lhs_low, shift_value);
1508 __ Srl(dst_low, lhs_low, shift_value);
1510 __ Srl(dst_high, lhs_high, shift_value);
1512 __ Srl(dst_low, lhs_low, shift_value);
1514 __ Srl(dst_high, lhs_high, shift_value);
1520 __ Srl(TM
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H A Dcode_generator_mips64.cc1200 __ Srl(dst, lhs, shift_value);
1893 __ Srl(TMP, dividend, 31);
1896 __ Srl(TMP, TMP, 32 - ctz_imm);
1936 __ Srl(TMP, TMP, 32 - ctz_imm);
1942 __ Srl(out, out, 32 - ctz_imm);
H A Dintrinsics_mips.cc268 __ Srl(out, out, 24);
282 __ Srl(out, in, 16);
288 __ Srl(out, out, 8);
299 __ Srl(out, out, 4);
305 __ Srl(out, out, 2);
311 __ Srl(out, out, 1);
334 __ Srl(AT, in_lo, 16);
339 __ Srl(out_lo, in_hi, 16); // Here we are finally done reading
347 __ Srl(TMP, TMP, 8);
353 __ Srl(out_l
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/art/compiler/utils/mips/
H A Dassembler_mips.cc372 void MipsAssembler::Srl(Register rd, Register rt, int shamt) { function in class:art::mips::MipsAssembler
H A Dassembler_mips.h168 void Srl(Register rd, Register rt, int shamt);
H A Dassembler_mips_test.cc362 TEST_F(AssemblerMIPSTest, Srl) {
363 DriverStr(RepeatRRIb(&mips::MipsAssembler::Srl, 5, "srl ${reg1}, ${reg2}, {imm}"), "Srl");
/art/compiler/utils/mips64/
H A Dassembler_mips64.cc344 void Mips64Assembler::Srl(GpuRegister rd, GpuRegister rt, int shamt) { function in class:art::mips64::Mips64Assembler
H A Dassembler_mips64.h165 void Srl(GpuRegister rd, GpuRegister rt, int shamt);
H A Dassembler_mips64_test.cc900 TEST_F(AssemblerMIPS64Test, Srl) {
901 DriverStr(RepeatRRIb(&mips64::Mips64Assembler::Srl, 5, "srl ${reg1}, ${reg2}, {imm}"), "srl");

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