Searched refs:imm16 (Results 1 - 10 of 10) sorted by last modified time

/art/compiler/utils/arm/
H A Dassembler_arm.h547 virtual void movw(Register rd, uint16_t imm16, Condition cond = AL) = 0;
548 virtual void movt(Register rd, uint16_t imm16, Condition cond = AL) = 0;
605 virtual void bkpt(uint16_t imm16) = 0;
H A Dassembler_arm32.cc735 void Arm32Assembler::movw(Register rd, uint16_t imm16, Condition cond) { argument
738 B25 | B24 | ((imm16 >> 12) << 16) |
739 static_cast<int32_t>(rd) << kRdShift | (imm16 & 0xfff);
744 void Arm32Assembler::movt(Register rd, uint16_t imm16, Condition cond) { argument
747 B25 | B24 | B22 | ((imm16 >> 12) << 16) |
748 static_cast<int32_t>(rd) << kRdShift | (imm16 & 0xfff);
1275 void Arm32Assembler::bkpt(uint16_t imm16) { argument
1277 ((imm16 >> 4) << 8) | B6 | B5 | B4 | (imm16 & 0xf);
H A Dassembler_arm32.h90 void movw(Register rd, uint16_t imm16, Condition cond = AL) OVERRIDE;
91 void movt(Register rd, uint16_t imm16, Condition cond = AL) OVERRIDE;
146 void bkpt(uint16_t imm16) OVERRIDE;
H A Dassembler_thumb2.cc2629 void Thumb2Assembler::movw(Register rd, uint16_t imm16, Condition cond) { argument
2632 uint32_t imm4 = (imm16 >> 12) & 15U /* 0b1111 */;
2633 uint32_t i = (imm16 >> 11) & 1U /* 0b1 */;
2634 uint32_t imm3 = (imm16 >> 8) & 7U /* 0b111 */;
2635 uint32_t imm8 = imm16 & 0xff;
2647 void Thumb2Assembler::movt(Register rd, uint16_t imm16, Condition cond) { argument
2650 uint32_t imm4 = (imm16 >> 12) & 15U /* 0b1111 */;
2651 uint32_t i = (imm16 >> 11) & 1U /* 0b1 */;
2652 uint32_t imm3 = (imm16 >> 8) & 7U /* 0b111 */;
2653 uint32_t imm8 = imm16
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H A Dassembler_thumb2.h120 void movw(Register rd, uint16_t imm16, Condition cond = AL) OVERRIDE;
121 void movt(Register rd, uint16_t imm16, Condition cond = AL) OVERRIDE;
187 void bkpt(uint16_t imm16) OVERRIDE;
443 // MOV rX, imm16 + ADD rX, pc + LDR rX, [rX]; X < 8; up to 64KiB offset; 8 bytes.
448 // MOV rX, imm16 + MOVT rX, imm16 + ADD rX, pc + LDR rX, [rX]; any offset; 14 bytes.
456 // MOV rX, imm16 + ADD rX, pc; 64KiB offset. 6 bytes.
458 // MOV rX, imm16 + MOVT rX, imm16 + ADD rX, pc; any offset; 10 bytes.
466 // MOV ip, imm16
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/art/compiler/utils/mips/
H A Dassembler_mips.cc190 void MipsAssembler::Addiu(Register rt, Register rs, uint16_t imm16) { argument
191 EmitI(0x9, rs, rt, imm16);
286 void MipsAssembler::Andi(Register rt, Register rs, uint16_t imm16) { argument
287 EmitI(0xc, rs, rt, imm16);
294 void MipsAssembler::Ori(Register rt, Register rs, uint16_t imm16) { argument
295 EmitI(0xd, rs, rt, imm16);
302 void MipsAssembler::Xori(Register rt, Register rs, uint16_t imm16) { argument
303 EmitI(0xe, rs, rt, imm16);
417 void MipsAssembler::Lb(Register rt, Register rs, uint16_t imm16) { argument
418 EmitI(0x20, rs, rt, imm16);
421 Lh(Register rt, Register rs, uint16_t imm16) argument
425 Lw(Register rt, Register rs, uint16_t imm16) argument
429 Lwl(Register rt, Register rs, uint16_t imm16) argument
434 Lwr(Register rt, Register rs, uint16_t imm16) argument
439 Lbu(Register rt, Register rs, uint16_t imm16) argument
443 Lhu(Register rt, Register rs, uint16_t imm16) argument
447 Lui(Register rt, uint16_t imm16) argument
466 Sb(Register rt, Register rs, uint16_t imm16) argument
470 Sh(Register rt, Register rs, uint16_t imm16) argument
474 Sw(Register rt, Register rs, uint16_t imm16) argument
478 Swl(Register rt, Register rs, uint16_t imm16) argument
483 Swr(Register rt, Register rs, uint16_t imm16) argument
488 LlR2(Register rt, Register base, int16_t imm16) argument
493 ScR2(Register rt, Register base, int16_t imm16) argument
518 Slti(Register rt, Register rs, uint16_t imm16) argument
522 Sltiu(Register rt, Register rs, uint16_t imm16) argument
526 B(uint16_t imm16) argument
530 Beq(Register rs, Register rt, uint16_t imm16) argument
534 Bne(Register rs, Register rt, uint16_t imm16) argument
538 Beqz(Register rt, uint16_t imm16) argument
542 Bnez(Register rt, uint16_t imm16) argument
546 Bltz(Register rt, uint16_t imm16) argument
550 Bgez(Register rt, uint16_t imm16) argument
554 Blez(Register rt, uint16_t imm16) argument
558 Bgtz(Register rt, uint16_t imm16) argument
562 Bc1f(uint16_t imm16) argument
566 Bc1f(int cc, uint16_t imm16) argument
572 Bc1t(uint16_t imm16) argument
576 Bc1t(int cc, uint16_t imm16) argument
606 Auipc(Register rs, uint16_t imm16) argument
622 Jic(Register rt, uint16_t imm16) argument
627 Jialc(Register rt, uint16_t imm16) argument
632 Bltc(Register rs, Register rt, uint16_t imm16) argument
640 Bltzc(Register rt, uint16_t imm16) argument
646 Bgtzc(Register rt, uint16_t imm16) argument
652 Bgec(Register rs, Register rt, uint16_t imm16) argument
660 Bgezc(Register rt, uint16_t imm16) argument
666 Blezc(Register rt, uint16_t imm16) argument
672 Bltuc(Register rs, Register rt, uint16_t imm16) argument
680 Bgeuc(Register rs, Register rt, uint16_t imm16) argument
688 Beqc(Register rs, Register rt, uint16_t imm16) argument
696 Bnec(Register rs, Register rt, uint16_t imm16) argument
716 Bc1eqz(FRegister ft, uint16_t imm16) argument
721 Bc1nez(FRegister ft, uint16_t imm16) argument
726 EmitBcondR2(BranchCondition cond, Register rs, Register rt, uint16_t imm16) argument
760 Bc1f(static_cast<int>(rs), imm16); local
764 Bc1t(static_cast<int>(rs), imm16); local
1306 Lwc1(FRegister ft, Register rs, uint16_t imm16) argument
1310 Ldc1(FRegister ft, Register rs, uint16_t imm16) argument
1314 Swc1(FRegister ft, Register rs, uint16_t imm16) argument
1318 Sdc1(FRegister ft, Register rs, uint16_t imm16) argument
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H A Dassembler_mips.h125 void Addiu(Register rt, Register rs, uint16_t imm16);
146 void Andi(Register rt, Register rs, uint16_t imm16);
148 void Ori(Register rt, Register rs, uint16_t imm16);
150 void Xori(Register rt, Register rs, uint16_t imm16);
178 void Lb(Register rt, Register rs, uint16_t imm16);
179 void Lh(Register rt, Register rs, uint16_t imm16);
180 void Lw(Register rt, Register rs, uint16_t imm16);
181 void Lwl(Register rt, Register rs, uint16_t imm16);
182 void Lwr(Register rt, Register rs, uint16_t imm16);
183 void Lbu(Register rt, Register rs, uint16_t imm16);
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/art/compiler/utils/mips64/
H A Dassembler_mips64.cc183 void Mips64Assembler::Addiu(GpuRegister rt, GpuRegister rs, uint16_t imm16) { argument
184 EmitI(0x9, rs, rt, imm16);
191 void Mips64Assembler::Daddiu(GpuRegister rt, GpuRegister rs, uint16_t imm16) { argument
192 EmitI(0x19, rs, rt, imm16);
255 void Mips64Assembler::Andi(GpuRegister rt, GpuRegister rs, uint16_t imm16) { argument
256 EmitI(0xc, rs, rt, imm16);
263 void Mips64Assembler::Ori(GpuRegister rt, GpuRegister rs, uint16_t imm16) { argument
264 EmitI(0xd, rs, rt, imm16);
271 void Mips64Assembler::Xori(GpuRegister rt, GpuRegister rs, uint16_t imm16) { argument
272 EmitI(0xe, rs, rt, imm16);
420 Lb(GpuRegister rt, GpuRegister rs, uint16_t imm16) argument
424 Lh(GpuRegister rt, GpuRegister rs, uint16_t imm16) argument
428 Lw(GpuRegister rt, GpuRegister rs, uint16_t imm16) argument
432 Ld(GpuRegister rt, GpuRegister rs, uint16_t imm16) argument
436 Lbu(GpuRegister rt, GpuRegister rs, uint16_t imm16) argument
440 Lhu(GpuRegister rt, GpuRegister rs, uint16_t imm16) argument
444 Lwu(GpuRegister rt, GpuRegister rs, uint16_t imm16) argument
448 Lui(GpuRegister rt, uint16_t imm16) argument
452 Dahi(GpuRegister rs, uint16_t imm16) argument
456 Dati(GpuRegister rs, uint16_t imm16) argument
465 Sb(GpuRegister rt, GpuRegister rs, uint16_t imm16) argument
469 Sh(GpuRegister rt, GpuRegister rs, uint16_t imm16) argument
473 Sw(GpuRegister rt, GpuRegister rs, uint16_t imm16) argument
477 Sd(GpuRegister rt, GpuRegister rs, uint16_t imm16) argument
489 Slti(GpuRegister rt, GpuRegister rs, uint16_t imm16) argument
493 Sltiu(GpuRegister rt, GpuRegister rs, uint16_t imm16) argument
533 Auipc(GpuRegister rs, uint16_t imm16) argument
546 Jic(GpuRegister rt, uint16_t imm16) argument
550 Jialc(GpuRegister rt, uint16_t imm16) argument
554 Bltc(GpuRegister rs, GpuRegister rt, uint16_t imm16) argument
561 Bltzc(GpuRegister rt, uint16_t imm16) argument
566 Bgtzc(GpuRegister rt, uint16_t imm16) argument
571 Bgec(GpuRegister rs, GpuRegister rt, uint16_t imm16) argument
578 Bgezc(GpuRegister rt, uint16_t imm16) argument
583 Blezc(GpuRegister rt, uint16_t imm16) argument
588 Bltuc(GpuRegister rs, GpuRegister rt, uint16_t imm16) argument
595 Bgeuc(GpuRegister rs, GpuRegister rt, uint16_t imm16) argument
602 Beqc(GpuRegister rs, GpuRegister rt, uint16_t imm16) argument
609 Bnec(GpuRegister rs, GpuRegister rt, uint16_t imm16) argument
626 Bc1eqz(FpuRegister ft, uint16_t imm16) argument
630 Bc1nez(FpuRegister ft, uint16_t imm16) argument
997 Lwc1(FpuRegister ft, GpuRegister rs, uint16_t imm16) argument
1001 Ldc1(FpuRegister ft, GpuRegister rs, uint16_t imm16) argument
1005 Swc1(FpuRegister ft, GpuRegister rs, uint16_t imm16) argument
1009 Sdc1(FpuRegister ft, GpuRegister rs, uint16_t imm16) argument
[all...]
H A Dassembler_mips64.h123 void Addiu(GpuRegister rt, GpuRegister rs, uint16_t imm16);
125 void Daddiu(GpuRegister rt, GpuRegister rs, uint16_t imm16); // MIPS64
143 void Andi(GpuRegister rt, GpuRegister rs, uint16_t imm16);
145 void Ori(GpuRegister rt, GpuRegister rs, uint16_t imm16);
147 void Xori(GpuRegister rt, GpuRegister rs, uint16_t imm16);
185 void Lb(GpuRegister rt, GpuRegister rs, uint16_t imm16);
186 void Lh(GpuRegister rt, GpuRegister rs, uint16_t imm16);
187 void Lw(GpuRegister rt, GpuRegister rs, uint16_t imm16);
188 void Ld(GpuRegister rt, GpuRegister rs, uint16_t imm16); // MIPS64
189 void Lbu(GpuRegister rt, GpuRegister rs, uint16_t imm16);
[all...]
/art/disassembler/
H A Ddisassembler_arm.cc1161 // MOVW/T Rd, #imm16 - 111 10 i0 0010 0 iiii 0 iii dddd iiiiiiii
1167 uint32_t imm16 = (Rn << 12) | (i << 11) | (imm3 << 8) | imm8; local
1169 args << Rd << ", #" << imm16; local

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