Searched refs:loc1 (Results 1 - 4 of 4) sorted by relevance

/art/compiler/optimizing/
H A Dcode_generator_mips.cc528 Location loc1 = move->GetDestination(); local
531 DCHECK(!loc1.IsConstant());
534 if (loc1.Equals(loc2)) {
538 if (loc1.IsRegister() && loc2.IsRegister()) {
540 Register r1 = loc1.AsRegister<Register>();
545 } else if (loc1.IsFpuRegister() && loc2.IsFpuRegister()) {
546 FRegister f1 = loc1.AsFpuRegister<FRegister>();
558 } else if ((loc1.IsRegister() && loc2.IsFpuRegister()) ||
559 (loc1.IsFpuRegister() && loc2.IsRegister())) {
562 FRegister f1 = loc1
[all...]
H A Dload_store_elimination.cc337 HeapLocation* loc1 = heap_locations_[index1]; local
339 if (loc1->GetOffset() != loc2->GetOffset()) {
344 if (loc1->GetDeclaringClassDefIndex() != loc2->GetDeclaringClassDefIndex()) {
348 if (!CanReferencesAlias(loc1->GetReferenceInfo(), loc2->GetReferenceInfo())) {
351 if (loc1->IsArrayElement() && loc2->IsArrayElement()) {
352 HInstruction* array_index1 = loc1->GetIndex();
H A Dcode_generator_mips64.cc794 void CodeGeneratorMIPS64::SwapLocations(Location loc1, Location loc2, Primitive::Type type) { argument
795 DCHECK(!loc1.IsConstant());
798 if (loc1.Equals(loc2)) {
802 bool is_slot1 = loc1.IsStackSlot() || loc1.IsDoubleStackSlot();
804 bool is_fp_reg1 = loc1.IsFpuRegister();
807 if (loc2.IsRegister() && loc1.IsRegister()) {
809 GpuRegister r1 = loc1.AsRegister<GpuRegister>();
816 FpuRegister r1 = loc1.AsFpuRegister<FpuRegister>();
830 Location reg_loc = is_slot1 ? loc2 : loc1;
[all...]
H A Dcode_generator_mips64.h321 void SwapLocations(Location loc1, Location loc2, Primitive::Type type);

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