code_generator.h revision 900f6eb15db5215deeea23e4e087b553b4f696f7
1/* 2 * Copyright (C) 2014 The Android Open Source Project 3 * 4 * Licensed under the Apache License, Version 2.0 (the "License"); 5 * you may not use this file except in compliance with the License. 6 * You may obtain a copy of the License at 7 * 8 * http://www.apache.org/licenses/LICENSE-2.0 9 * 10 * Unless required by applicable law or agreed to in writing, software 11 * distributed under the License is distributed on an "AS IS" BASIS, 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 13 * See the License for the specific language governing permissions and 14 * limitations under the License. 15 */ 16 17#ifndef ART_COMPILER_OPTIMIZING_CODE_GENERATOR_H_ 18#define ART_COMPILER_OPTIMIZING_CODE_GENERATOR_H_ 19 20#include "arch/instruction_set.h" 21#include "base/bit_field.h" 22#include "globals.h" 23#include "locations.h" 24#include "memory_region.h" 25#include "nodes.h" 26#include "stack_map_stream.h" 27 28namespace art { 29 30static size_t constexpr kVRegSize = 4; 31static size_t constexpr kUninitializedFrameSize = 0; 32 33class Assembler; 34class CodeGenerator; 35class DexCompilationUnit; 36class ParallelMoveResolver; 37class SrcMap; 38 39class CodeAllocator { 40 public: 41 CodeAllocator() {} 42 virtual ~CodeAllocator() {} 43 44 virtual uint8_t* Allocate(size_t size) = 0; 45 46 private: 47 DISALLOW_COPY_AND_ASSIGN(CodeAllocator); 48}; 49 50struct PcInfo { 51 uint32_t dex_pc; 52 uintptr_t native_pc; 53}; 54 55class SlowPathCode : public ArenaObject<kArenaAllocSlowPaths> { 56 public: 57 SlowPathCode() {} 58 virtual ~SlowPathCode() {} 59 60 virtual void EmitNativeCode(CodeGenerator* codegen) = 0; 61 62 private: 63 DISALLOW_COPY_AND_ASSIGN(SlowPathCode); 64}; 65 66class CodeGenerator : public ArenaObject<kArenaAllocMisc> { 67 public: 68 // Compiles the graph to executable instructions. Returns whether the compilation 69 // succeeded. 70 void CompileBaseline(CodeAllocator* allocator, bool is_leaf = false); 71 void CompileOptimized(CodeAllocator* allocator); 72 static CodeGenerator* Create(ArenaAllocator* allocator, 73 HGraph* graph, 74 InstructionSet instruction_set); 75 76 HGraph* GetGraph() const { return graph_; } 77 78 bool GoesToNextBlock(HBasicBlock* current, HBasicBlock* next) const; 79 80 size_t GetStackSlotOfParameter(HParameterValue* parameter) const { 81 // Note that this follows the current calling convention. 82 return GetFrameSize() 83 + kVRegSize // Art method 84 + parameter->GetIndex() * kVRegSize; 85 } 86 87 virtual void Initialize() = 0; 88 virtual void GenerateFrameEntry() = 0; 89 virtual void GenerateFrameExit() = 0; 90 virtual void Bind(HBasicBlock* block) = 0; 91 virtual void Move(HInstruction* instruction, Location location, HInstruction* move_for) = 0; 92 virtual HGraphVisitor* GetLocationBuilder() = 0; 93 virtual HGraphVisitor* GetInstructionVisitor() = 0; 94 virtual Assembler* GetAssembler() = 0; 95 virtual size_t GetWordSize() const = 0; 96 virtual uintptr_t GetAddressOf(HBasicBlock* block) const = 0; 97 void ComputeFrameSize(size_t number_of_spill_slots, 98 size_t maximum_number_of_live_registers, 99 size_t number_of_out_slots); 100 virtual size_t FrameEntrySpillSize() const = 0; 101 int32_t GetStackSlot(HLocal* local) const; 102 Location GetTemporaryLocation(HTemporary* temp) const; 103 104 uint32_t GetFrameSize() const { return frame_size_; } 105 void SetFrameSize(uint32_t size) { frame_size_ = size; } 106 uint32_t GetCoreSpillMask() const { return core_spill_mask_; } 107 108 size_t GetNumberOfCoreRegisters() const { return number_of_core_registers_; } 109 size_t GetNumberOfFloatingPointRegisters() const { return number_of_fpu_registers_; } 110 virtual void SetupBlockedRegisters() const = 0; 111 112 virtual void DumpCoreRegister(std::ostream& stream, int reg) const = 0; 113 virtual void DumpFloatingPointRegister(std::ostream& stream, int reg) const = 0; 114 virtual InstructionSet GetInstructionSet() const = 0; 115 // Saves the register in the stack. Returns the size taken on stack. 116 virtual size_t SaveCoreRegister(size_t stack_index, uint32_t reg_id) = 0; 117 // Restores the register from the stack. Returns the size taken on stack. 118 virtual size_t RestoreCoreRegister(size_t stack_index, uint32_t reg_id) = 0; 119 virtual size_t SaveFloatingPointRegister(size_t stack_index, uint32_t reg_id) { 120 UNUSED(stack_index, reg_id); 121 UNIMPLEMENTED(FATAL); 122 UNREACHABLE(); 123 } 124 virtual size_t RestoreFloatingPointRegister(size_t stack_index, uint32_t reg_id) { 125 UNUSED(stack_index, reg_id); 126 UNIMPLEMENTED(FATAL); 127 UNREACHABLE(); 128 } 129 130 void RecordPcInfo(HInstruction* instruction, uint32_t dex_pc); 131 132 void AddSlowPath(SlowPathCode* slow_path) { 133 slow_paths_.Add(slow_path); 134 } 135 136 void GenerateSlowPaths(); 137 138 void BuildMappingTable(std::vector<uint8_t>* vector, SrcMap* src_map) const; 139 void BuildVMapTable(std::vector<uint8_t>* vector) const; 140 void BuildNativeGCMap( 141 std::vector<uint8_t>* vector, const DexCompilationUnit& dex_compilation_unit) const; 142 void BuildStackMaps(std::vector<uint8_t>* vector); 143 void SaveLiveRegisters(LocationSummary* locations); 144 void RestoreLiveRegisters(LocationSummary* locations); 145 146 bool IsLeafMethod() const { 147 return is_leaf_; 148 } 149 150 void MarkNotLeaf() { 151 is_leaf_ = false; 152 } 153 154 // Clears the spill slots taken by loop phis in the `LocationSummary` of the 155 // suspend check. This is called when the code generator generates code 156 // for the suspend check at the back edge (instead of where the suspend check 157 // is, which is the loop entry). At this point, the spill slots for the phis 158 // have not been written to. 159 void ClearSpillSlotsFromLoopPhisInStackMap(HSuspendCheck* suspend_check) const; 160 161 bool* GetBlockedCoreRegisters() const { return blocked_core_registers_; } 162 bool* GetBlockedFloatingPointRegisters() const { return blocked_fpu_registers_; } 163 164 // Helper that returns the pointer offset of an index in an object array. 165 // Note: this method assumes we always have the same pointer size, regardless 166 // of the architecture. 167 static size_t GetCacheOffset(uint32_t index); 168 169 void EmitParallelMoves(Location from1, Location to1, Location from2, Location to2); 170 171 static bool StoreNeedsWriteBarrier(Primitive::Type type, HInstruction* value) { 172 if (kIsDebugBuild) { 173 if (type == Primitive::kPrimNot && value->IsIntConstant()) { 174 CHECK_EQ(value->AsIntConstant()->GetValue(), 0); 175 } 176 } 177 return type == Primitive::kPrimNot && !value->IsIntConstant(); 178 } 179 180 protected: 181 CodeGenerator(HGraph* graph, 182 size_t number_of_core_registers, 183 size_t number_of_fpu_registers, 184 size_t number_of_register_pairs) 185 : frame_size_(kUninitializedFrameSize), 186 core_spill_mask_(0), 187 first_register_slot_in_slow_path_(0), 188 blocked_core_registers_(graph->GetArena()->AllocArray<bool>(number_of_core_registers)), 189 blocked_fpu_registers_(graph->GetArena()->AllocArray<bool>(number_of_fpu_registers)), 190 blocked_register_pairs_(graph->GetArena()->AllocArray<bool>(number_of_register_pairs)), 191 number_of_core_registers_(number_of_core_registers), 192 number_of_fpu_registers_(number_of_fpu_registers), 193 number_of_register_pairs_(number_of_register_pairs), 194 graph_(graph), 195 pc_infos_(graph->GetArena(), 32), 196 slow_paths_(graph->GetArena(), 8), 197 is_leaf_(true), 198 stack_map_stream_(graph->GetArena()) {} 199 ~CodeGenerator() {} 200 201 // Register allocation logic. 202 void AllocateRegistersLocally(HInstruction* instruction) const; 203 204 // Backend specific implementation for allocating a register. 205 virtual Location AllocateFreeRegister(Primitive::Type type) const = 0; 206 207 static size_t FindFreeEntry(bool* array, size_t length); 208 static size_t FindTwoFreeConsecutiveAlignedEntries(bool* array, size_t length); 209 210 virtual Location GetStackLocation(HLoadLocal* load) const = 0; 211 212 virtual ParallelMoveResolver* GetMoveResolver() = 0; 213 214 // Frame size required for this method. 215 uint32_t frame_size_; 216 uint32_t core_spill_mask_; 217 uint32_t first_register_slot_in_slow_path_; 218 219 // Arrays used when doing register allocation to know which 220 // registers we can allocate. `SetupBlockedRegisters` updates the 221 // arrays. 222 bool* const blocked_core_registers_; 223 bool* const blocked_fpu_registers_; 224 bool* const blocked_register_pairs_; 225 size_t number_of_core_registers_; 226 size_t number_of_fpu_registers_; 227 size_t number_of_register_pairs_; 228 229 private: 230 void InitLocations(HInstruction* instruction); 231 size_t GetStackOffsetOfSavedRegister(size_t index); 232 233 HGraph* const graph_; 234 235 GrowableArray<PcInfo> pc_infos_; 236 GrowableArray<SlowPathCode*> slow_paths_; 237 238 bool is_leaf_; 239 240 StackMapStream stack_map_stream_; 241 242 DISALLOW_COPY_AND_ASSIGN(CodeGenerator); 243}; 244 245template <typename C, typename F> 246class CallingConvention { 247 public: 248 CallingConvention(const C* registers, 249 size_t number_of_registers, 250 const F* fpu_registers, 251 size_t number_of_fpu_registers) 252 : registers_(registers), 253 number_of_registers_(number_of_registers), 254 fpu_registers_(fpu_registers), 255 number_of_fpu_registers_(number_of_fpu_registers) {} 256 257 size_t GetNumberOfRegisters() const { return number_of_registers_; } 258 size_t GetNumberOfFpuRegisters() const { return number_of_fpu_registers_; } 259 260 C GetRegisterAt(size_t index) const { 261 DCHECK_LT(index, number_of_registers_); 262 return registers_[index]; 263 } 264 265 F GetFpuRegisterAt(size_t index) const { 266 DCHECK_LT(index, number_of_fpu_registers_); 267 return fpu_registers_[index]; 268 } 269 270 size_t GetStackOffsetOf(size_t index) const { 271 // We still reserve the space for parameters passed by registers. 272 // Add one for the method pointer. 273 return (index + 1) * kVRegSize; 274 } 275 276 private: 277 const C* registers_; 278 const size_t number_of_registers_; 279 const F* fpu_registers_; 280 const size_t number_of_fpu_registers_; 281 282 DISALLOW_COPY_AND_ASSIGN(CallingConvention); 283}; 284 285} // namespace art 286 287#endif // ART_COMPILER_OPTIMIZING_CODE_GENERATOR_H_ 288