assembler_arm32.h revision 13735955f39b3b304c37d2b2840663c131262c18
165fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison/* 265fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison * Copyright (C) 2014 The Android Open Source Project 365fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison * 465fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison * Licensed under the Apache License, Version 2.0 (the "License"); 565fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison * you may not use this file except in compliance with the License. 665fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison * You may obtain a copy of the License at 765fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison * 865fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison * http://www.apache.org/licenses/LICENSE-2.0 965fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison * 1065fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison * Unless required by applicable law or agreed to in writing, software 1165fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison * distributed under the License is distributed on an "AS IS" BASIS, 1265fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 1365fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison * See the License for the specific language governing permissions and 1465fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison * limitations under the License. 1565fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison */ 1665fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison 1765fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison#ifndef ART_COMPILER_UTILS_ARM_ASSEMBLER_ARM32_H_ 1865fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison#define ART_COMPILER_UTILS_ARM_ASSEMBLER_ARM32_H_ 1965fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison 2065fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison#include <vector> 2165fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison 2265fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison#include "base/logging.h" 2365fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison#include "constants_arm.h" 2465fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison#include "utils/arm/managed_register_arm.h" 2565fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison#include "utils/arm/assembler_arm.h" 2665fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison#include "offsets.h" 2765fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison#include "utils.h" 2865fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison 2965fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allisonnamespace art { 3065fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allisonnamespace arm { 3165fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison 3265fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allisonclass Arm32Assembler FINAL : public ArmAssembler { 3365fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison public: 3465fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison Arm32Assembler() { 3565fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison } 3665fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison virtual ~Arm32Assembler() {} 3765fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison 3865fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison bool IsThumb() const OVERRIDE { 3965fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison return false; 4065fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison } 4165fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison 4265fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison // Data-processing instructions. 4365fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void and_(Register rd, Register rn, const ShifterOperand& so, Condition cond = AL) OVERRIDE; 4465fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison 4565fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void eor(Register rd, Register rn, const ShifterOperand& so, Condition cond = AL) OVERRIDE; 4665fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison 4765fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void sub(Register rd, Register rn, const ShifterOperand& so, Condition cond = AL) OVERRIDE; 4865fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void subs(Register rd, Register rn, const ShifterOperand& so, Condition cond = AL) OVERRIDE; 4965fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison 5065fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void rsb(Register rd, Register rn, const ShifterOperand& so, Condition cond = AL) OVERRIDE; 5165fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void rsbs(Register rd, Register rn, const ShifterOperand& so, Condition cond = AL) OVERRIDE; 5265fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison 5365fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void add(Register rd, Register rn, const ShifterOperand& so, Condition cond = AL) OVERRIDE; 5465fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison 5565fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void adds(Register rd, Register rn, const ShifterOperand& so, Condition cond = AL) OVERRIDE; 5665fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison 5765fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void adc(Register rd, Register rn, const ShifterOperand& so, Condition cond = AL) OVERRIDE; 5865fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison 5965fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void sbc(Register rd, Register rn, const ShifterOperand& so, Condition cond = AL) OVERRIDE; 6065fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison 6165fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void rsc(Register rd, Register rn, const ShifterOperand& so, Condition cond = AL) OVERRIDE; 6265fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison 6365fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void tst(Register rn, const ShifterOperand& so, Condition cond = AL) OVERRIDE; 6465fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison 6565fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void teq(Register rn, const ShifterOperand& so, Condition cond = AL) OVERRIDE; 6665fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison 6765fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void cmp(Register rn, const ShifterOperand& so, Condition cond = AL) OVERRIDE; 6865fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison 6965fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void cmn(Register rn, const ShifterOperand& so, Condition cond = AL) OVERRIDE; 7065fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison 7165fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void orr(Register rd, Register rn, const ShifterOperand& so, Condition cond = AL) OVERRIDE; 7265fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void orrs(Register rd, Register rn, const ShifterOperand& so, Condition cond = AL) OVERRIDE; 7365fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison 7465fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void mov(Register rd, const ShifterOperand& so, Condition cond = AL) OVERRIDE; 7565fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void movs(Register rd, const ShifterOperand& so, Condition cond = AL) OVERRIDE; 7665fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison 7765fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void bic(Register rd, Register rn, const ShifterOperand& so, Condition cond = AL) OVERRIDE; 7865fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison 7965fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void mvn(Register rd, const ShifterOperand& so, Condition cond = AL) OVERRIDE; 8065fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void mvns(Register rd, const ShifterOperand& so, Condition cond = AL) OVERRIDE; 8165fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison 8265fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison // Miscellaneous data-processing instructions. 8365fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void clz(Register rd, Register rm, Condition cond = AL) OVERRIDE; 8465fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void movw(Register rd, uint16_t imm16, Condition cond = AL) OVERRIDE; 8565fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void movt(Register rd, uint16_t imm16, Condition cond = AL) OVERRIDE; 8665fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison 8765fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison // Multiply instructions. 8865fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void mul(Register rd, Register rn, Register rm, Condition cond = AL) OVERRIDE; 8965fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void mla(Register rd, Register rn, Register rm, Register ra, 9065fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison Condition cond = AL) OVERRIDE; 9165fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void mls(Register rd, Register rn, Register rm, Register ra, 9265fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison Condition cond = AL) OVERRIDE; 9365fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void umull(Register rd_lo, Register rd_hi, Register rn, Register rm, 9465fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison Condition cond = AL) OVERRIDE; 9565fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison 9665fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void sdiv(Register rd, Register rn, Register rm, Condition cond = AL) OVERRIDE; 9765fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void udiv(Register rd, Register rn, Register rm, Condition cond = AL) OVERRIDE; 9865fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison 9965fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison // Load/store instructions. 10065fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void ldr(Register rd, const Address& ad, Condition cond = AL) OVERRIDE; 10165fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void str(Register rd, const Address& ad, Condition cond = AL) OVERRIDE; 10265fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison 10365fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void ldrb(Register rd, const Address& ad, Condition cond = AL) OVERRIDE; 10465fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void strb(Register rd, const Address& ad, Condition cond = AL) OVERRIDE; 10565fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison 10665fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void ldrh(Register rd, const Address& ad, Condition cond = AL) OVERRIDE; 10765fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void strh(Register rd, const Address& ad, Condition cond = AL) OVERRIDE; 10865fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison 10965fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void ldrsb(Register rd, const Address& ad, Condition cond = AL) OVERRIDE; 11065fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void ldrsh(Register rd, const Address& ad, Condition cond = AL) OVERRIDE; 11165fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison 11265fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void ldrd(Register rd, const Address& ad, Condition cond = AL) OVERRIDE; 11365fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void strd(Register rd, const Address& ad, Condition cond = AL) OVERRIDE; 11465fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison 11565fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void ldm(BlockAddressMode am, Register base, 11665fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison RegList regs, Condition cond = AL) OVERRIDE; 11765fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void stm(BlockAddressMode am, Register base, 11865fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison RegList regs, Condition cond = AL) OVERRIDE; 11965fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison 12065fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void ldrex(Register rd, Register rn, Condition cond = AL) OVERRIDE; 12165fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void strex(Register rd, Register rt, Register rn, Condition cond = AL) OVERRIDE; 12265fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison 12365fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison // Miscellaneous instructions. 12465fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void clrex(Condition cond = AL) OVERRIDE; 12565fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void nop(Condition cond = AL) OVERRIDE; 12665fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison 12765fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison // Note that gdb sets breakpoints using the undefined instruction 0xe7f001f0. 12865fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void bkpt(uint16_t imm16) OVERRIDE; 12965fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void svc(uint32_t imm24) OVERRIDE; 13065fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison 13165fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void cbz(Register rn, Label* target) OVERRIDE; 13265fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void cbnz(Register rn, Label* target) OVERRIDE; 13365fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison 13465fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison // Floating point instructions (VFPv3-D16 and VFPv3-D32 profiles). 13565fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void vmovsr(SRegister sn, Register rt, Condition cond = AL) OVERRIDE; 13665fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void vmovrs(Register rt, SRegister sn, Condition cond = AL) OVERRIDE; 13765fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void vmovsrr(SRegister sm, Register rt, Register rt2, Condition cond = AL) OVERRIDE; 13865fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void vmovrrs(Register rt, Register rt2, SRegister sm, Condition cond = AL) OVERRIDE; 13965fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void vmovdrr(DRegister dm, Register rt, Register rt2, Condition cond = AL) OVERRIDE; 14065fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void vmovrrd(Register rt, Register rt2, DRegister dm, Condition cond = AL) OVERRIDE; 14165fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void vmovs(SRegister sd, SRegister sm, Condition cond = AL) OVERRIDE; 14265fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void vmovd(DRegister dd, DRegister dm, Condition cond = AL) OVERRIDE; 14365fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison 14465fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison // Returns false if the immediate cannot be encoded. 14565fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison bool vmovs(SRegister sd, float s_imm, Condition cond = AL) OVERRIDE; 14665fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison bool vmovd(DRegister dd, double d_imm, Condition cond = AL) OVERRIDE; 14765fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison 14865fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void vldrs(SRegister sd, const Address& ad, Condition cond = AL) OVERRIDE; 14965fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void vstrs(SRegister sd, const Address& ad, Condition cond = AL) OVERRIDE; 15065fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void vldrd(DRegister dd, const Address& ad, Condition cond = AL) OVERRIDE; 15165fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void vstrd(DRegister dd, const Address& ad, Condition cond = AL) OVERRIDE; 15265fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison 15365fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void vadds(SRegister sd, SRegister sn, SRegister sm, Condition cond = AL) OVERRIDE; 15465fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void vaddd(DRegister dd, DRegister dn, DRegister dm, Condition cond = AL) OVERRIDE; 15565fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void vsubs(SRegister sd, SRegister sn, SRegister sm, Condition cond = AL) OVERRIDE; 15665fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void vsubd(DRegister dd, DRegister dn, DRegister dm, Condition cond = AL) OVERRIDE; 15765fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void vmuls(SRegister sd, SRegister sn, SRegister sm, Condition cond = AL) OVERRIDE; 15865fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void vmuld(DRegister dd, DRegister dn, DRegister dm, Condition cond = AL) OVERRIDE; 15965fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void vmlas(SRegister sd, SRegister sn, SRegister sm, Condition cond = AL) OVERRIDE; 16065fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void vmlad(DRegister dd, DRegister dn, DRegister dm, Condition cond = AL) OVERRIDE; 16165fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void vmlss(SRegister sd, SRegister sn, SRegister sm, Condition cond = AL) OVERRIDE; 16265fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void vmlsd(DRegister dd, DRegister dn, DRegister dm, Condition cond = AL) OVERRIDE; 16365fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void vdivs(SRegister sd, SRegister sn, SRegister sm, Condition cond = AL) OVERRIDE; 16465fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void vdivd(DRegister dd, DRegister dn, DRegister dm, Condition cond = AL) OVERRIDE; 16565fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison 16665fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void vabss(SRegister sd, SRegister sm, Condition cond = AL) OVERRIDE; 16765fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void vabsd(DRegister dd, DRegister dm, Condition cond = AL) OVERRIDE; 16865fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void vnegs(SRegister sd, SRegister sm, Condition cond = AL) OVERRIDE; 16965fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void vnegd(DRegister dd, DRegister dm, Condition cond = AL) OVERRIDE; 17065fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void vsqrts(SRegister sd, SRegister sm, Condition cond = AL) OVERRIDE; 17165fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void vsqrtd(DRegister dd, DRegister dm, Condition cond = AL) OVERRIDE; 17265fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison 17365fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void vcvtsd(SRegister sd, DRegister dm, Condition cond = AL) OVERRIDE; 17465fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void vcvtds(DRegister dd, SRegister sm, Condition cond = AL) OVERRIDE; 17565fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void vcvtis(SRegister sd, SRegister sm, Condition cond = AL) OVERRIDE; 17665fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void vcvtid(SRegister sd, DRegister dm, Condition cond = AL) OVERRIDE; 17765fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void vcvtsi(SRegister sd, SRegister sm, Condition cond = AL) OVERRIDE; 17865fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void vcvtdi(DRegister dd, SRegister sm, Condition cond = AL) OVERRIDE; 17965fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void vcvtus(SRegister sd, SRegister sm, Condition cond = AL) OVERRIDE; 18065fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void vcvtud(SRegister sd, DRegister dm, Condition cond = AL) OVERRIDE; 18165fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void vcvtsu(SRegister sd, SRegister sm, Condition cond = AL) OVERRIDE; 18265fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void vcvtdu(DRegister dd, SRegister sm, Condition cond = AL) OVERRIDE; 18365fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison 18465fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void vcmps(SRegister sd, SRegister sm, Condition cond = AL) OVERRIDE; 18565fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void vcmpd(DRegister dd, DRegister dm, Condition cond = AL) OVERRIDE; 18665fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void vcmpsz(SRegister sd, Condition cond = AL) OVERRIDE; 18765fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void vcmpdz(DRegister dd, Condition cond = AL) OVERRIDE; 18865fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void vmstat(Condition cond = AL) OVERRIDE; // VMRS APSR_nzcv, FPSCR 18965fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison 19065fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void vpushs(SRegister reg, int nregs, Condition cond = AL) OVERRIDE; 19165fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void vpushd(DRegister reg, int nregs, Condition cond = AL) OVERRIDE; 19265fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void vpops(SRegister reg, int nregs, Condition cond = AL) OVERRIDE; 19365fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void vpopd(DRegister reg, int nregs, Condition cond = AL) OVERRIDE; 19465fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison 19565fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison // Branch instructions. 19665fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void b(Label* label, Condition cond = AL); 19765fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void bl(Label* label, Condition cond = AL); 19865fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void blx(Register rm, Condition cond = AL) OVERRIDE; 19965fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void bx(Register rm, Condition cond = AL) OVERRIDE; 20045fdb93f04b981f70f7b6d98949ab3986b7331f8Dave Allison void Lsl(Register rd, Register rm, uint32_t shift_imm, bool setcc = false, 20145fdb93f04b981f70f7b6d98949ab3986b7331f8Dave Allison Condition cond = AL) OVERRIDE; 20245fdb93f04b981f70f7b6d98949ab3986b7331f8Dave Allison void Lsr(Register rd, Register rm, uint32_t shift_imm, bool setcc = false, 20345fdb93f04b981f70f7b6d98949ab3986b7331f8Dave Allison Condition cond = AL) OVERRIDE; 20445fdb93f04b981f70f7b6d98949ab3986b7331f8Dave Allison void Asr(Register rd, Register rm, uint32_t shift_imm, bool setcc = false, 20545fdb93f04b981f70f7b6d98949ab3986b7331f8Dave Allison Condition cond = AL) OVERRIDE; 20645fdb93f04b981f70f7b6d98949ab3986b7331f8Dave Allison void Ror(Register rd, Register rm, uint32_t shift_imm, bool setcc = false, 20745fdb93f04b981f70f7b6d98949ab3986b7331f8Dave Allison Condition cond = AL) OVERRIDE; 20845fdb93f04b981f70f7b6d98949ab3986b7331f8Dave Allison void Rrx(Register rd, Register rm, bool setcc = false, 20945fdb93f04b981f70f7b6d98949ab3986b7331f8Dave Allison Condition cond = AL) OVERRIDE; 21045fdb93f04b981f70f7b6d98949ab3986b7331f8Dave Allison 21145fdb93f04b981f70f7b6d98949ab3986b7331f8Dave Allison void Lsl(Register rd, Register rm, Register rn, bool setcc = false, 21245fdb93f04b981f70f7b6d98949ab3986b7331f8Dave Allison Condition cond = AL) OVERRIDE; 21345fdb93f04b981f70f7b6d98949ab3986b7331f8Dave Allison void Lsr(Register rd, Register rm, Register rn, bool setcc = false, 21445fdb93f04b981f70f7b6d98949ab3986b7331f8Dave Allison Condition cond = AL) OVERRIDE; 21545fdb93f04b981f70f7b6d98949ab3986b7331f8Dave Allison void Asr(Register rd, Register rm, Register rn, bool setcc = false, 21645fdb93f04b981f70f7b6d98949ab3986b7331f8Dave Allison Condition cond = AL) OVERRIDE; 21745fdb93f04b981f70f7b6d98949ab3986b7331f8Dave Allison void Ror(Register rd, Register rm, Register rn, bool setcc = false, 21845fdb93f04b981f70f7b6d98949ab3986b7331f8Dave Allison Condition cond = AL) OVERRIDE; 21965fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison 22065fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void Push(Register rd, Condition cond = AL) OVERRIDE; 22165fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void Pop(Register rd, Condition cond = AL) OVERRIDE; 22265fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison 22365fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void PushList(RegList regs, Condition cond = AL) OVERRIDE; 22465fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void PopList(RegList regs, Condition cond = AL) OVERRIDE; 22565fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison 22665fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void Mov(Register rd, Register rm, Condition cond = AL) OVERRIDE; 22765fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison 22865fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void CompareAndBranchIfZero(Register r, Label* label) OVERRIDE; 22965fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void CompareAndBranchIfNonZero(Register r, Label* label) OVERRIDE; 23065fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison 23165fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison 23265fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison // Macros. 23365fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison // Add signed constant value to rd. May clobber IP. 23465fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void AddConstant(Register rd, int32_t value, Condition cond = AL) OVERRIDE; 23565fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void AddConstant(Register rd, Register rn, int32_t value, 23665fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison Condition cond = AL) OVERRIDE; 23765fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void AddConstantSetFlags(Register rd, Register rn, int32_t value, 23865fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison Condition cond = AL) OVERRIDE; 23965fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void AddConstantWithCarry(Register rd, Register rn, int32_t value, 24065fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison Condition cond = AL) {} 24165fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison 24265fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison // Load and Store. May clobber IP. 24365fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void LoadImmediate(Register rd, int32_t value, Condition cond = AL) OVERRIDE; 24465fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void LoadSImmediate(SRegister sd, float value, Condition cond = AL) {} 24565fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void LoadDImmediate(DRegister dd, double value, 24665fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison Register scratch, Condition cond = AL) {} 24765fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void MarkExceptionHandler(Label* label) OVERRIDE; 24865fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void LoadFromOffset(LoadOperandType type, 24965fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison Register reg, 25065fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison Register base, 25165fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison int32_t offset, 25265fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison Condition cond = AL) OVERRIDE; 25365fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void StoreToOffset(StoreOperandType type, 25465fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison Register reg, 25565fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison Register base, 25665fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison int32_t offset, 25765fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison Condition cond = AL) OVERRIDE; 25865fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void LoadSFromOffset(SRegister reg, 25965fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison Register base, 26065fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison int32_t offset, 26165fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison Condition cond = AL) OVERRIDE; 26265fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void StoreSToOffset(SRegister reg, 26365fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison Register base, 26465fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison int32_t offset, 26565fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison Condition cond = AL) OVERRIDE; 26665fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void LoadDFromOffset(DRegister reg, 26765fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison Register base, 26865fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison int32_t offset, 26965fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison Condition cond = AL) OVERRIDE; 27065fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void StoreDToOffset(DRegister reg, 27165fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison Register base, 27265fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison int32_t offset, 27365fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison Condition cond = AL) OVERRIDE; 27465fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison 27565fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison 27613735955f39b3b304c37d2b2840663c131262c18Ian Rogers static bool IsInstructionForExceptionHandling(uintptr_t pc); 27765fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison 27865fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison // Emit data (e.g. encoded instruction or immediate) to the 27965fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison // instruction stream. 28065fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void Emit(int32_t value); 28165fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void Bind(Label* label) OVERRIDE; 28265fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison 28365fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void MemoryBarrier(ManagedRegister scratch) OVERRIDE; 28465fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison 28565fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison private: 28665fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void EmitType01(Condition cond, 28765fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison int type, 28865fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison Opcode opcode, 28965fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison int set_cc, 29065fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison Register rn, 29165fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison Register rd, 29265fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison const ShifterOperand& so); 29365fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison 29465fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void EmitType5(Condition cond, int offset, bool link); 29565fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison 29665fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void EmitMemOp(Condition cond, 29765fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison bool load, 29865fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison bool byte, 29965fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison Register rd, 30065fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison const Address& ad); 30165fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison 30265fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void EmitMemOpAddressMode3(Condition cond, 30365fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison int32_t mode, 30465fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison Register rd, 30565fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison const Address& ad); 30665fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison 30765fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void EmitMultiMemOp(Condition cond, 30865fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison BlockAddressMode am, 30965fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison bool load, 31065fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison Register base, 31165fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison RegList regs); 31265fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison 31365fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void EmitShiftImmediate(Condition cond, 31465fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison Shift opcode, 31565fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison Register rd, 31665fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison Register rm, 31765fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison const ShifterOperand& so); 31865fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison 31965fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void EmitShiftRegister(Condition cond, 32065fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison Shift opcode, 32165fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison Register rd, 32265fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison Register rm, 32365fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison const ShifterOperand& so); 32465fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison 32565fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void EmitMulOp(Condition cond, 32665fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison int32_t opcode, 32765fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison Register rd, 32865fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison Register rn, 32965fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison Register rm, 33065fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison Register rs); 33165fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison 33265fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void EmitVFPsss(Condition cond, 33365fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison int32_t opcode, 33465fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison SRegister sd, 33565fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison SRegister sn, 33665fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison SRegister sm); 33765fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison 33865fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void EmitVFPddd(Condition cond, 33965fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison int32_t opcode, 34065fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison DRegister dd, 34165fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison DRegister dn, 34265fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison DRegister dm); 34365fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison 34465fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void EmitVFPsd(Condition cond, 34565fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison int32_t opcode, 34665fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison SRegister sd, 34765fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison DRegister dm); 34865fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison 34965fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void EmitVFPds(Condition cond, 35065fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison int32_t opcode, 35165fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison DRegister dd, 35265fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison SRegister sm); 35365fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison 35465fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void EmitVPushPop(uint32_t reg, int nregs, bool push, bool dbl, Condition cond); 35565fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison 35665fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void EmitBranch(Condition cond, Label* label, bool link); 35765fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison static int32_t EncodeBranchOffset(int offset, int32_t inst); 35865fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison static int DecodeBranchOffset(int32_t inst); 35965fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison int32_t EncodeTstOffset(int offset, int32_t inst); 36065fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison int DecodeTstOffset(int32_t inst); 36165fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison}; 36265fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison 36365fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison} // namespace arm 36465fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison} // namespace art 36565fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison 36665fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison#endif // ART_COMPILER_UTILS_ARM_ASSEMBLER_ARM32_H_ 367