assembler_arm32.h revision c257da7b0fb6737f65aba426add8831e45404755
165fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison/* 265fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison * Copyright (C) 2014 The Android Open Source Project 365fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison * 465fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison * Licensed under the Apache License, Version 2.0 (the "License"); 565fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison * you may not use this file except in compliance with the License. 665fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison * You may obtain a copy of the License at 765fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison * 865fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison * http://www.apache.org/licenses/LICENSE-2.0 965fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison * 1065fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison * Unless required by applicable law or agreed to in writing, software 1165fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison * distributed under the License is distributed on an "AS IS" BASIS, 1265fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 1365fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison * See the License for the specific language governing permissions and 1465fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison * limitations under the License. 1565fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison */ 1665fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison 1765fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison#ifndef ART_COMPILER_UTILS_ARM_ASSEMBLER_ARM32_H_ 1865fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison#define ART_COMPILER_UTILS_ARM_ASSEMBLER_ARM32_H_ 1965fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison 2065fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison#include <vector> 2165fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison 2265fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison#include "base/logging.h" 2365fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison#include "constants_arm.h" 2465fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison#include "utils/arm/managed_register_arm.h" 2565fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison#include "utils/arm/assembler_arm.h" 2665fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison#include "offsets.h" 2765fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison 2865fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allisonnamespace art { 2965fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allisonnamespace arm { 3065fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison 3165fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allisonclass Arm32Assembler FINAL : public ArmAssembler { 3265fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison public: 3365fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison Arm32Assembler() { 3465fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison } 3565fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison virtual ~Arm32Assembler() {} 3665fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison 3765fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison bool IsThumb() const OVERRIDE { 3865fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison return false; 3965fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison } 4065fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison 4165fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison // Data-processing instructions. 4273cf0fb75de2a449ce4fe329b5f1fb42eef1372fVladimir Marko virtual void and_(Register rd, Register rn, const ShifterOperand& so, 4373cf0fb75de2a449ce4fe329b5f1fb42eef1372fVladimir Marko Condition cond = AL, SetCc set_cc = kCcDontCare) OVERRIDE; 4465fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison 4573cf0fb75de2a449ce4fe329b5f1fb42eef1372fVladimir Marko virtual void eor(Register rd, Register rn, const ShifterOperand& so, 4673cf0fb75de2a449ce4fe329b5f1fb42eef1372fVladimir Marko Condition cond = AL, SetCc set_cc = kCcDontCare) OVERRIDE; 4765fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison 4873cf0fb75de2a449ce4fe329b5f1fb42eef1372fVladimir Marko virtual void sub(Register rd, Register rn, const ShifterOperand& so, 4973cf0fb75de2a449ce4fe329b5f1fb42eef1372fVladimir Marko Condition cond = AL, SetCc set_cc = kCcDontCare) OVERRIDE; 5065fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison 5173cf0fb75de2a449ce4fe329b5f1fb42eef1372fVladimir Marko virtual void rsb(Register rd, Register rn, const ShifterOperand& so, 5273cf0fb75de2a449ce4fe329b5f1fb42eef1372fVladimir Marko Condition cond = AL, SetCc set_cc = kCcDontCare) OVERRIDE; 5365fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison 5473cf0fb75de2a449ce4fe329b5f1fb42eef1372fVladimir Marko virtual void add(Register rd, Register rn, const ShifterOperand& so, 5573cf0fb75de2a449ce4fe329b5f1fb42eef1372fVladimir Marko Condition cond = AL, SetCc set_cc = kCcDontCare) OVERRIDE; 5665fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison 5773cf0fb75de2a449ce4fe329b5f1fb42eef1372fVladimir Marko virtual void adc(Register rd, Register rn, const ShifterOperand& so, 5873cf0fb75de2a449ce4fe329b5f1fb42eef1372fVladimir Marko Condition cond = AL, SetCc set_cc = kCcDontCare) OVERRIDE; 5965fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison 6073cf0fb75de2a449ce4fe329b5f1fb42eef1372fVladimir Marko virtual void sbc(Register rd, Register rn, const ShifterOperand& so, 6173cf0fb75de2a449ce4fe329b5f1fb42eef1372fVladimir Marko Condition cond = AL, SetCc set_cc = kCcDontCare) OVERRIDE; 6265fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison 6373cf0fb75de2a449ce4fe329b5f1fb42eef1372fVladimir Marko virtual void rsc(Register rd, Register rn, const ShifterOperand& so, 6473cf0fb75de2a449ce4fe329b5f1fb42eef1372fVladimir Marko Condition cond = AL, SetCc set_cc = kCcDontCare) OVERRIDE; 6565fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison 6665fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void tst(Register rn, const ShifterOperand& so, Condition cond = AL) OVERRIDE; 6765fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison 6865fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void teq(Register rn, const ShifterOperand& so, Condition cond = AL) OVERRIDE; 6965fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison 7065fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void cmp(Register rn, const ShifterOperand& so, Condition cond = AL) OVERRIDE; 7165fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison 7265fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void cmn(Register rn, const ShifterOperand& so, Condition cond = AL) OVERRIDE; 7365fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison 7473cf0fb75de2a449ce4fe329b5f1fb42eef1372fVladimir Marko virtual void orr(Register rd, Register rn, const ShifterOperand& so, 7573cf0fb75de2a449ce4fe329b5f1fb42eef1372fVladimir Marko Condition cond = AL, SetCc set_cc = kCcDontCare) OVERRIDE; 7665fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison 77d2b4ca2d02c86b1ce1826fd2b35ce6c9c58c1ff1Vladimir Marko virtual void orn(Register rd, Register rn, const ShifterOperand& so, 78d2b4ca2d02c86b1ce1826fd2b35ce6c9c58c1ff1Vladimir Marko Condition cond = AL, SetCc set_cc = kCcDontCare) OVERRIDE; 79d2b4ca2d02c86b1ce1826fd2b35ce6c9c58c1ff1Vladimir Marko 8073cf0fb75de2a449ce4fe329b5f1fb42eef1372fVladimir Marko virtual void mov(Register rd, const ShifterOperand& so, 8173cf0fb75de2a449ce4fe329b5f1fb42eef1372fVladimir Marko Condition cond = AL, SetCc set_cc = kCcDontCare) OVERRIDE; 8265fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison 8373cf0fb75de2a449ce4fe329b5f1fb42eef1372fVladimir Marko virtual void bic(Register rd, Register rn, const ShifterOperand& so, 8473cf0fb75de2a449ce4fe329b5f1fb42eef1372fVladimir Marko Condition cond = AL, SetCc set_cc = kCcDontCare) OVERRIDE; 8565fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison 8673cf0fb75de2a449ce4fe329b5f1fb42eef1372fVladimir Marko virtual void mvn(Register rd, const ShifterOperand& so, 8773cf0fb75de2a449ce4fe329b5f1fb42eef1372fVladimir Marko Condition cond = AL, SetCc set_cc = kCcDontCare) OVERRIDE; 8865fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison 8965fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison // Miscellaneous data-processing instructions. 9065fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void clz(Register rd, Register rm, Condition cond = AL) OVERRIDE; 9165fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void movw(Register rd, uint16_t imm16, Condition cond = AL) OVERRIDE; 9265fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void movt(Register rd, uint16_t imm16, Condition cond = AL) OVERRIDE; 939ee23f4273efed8d6378f6ad8e63c65e30a17139Scott Wakeling void rbit(Register rd, Register rm, Condition cond = AL) OVERRIDE; 94c257da7b0fb6737f65aba426add8831e45404755Artem Serov void rev(Register rd, Register rm, Condition cond = AL) OVERRIDE; 95c257da7b0fb6737f65aba426add8831e45404755Artem Serov void rev16(Register rd, Register rm, Condition cond = AL) OVERRIDE; 96c257da7b0fb6737f65aba426add8831e45404755Artem Serov void revsh(Register rd, Register rm, Condition cond = AL) OVERRIDE; 9765fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison 9865fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison // Multiply instructions. 9965fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void mul(Register rd, Register rn, Register rm, Condition cond = AL) OVERRIDE; 10065fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void mla(Register rd, Register rn, Register rm, Register ra, 10165fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison Condition cond = AL) OVERRIDE; 10265fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void mls(Register rd, Register rn, Register rm, Register ra, 10365fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison Condition cond = AL) OVERRIDE; 104c66671076b12a0ee8b9d1ae782732cc91beacb73Zheng Xu void smull(Register rd_lo, Register rd_hi, Register rn, Register rm, 105c66671076b12a0ee8b9d1ae782732cc91beacb73Zheng Xu Condition cond = AL) OVERRIDE; 10665fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void umull(Register rd_lo, Register rd_hi, Register rn, Register rm, 10765fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison Condition cond = AL) OVERRIDE; 10865fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison 10965fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void sdiv(Register rd, Register rn, Register rm, Condition cond = AL) OVERRIDE; 11065fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void udiv(Register rd, Register rn, Register rm, Condition cond = AL) OVERRIDE; 11165fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison 112981e45424f52735b1c61ae0eac7e299ed313f8dbRoland Levillain // Bit field extract instructions. 11351d3fc40637fc73d4156ad617cd451b844cbb75eRoland Levillain void sbfx(Register rd, Register rn, uint32_t lsb, uint32_t width, Condition cond = AL) OVERRIDE; 114981e45424f52735b1c61ae0eac7e299ed313f8dbRoland Levillain void ubfx(Register rd, Register rn, uint32_t lsb, uint32_t width, Condition cond = AL) OVERRIDE; 11551d3fc40637fc73d4156ad617cd451b844cbb75eRoland Levillain 11665fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison // Load/store instructions. 11765fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void ldr(Register rd, const Address& ad, Condition cond = AL) OVERRIDE; 11865fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void str(Register rd, const Address& ad, Condition cond = AL) OVERRIDE; 11965fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison 12065fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void ldrb(Register rd, const Address& ad, Condition cond = AL) OVERRIDE; 12165fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void strb(Register rd, const Address& ad, Condition cond = AL) OVERRIDE; 12265fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison 12365fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void ldrh(Register rd, const Address& ad, Condition cond = AL) OVERRIDE; 12465fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void strh(Register rd, const Address& ad, Condition cond = AL) OVERRIDE; 12565fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison 12665fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void ldrsb(Register rd, const Address& ad, Condition cond = AL) OVERRIDE; 12765fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void ldrsh(Register rd, const Address& ad, Condition cond = AL) OVERRIDE; 12865fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison 12965fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void ldrd(Register rd, const Address& ad, Condition cond = AL) OVERRIDE; 13065fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void strd(Register rd, const Address& ad, Condition cond = AL) OVERRIDE; 13165fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison 13265fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void ldm(BlockAddressMode am, Register base, 13365fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison RegList regs, Condition cond = AL) OVERRIDE; 13465fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void stm(BlockAddressMode am, Register base, 13565fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison RegList regs, Condition cond = AL) OVERRIDE; 13665fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison 13765fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void ldrex(Register rd, Register rn, Condition cond = AL) OVERRIDE; 13865fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void strex(Register rd, Register rt, Register rn, Condition cond = AL) OVERRIDE; 13952c489645b6e9ae33623f1ec24143cde5444906eCalin Juravle void ldrexd(Register rt, Register rt2, Register rn, Condition cond = AL) OVERRIDE; 14052c489645b6e9ae33623f1ec24143cde5444906eCalin Juravle void strexd(Register rd, Register rt, Register rt2, Register rn, Condition cond = AL) OVERRIDE; 14165fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison 14265fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison // Miscellaneous instructions. 14365fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void clrex(Condition cond = AL) OVERRIDE; 14465fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void nop(Condition cond = AL) OVERRIDE; 14565fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison 14665fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison // Note that gdb sets breakpoints using the undefined instruction 0xe7f001f0. 14765fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void bkpt(uint16_t imm16) OVERRIDE; 14865fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void svc(uint32_t imm24) OVERRIDE; 14965fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison 15065fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void cbz(Register rn, Label* target) OVERRIDE; 15165fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void cbnz(Register rn, Label* target) OVERRIDE; 15265fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison 15365fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison // Floating point instructions (VFPv3-D16 and VFPv3-D32 profiles). 15465fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void vmovsr(SRegister sn, Register rt, Condition cond = AL) OVERRIDE; 15565fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void vmovrs(Register rt, SRegister sn, Condition cond = AL) OVERRIDE; 15665fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void vmovsrr(SRegister sm, Register rt, Register rt2, Condition cond = AL) OVERRIDE; 15765fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void vmovrrs(Register rt, Register rt2, SRegister sm, Condition cond = AL) OVERRIDE; 15865fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void vmovdrr(DRegister dm, Register rt, Register rt2, Condition cond = AL) OVERRIDE; 15965fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void vmovrrd(Register rt, Register rt2, DRegister dm, Condition cond = AL) OVERRIDE; 16065fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void vmovs(SRegister sd, SRegister sm, Condition cond = AL) OVERRIDE; 16165fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void vmovd(DRegister dd, DRegister dm, Condition cond = AL) OVERRIDE; 16265fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison 16365fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison // Returns false if the immediate cannot be encoded. 16465fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison bool vmovs(SRegister sd, float s_imm, Condition cond = AL) OVERRIDE; 16565fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison bool vmovd(DRegister dd, double d_imm, Condition cond = AL) OVERRIDE; 16665fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison 16765fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void vldrs(SRegister sd, const Address& ad, Condition cond = AL) OVERRIDE; 16865fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void vstrs(SRegister sd, const Address& ad, Condition cond = AL) OVERRIDE; 16965fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void vldrd(DRegister dd, const Address& ad, Condition cond = AL) OVERRIDE; 17065fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void vstrd(DRegister dd, const Address& ad, Condition cond = AL) OVERRIDE; 17165fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison 17265fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void vadds(SRegister sd, SRegister sn, SRegister sm, Condition cond = AL) OVERRIDE; 17365fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void vaddd(DRegister dd, DRegister dn, DRegister dm, Condition cond = AL) OVERRIDE; 17465fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void vsubs(SRegister sd, SRegister sn, SRegister sm, Condition cond = AL) OVERRIDE; 17565fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void vsubd(DRegister dd, DRegister dn, DRegister dm, Condition cond = AL) OVERRIDE; 17665fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void vmuls(SRegister sd, SRegister sn, SRegister sm, Condition cond = AL) OVERRIDE; 17765fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void vmuld(DRegister dd, DRegister dn, DRegister dm, Condition cond = AL) OVERRIDE; 17865fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void vmlas(SRegister sd, SRegister sn, SRegister sm, Condition cond = AL) OVERRIDE; 17965fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void vmlad(DRegister dd, DRegister dn, DRegister dm, Condition cond = AL) OVERRIDE; 18065fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void vmlss(SRegister sd, SRegister sn, SRegister sm, Condition cond = AL) OVERRIDE; 18165fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void vmlsd(DRegister dd, DRegister dn, DRegister dm, Condition cond = AL) OVERRIDE; 18265fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void vdivs(SRegister sd, SRegister sn, SRegister sm, Condition cond = AL) OVERRIDE; 18365fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void vdivd(DRegister dd, DRegister dn, DRegister dm, Condition cond = AL) OVERRIDE; 18465fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison 18565fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void vabss(SRegister sd, SRegister sm, Condition cond = AL) OVERRIDE; 18665fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void vabsd(DRegister dd, DRegister dm, Condition cond = AL) OVERRIDE; 18765fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void vnegs(SRegister sd, SRegister sm, Condition cond = AL) OVERRIDE; 18865fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void vnegd(DRegister dd, DRegister dm, Condition cond = AL) OVERRIDE; 18965fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void vsqrts(SRegister sd, SRegister sm, Condition cond = AL) OVERRIDE; 19065fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void vsqrtd(DRegister dd, DRegister dm, Condition cond = AL) OVERRIDE; 19165fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison 19265fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void vcvtsd(SRegister sd, DRegister dm, Condition cond = AL) OVERRIDE; 19365fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void vcvtds(DRegister dd, SRegister sm, Condition cond = AL) OVERRIDE; 19465fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void vcvtis(SRegister sd, SRegister sm, Condition cond = AL) OVERRIDE; 19565fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void vcvtid(SRegister sd, DRegister dm, Condition cond = AL) OVERRIDE; 19665fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void vcvtsi(SRegister sd, SRegister sm, Condition cond = AL) OVERRIDE; 19765fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void vcvtdi(DRegister dd, SRegister sm, Condition cond = AL) OVERRIDE; 19865fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void vcvtus(SRegister sd, SRegister sm, Condition cond = AL) OVERRIDE; 19965fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void vcvtud(SRegister sd, DRegister dm, Condition cond = AL) OVERRIDE; 20065fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void vcvtsu(SRegister sd, SRegister sm, Condition cond = AL) OVERRIDE; 20165fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void vcvtdu(DRegister dd, SRegister sm, Condition cond = AL) OVERRIDE; 20265fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison 20365fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void vcmps(SRegister sd, SRegister sm, Condition cond = AL) OVERRIDE; 20465fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void vcmpd(DRegister dd, DRegister dm, Condition cond = AL) OVERRIDE; 20565fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void vcmpsz(SRegister sd, Condition cond = AL) OVERRIDE; 20665fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void vcmpdz(DRegister dd, Condition cond = AL) OVERRIDE; 20765fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void vmstat(Condition cond = AL) OVERRIDE; // VMRS APSR_nzcv, FPSCR 20865fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison 20965fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void vpushs(SRegister reg, int nregs, Condition cond = AL) OVERRIDE; 21065fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void vpushd(DRegister reg, int nregs, Condition cond = AL) OVERRIDE; 21165fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void vpops(SRegister reg, int nregs, Condition cond = AL) OVERRIDE; 21265fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void vpopd(DRegister reg, int nregs, Condition cond = AL) OVERRIDE; 21365fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison 21465fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison // Branch instructions. 215d56376cce54e7df976780ecbd03228f60d276433Nicolas Geoffray void b(Label* label, Condition cond = AL) OVERRIDE; 216d56376cce54e7df976780ecbd03228f60d276433Nicolas Geoffray void bl(Label* label, Condition cond = AL) OVERRIDE; 21765fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void blx(Register rm, Condition cond = AL) OVERRIDE; 21865fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void bx(Register rm, Condition cond = AL) OVERRIDE; 21973cf0fb75de2a449ce4fe329b5f1fb42eef1372fVladimir Marko virtual void Lsl(Register rd, Register rm, uint32_t shift_imm, 22073cf0fb75de2a449ce4fe329b5f1fb42eef1372fVladimir Marko Condition cond = AL, SetCc set_cc = kCcDontCare) OVERRIDE; 22173cf0fb75de2a449ce4fe329b5f1fb42eef1372fVladimir Marko virtual void Lsr(Register rd, Register rm, uint32_t shift_imm, 22273cf0fb75de2a449ce4fe329b5f1fb42eef1372fVladimir Marko Condition cond = AL, SetCc set_cc = kCcDontCare) OVERRIDE; 22373cf0fb75de2a449ce4fe329b5f1fb42eef1372fVladimir Marko virtual void Asr(Register rd, Register rm, uint32_t shift_imm, 22473cf0fb75de2a449ce4fe329b5f1fb42eef1372fVladimir Marko Condition cond = AL, SetCc set_cc = kCcDontCare) OVERRIDE; 22573cf0fb75de2a449ce4fe329b5f1fb42eef1372fVladimir Marko virtual void Ror(Register rd, Register rm, uint32_t shift_imm, 22673cf0fb75de2a449ce4fe329b5f1fb42eef1372fVladimir Marko Condition cond = AL, SetCc set_cc = kCcDontCare) OVERRIDE; 22773cf0fb75de2a449ce4fe329b5f1fb42eef1372fVladimir Marko virtual void Rrx(Register rd, Register rm, 22873cf0fb75de2a449ce4fe329b5f1fb42eef1372fVladimir Marko Condition cond = AL, SetCc set_cc = kCcDontCare) OVERRIDE; 22973cf0fb75de2a449ce4fe329b5f1fb42eef1372fVladimir Marko 23073cf0fb75de2a449ce4fe329b5f1fb42eef1372fVladimir Marko virtual void Lsl(Register rd, Register rm, Register rn, 23173cf0fb75de2a449ce4fe329b5f1fb42eef1372fVladimir Marko Condition cond = AL, SetCc set_cc = kCcDontCare) OVERRIDE; 23273cf0fb75de2a449ce4fe329b5f1fb42eef1372fVladimir Marko virtual void Lsr(Register rd, Register rm, Register rn, 23373cf0fb75de2a449ce4fe329b5f1fb42eef1372fVladimir Marko Condition cond = AL, SetCc set_cc = kCcDontCare) OVERRIDE; 23473cf0fb75de2a449ce4fe329b5f1fb42eef1372fVladimir Marko virtual void Asr(Register rd, Register rm, Register rn, 23573cf0fb75de2a449ce4fe329b5f1fb42eef1372fVladimir Marko Condition cond = AL, SetCc set_cc = kCcDontCare) OVERRIDE; 23673cf0fb75de2a449ce4fe329b5f1fb42eef1372fVladimir Marko virtual void Ror(Register rd, Register rm, Register rn, 23773cf0fb75de2a449ce4fe329b5f1fb42eef1372fVladimir Marko Condition cond = AL, SetCc set_cc = kCcDontCare) OVERRIDE; 23865fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison 23965fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void Push(Register rd, Condition cond = AL) OVERRIDE; 24065fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void Pop(Register rd, Condition cond = AL) OVERRIDE; 24165fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison 24265fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void PushList(RegList regs, Condition cond = AL) OVERRIDE; 24365fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void PopList(RegList regs, Condition cond = AL) OVERRIDE; 24465fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison 24565fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void Mov(Register rd, Register rm, Condition cond = AL) OVERRIDE; 24665fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison 24765fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void CompareAndBranchIfZero(Register r, Label* label) OVERRIDE; 24865fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void CompareAndBranchIfNonZero(Register r, Label* label) OVERRIDE; 24965fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison 25019a19cffd197a28ae4c9c3e59eff6352fd392241Nicolas Geoffray // Memory barriers. 25119a19cffd197a28ae4c9c3e59eff6352fd392241Nicolas Geoffray void dmb(DmbOptions flavor) OVERRIDE; 25265fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison 253cf93a5cd9c978f59113d42f9f642fab5e2cc8877Vladimir Marko // Get the final position of a label after local fixup based on the old position 254cf93a5cd9c978f59113d42f9f642fab5e2cc8877Vladimir Marko // recorded before FinalizeCode(). 255cf93a5cd9c978f59113d42f9f642fab5e2cc8877Vladimir Marko uint32_t GetAdjustedPosition(uint32_t old_position) OVERRIDE; 256cf93a5cd9c978f59113d42f9f642fab5e2cc8877Vladimir Marko 257cf93a5cd9c978f59113d42f9f642fab5e2cc8877Vladimir Marko Literal* NewLiteral(size_t size, const uint8_t* data) OVERRIDE; 258cf93a5cd9c978f59113d42f9f642fab5e2cc8877Vladimir Marko void LoadLiteral(Register rt, Literal* literal) OVERRIDE; 259cf93a5cd9c978f59113d42f9f642fab5e2cc8877Vladimir Marko void LoadLiteral(Register rt, Register rt2, Literal* literal) OVERRIDE; 260cf93a5cd9c978f59113d42f9f642fab5e2cc8877Vladimir Marko void LoadLiteral(SRegister sd, Literal* literal) OVERRIDE; 261cf93a5cd9c978f59113d42f9f642fab5e2cc8877Vladimir Marko void LoadLiteral(DRegister dd, Literal* literal) OVERRIDE; 262cf93a5cd9c978f59113d42f9f642fab5e2cc8877Vladimir Marko 26365fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison // Add signed constant value to rd. May clobber IP. 26465fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void AddConstant(Register rd, Register rn, int32_t value, 265449b10922daacc880374d7862dbb5977c7657f6dVladimir Marko Condition cond = AL, SetCc set_cc = kCcDontCare) OVERRIDE; 26665fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison 2677cffc3b0004d32faffc552c0a59286f369b21504Andreas Gampe void CmpConstant(Register rn, int32_t value, Condition cond = AL) OVERRIDE; 2687cffc3b0004d32faffc552c0a59286f369b21504Andreas Gampe 26965fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison // Load and Store. May clobber IP. 27065fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void LoadImmediate(Register rd, int32_t value, Condition cond = AL) OVERRIDE; 27165fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void MarkExceptionHandler(Label* label) OVERRIDE; 27265fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void LoadFromOffset(LoadOperandType type, 27365fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison Register reg, 27465fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison Register base, 27565fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison int32_t offset, 27665fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison Condition cond = AL) OVERRIDE; 27765fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void StoreToOffset(StoreOperandType type, 27865fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison Register reg, 27965fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison Register base, 28065fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison int32_t offset, 28165fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison Condition cond = AL) OVERRIDE; 28265fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void LoadSFromOffset(SRegister reg, 28365fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison Register base, 28465fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison int32_t offset, 28565fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison Condition cond = AL) OVERRIDE; 28665fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void StoreSToOffset(SRegister reg, 28765fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison Register base, 28865fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison int32_t offset, 28965fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison Condition cond = AL) OVERRIDE; 29065fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void LoadDFromOffset(DRegister reg, 29165fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison Register base, 29265fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison int32_t offset, 29365fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison Condition cond = AL) OVERRIDE; 29465fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void StoreDToOffset(DRegister reg, 29565fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison Register base, 29665fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison int32_t offset, 29765fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison Condition cond = AL) OVERRIDE; 29865fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison 2993bcc8ea079d867f26622defd0611d134a3b4ae49Nicolas Geoffray bool ShifterOperandCanHold(Register rd, 3003bcc8ea079d867f26622defd0611d134a3b4ae49Nicolas Geoffray Register rn, 3013bcc8ea079d867f26622defd0611d134a3b4ae49Nicolas Geoffray Opcode opcode, 3023bcc8ea079d867f26622defd0611d134a3b4ae49Nicolas Geoffray uint32_t immediate, 303f5c09c3ed5bca4c34d8476dd9ed2714106fafbcfVladimir Marko SetCc set_cc, 3043bcc8ea079d867f26622defd0611d134a3b4ae49Nicolas Geoffray ShifterOperand* shifter_op) OVERRIDE; 305f5c09c3ed5bca4c34d8476dd9ed2714106fafbcfVladimir Marko using ArmAssembler::ShifterOperandCanHold; // Don't hide the non-virtual override. 3063bcc8ea079d867f26622defd0611d134a3b4ae49Nicolas Geoffray 3075bd05a5c9492189ec28edaf6396d6a39ddf03367Nicolas Geoffray bool ShifterOperandCanAlwaysHold(uint32_t immediate) OVERRIDE; 30865fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison 30913735955f39b3b304c37d2b2840663c131262c18Ian Rogers static bool IsInstructionForExceptionHandling(uintptr_t pc); 31065fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison 31165fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison // Emit data (e.g. encoded instruction or immediate) to the 31265fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison // instruction stream. 31365fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void Emit(int32_t value); 31465fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void Bind(Label* label) OVERRIDE; 31565fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison 31665fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void MemoryBarrier(ManagedRegister scratch) OVERRIDE; 31765fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison 3187cffc3b0004d32faffc552c0a59286f369b21504Andreas Gampe JumpTable* CreateJumpTable(std::vector<Label*>&& labels, Register base_reg) OVERRIDE; 3197cffc3b0004d32faffc552c0a59286f369b21504Andreas Gampe void EmitJumpTableDispatch(JumpTable* jump_table, Register displacement_reg) OVERRIDE; 3207cffc3b0004d32faffc552c0a59286f369b21504Andreas Gampe 3217cffc3b0004d32faffc552c0a59286f369b21504Andreas Gampe void FinalizeCode() OVERRIDE; 3227cffc3b0004d32faffc552c0a59286f369b21504Andreas Gampe 32365fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison private: 32465fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void EmitType01(Condition cond, 32565fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison int type, 32665fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison Opcode opcode, 32773cf0fb75de2a449ce4fe329b5f1fb42eef1372fVladimir Marko SetCc set_cc, 32865fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison Register rn, 32965fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison Register rd, 33065fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison const ShifterOperand& so); 33165fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison 33265fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void EmitType5(Condition cond, int offset, bool link); 33365fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison 33465fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void EmitMemOp(Condition cond, 33565fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison bool load, 33665fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison bool byte, 33765fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison Register rd, 33865fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison const Address& ad); 33965fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison 34065fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void EmitMemOpAddressMode3(Condition cond, 34165fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison int32_t mode, 34265fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison Register rd, 34365fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison const Address& ad); 34465fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison 34565fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void EmitMultiMemOp(Condition cond, 34665fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison BlockAddressMode am, 34765fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison bool load, 34865fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison Register base, 34965fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison RegList regs); 35065fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison 35165fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void EmitShiftImmediate(Condition cond, 35265fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison Shift opcode, 35365fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison Register rd, 35465fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison Register rm, 35565fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison const ShifterOperand& so); 35665fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison 35765fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void EmitShiftRegister(Condition cond, 35865fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison Shift opcode, 35965fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison Register rd, 36065fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison Register rm, 36165fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison const ShifterOperand& so); 36265fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison 36365fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void EmitMulOp(Condition cond, 36465fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison int32_t opcode, 36565fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison Register rd, 36665fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison Register rn, 36765fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison Register rm, 36865fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison Register rs); 36965fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison 37065fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void EmitVFPsss(Condition cond, 37165fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison int32_t opcode, 37265fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison SRegister sd, 37365fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison SRegister sn, 37465fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison SRegister sm); 37565fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison 37665fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void EmitVFPddd(Condition cond, 37765fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison int32_t opcode, 37865fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison DRegister dd, 37965fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison DRegister dn, 38065fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison DRegister dm); 38165fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison 38265fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void EmitVFPsd(Condition cond, 38365fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison int32_t opcode, 38465fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison SRegister sd, 38565fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison DRegister dm); 38665fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison 38765fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void EmitVFPds(Condition cond, 38865fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison int32_t opcode, 38965fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison DRegister dd, 39065fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison SRegister sm); 39165fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison 39265fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void EmitVPushPop(uint32_t reg, int nregs, bool push, bool dbl, Condition cond); 39365fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison 394c257da7b0fb6737f65aba426add8831e45404755Artem Serov void EmitMiscellaneous(Condition cond, uint8_t op1, uint8_t op2, 395c257da7b0fb6737f65aba426add8831e45404755Artem Serov uint32_t a_part, uint32_t rest); 396c257da7b0fb6737f65aba426add8831e45404755Artem Serov void EmitReverseBytes(Register rd, Register rm, Condition cond, 397c257da7b0fb6737f65aba426add8831e45404755Artem Serov uint8_t op1, uint8_t op2); 398c257da7b0fb6737f65aba426add8831e45404755Artem Serov 39965fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison void EmitBranch(Condition cond, Label* label, bool link); 40065fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison static int32_t EncodeBranchOffset(int offset, int32_t inst); 40165fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison static int DecodeBranchOffset(int32_t inst); 4023bcc8ea079d867f26622defd0611d134a3b4ae49Nicolas Geoffray bool ShifterOperandCanHoldArm32(uint32_t immediate, ShifterOperand* shifter_op); 40365fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison}; 40465fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison 40565fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison} // namespace arm 40665fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison} // namespace art 40765fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison 40865fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7Dave Allison#endif // ART_COMPILER_UTILS_ARM_ASSEMBLER_ARM32_H_ 409