assembler_mips_test.cc revision 5c7aed3b9844e240cf785e5885524ac133a04396 
1/*
2 * Copyright (C) 2015 The Android Open Source Project
3 *
4 * Licensed under the Apache License, Version 2.0 (the "License");
5 * you may not use this file except in compliance with the License.
6 * You may obtain a copy of the License at
7 *
8 *      http://www.apache.org/licenses/LICENSE-2.0
9 *
10 * Unless required by applicable law or agreed to in writing, software
11 * distributed under the License is distributed on an "AS IS" BASIS,
12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 * See the License for the specific language governing permissions and
14 * limitations under the License.
15 */
16
17#include "assembler_mips.h"
18
19#include <map>
20
21#include "base/stl_util.h"
22#include "utils/assembler_test.h"
23
24#define __ GetAssembler()->
25
26namespace art {
27
28struct MIPSCpuRegisterCompare {
29  bool operator()(const mips::Register& a, const mips::Register& b) const {
30    return a < b;
31  }
32};
33
34class AssemblerMIPSTest : public AssemblerTest<mips::MipsAssembler,
35                                               mips::Register,
36                                               mips::FRegister,
37                                               uint32_t> {
38 public:
39  typedef AssemblerTest<mips::MipsAssembler, mips::Register, mips::FRegister, uint32_t> Base;
40
41 protected:
42  // Get the typically used name for this architecture, e.g., aarch64, x86-64, ...
43  std::string GetArchitectureString() OVERRIDE {
44    return "mips";
45  }
46
47  std::string GetAssemblerParameters() OVERRIDE {
48    return " --no-warn -32 -march=mips32r2";
49  }
50
51  std::string GetDisassembleParameters() OVERRIDE {
52    return " -D -bbinary -mmips:isa32r2";
53  }
54
55  void SetUpHelpers() OVERRIDE {
56    if (registers_.size() == 0) {
57      registers_.push_back(new mips::Register(mips::ZERO));
58      registers_.push_back(new mips::Register(mips::AT));
59      registers_.push_back(new mips::Register(mips::V0));
60      registers_.push_back(new mips::Register(mips::V1));
61      registers_.push_back(new mips::Register(mips::A0));
62      registers_.push_back(new mips::Register(mips::A1));
63      registers_.push_back(new mips::Register(mips::A2));
64      registers_.push_back(new mips::Register(mips::A3));
65      registers_.push_back(new mips::Register(mips::T0));
66      registers_.push_back(new mips::Register(mips::T1));
67      registers_.push_back(new mips::Register(mips::T2));
68      registers_.push_back(new mips::Register(mips::T3));
69      registers_.push_back(new mips::Register(mips::T4));
70      registers_.push_back(new mips::Register(mips::T5));
71      registers_.push_back(new mips::Register(mips::T6));
72      registers_.push_back(new mips::Register(mips::T7));
73      registers_.push_back(new mips::Register(mips::S0));
74      registers_.push_back(new mips::Register(mips::S1));
75      registers_.push_back(new mips::Register(mips::S2));
76      registers_.push_back(new mips::Register(mips::S3));
77      registers_.push_back(new mips::Register(mips::S4));
78      registers_.push_back(new mips::Register(mips::S5));
79      registers_.push_back(new mips::Register(mips::S6));
80      registers_.push_back(new mips::Register(mips::S7));
81      registers_.push_back(new mips::Register(mips::T8));
82      registers_.push_back(new mips::Register(mips::T9));
83      registers_.push_back(new mips::Register(mips::K0));
84      registers_.push_back(new mips::Register(mips::K1));
85      registers_.push_back(new mips::Register(mips::GP));
86      registers_.push_back(new mips::Register(mips::SP));
87      registers_.push_back(new mips::Register(mips::FP));
88      registers_.push_back(new mips::Register(mips::RA));
89
90      secondary_register_names_.emplace(mips::Register(mips::ZERO), "zero");
91      secondary_register_names_.emplace(mips::Register(mips::AT), "at");
92      secondary_register_names_.emplace(mips::Register(mips::V0), "v0");
93      secondary_register_names_.emplace(mips::Register(mips::V1), "v1");
94      secondary_register_names_.emplace(mips::Register(mips::A0), "a0");
95      secondary_register_names_.emplace(mips::Register(mips::A1), "a1");
96      secondary_register_names_.emplace(mips::Register(mips::A2), "a2");
97      secondary_register_names_.emplace(mips::Register(mips::A3), "a3");
98      secondary_register_names_.emplace(mips::Register(mips::T0), "t0");
99      secondary_register_names_.emplace(mips::Register(mips::T1), "t1");
100      secondary_register_names_.emplace(mips::Register(mips::T2), "t2");
101      secondary_register_names_.emplace(mips::Register(mips::T3), "t3");
102      secondary_register_names_.emplace(mips::Register(mips::T4), "t4");
103      secondary_register_names_.emplace(mips::Register(mips::T5), "t5");
104      secondary_register_names_.emplace(mips::Register(mips::T6), "t6");
105      secondary_register_names_.emplace(mips::Register(mips::T7), "t7");
106      secondary_register_names_.emplace(mips::Register(mips::S0), "s0");
107      secondary_register_names_.emplace(mips::Register(mips::S1), "s1");
108      secondary_register_names_.emplace(mips::Register(mips::S2), "s2");
109      secondary_register_names_.emplace(mips::Register(mips::S3), "s3");
110      secondary_register_names_.emplace(mips::Register(mips::S4), "s4");
111      secondary_register_names_.emplace(mips::Register(mips::S5), "s5");
112      secondary_register_names_.emplace(mips::Register(mips::S6), "s6");
113      secondary_register_names_.emplace(mips::Register(mips::S7), "s7");
114      secondary_register_names_.emplace(mips::Register(mips::T8), "t8");
115      secondary_register_names_.emplace(mips::Register(mips::T9), "t9");
116      secondary_register_names_.emplace(mips::Register(mips::K0), "k0");
117      secondary_register_names_.emplace(mips::Register(mips::K1), "k1");
118      secondary_register_names_.emplace(mips::Register(mips::GP), "gp");
119      secondary_register_names_.emplace(mips::Register(mips::SP), "sp");
120      secondary_register_names_.emplace(mips::Register(mips::FP), "fp");
121      secondary_register_names_.emplace(mips::Register(mips::RA), "ra");
122
123      fp_registers_.push_back(new mips::FRegister(mips::F0));
124      fp_registers_.push_back(new mips::FRegister(mips::F1));
125      fp_registers_.push_back(new mips::FRegister(mips::F2));
126      fp_registers_.push_back(new mips::FRegister(mips::F3));
127      fp_registers_.push_back(new mips::FRegister(mips::F4));
128      fp_registers_.push_back(new mips::FRegister(mips::F5));
129      fp_registers_.push_back(new mips::FRegister(mips::F6));
130      fp_registers_.push_back(new mips::FRegister(mips::F7));
131      fp_registers_.push_back(new mips::FRegister(mips::F8));
132      fp_registers_.push_back(new mips::FRegister(mips::F9));
133      fp_registers_.push_back(new mips::FRegister(mips::F10));
134      fp_registers_.push_back(new mips::FRegister(mips::F11));
135      fp_registers_.push_back(new mips::FRegister(mips::F12));
136      fp_registers_.push_back(new mips::FRegister(mips::F13));
137      fp_registers_.push_back(new mips::FRegister(mips::F14));
138      fp_registers_.push_back(new mips::FRegister(mips::F15));
139      fp_registers_.push_back(new mips::FRegister(mips::F16));
140      fp_registers_.push_back(new mips::FRegister(mips::F17));
141      fp_registers_.push_back(new mips::FRegister(mips::F18));
142      fp_registers_.push_back(new mips::FRegister(mips::F19));
143      fp_registers_.push_back(new mips::FRegister(mips::F20));
144      fp_registers_.push_back(new mips::FRegister(mips::F21));
145      fp_registers_.push_back(new mips::FRegister(mips::F22));
146      fp_registers_.push_back(new mips::FRegister(mips::F23));
147      fp_registers_.push_back(new mips::FRegister(mips::F24));
148      fp_registers_.push_back(new mips::FRegister(mips::F25));
149      fp_registers_.push_back(new mips::FRegister(mips::F26));
150      fp_registers_.push_back(new mips::FRegister(mips::F27));
151      fp_registers_.push_back(new mips::FRegister(mips::F28));
152      fp_registers_.push_back(new mips::FRegister(mips::F29));
153      fp_registers_.push_back(new mips::FRegister(mips::F30));
154      fp_registers_.push_back(new mips::FRegister(mips::F31));
155    }
156  }
157
158  void TearDown() OVERRIDE {
159    AssemblerTest::TearDown();
160    STLDeleteElements(&registers_);
161    STLDeleteElements(&fp_registers_);
162  }
163
164  std::vector<mips::Register*> GetRegisters() OVERRIDE {
165    return registers_;
166  }
167
168  std::vector<mips::FRegister*> GetFPRegisters() OVERRIDE {
169    return fp_registers_;
170  }
171
172  uint32_t CreateImmediate(int64_t imm_value) OVERRIDE {
173    return imm_value;
174  }
175
176  std::string GetSecondaryRegisterName(const mips::Register& reg) OVERRIDE {
177    CHECK(secondary_register_names_.find(reg) != secondary_register_names_.end());
178    return secondary_register_names_[reg];
179  }
180
181  std::string RepeatInsn(size_t count, const std::string& insn) {
182    std::string result;
183    for (; count != 0u; --count) {
184      result += insn;
185    }
186    return result;
187  }
188
189  void BranchCondOneRegHelper(void (mips::MipsAssembler::*f)(mips::Register,
190                                                             mips::MipsLabel*),
191                              std::string instr_name) {
192    mips::MipsLabel label;
193    (Base::GetAssembler()->*f)(mips::A0, &label);
194    constexpr size_t kAdduCount1 = 63;
195    for (size_t i = 0; i != kAdduCount1; ++i) {
196      __ Addu(mips::ZERO, mips::ZERO, mips::ZERO);
197    }
198    __ Bind(&label);
199    constexpr size_t kAdduCount2 = 64;
200    for (size_t i = 0; i != kAdduCount2; ++i) {
201      __ Addu(mips::ZERO, mips::ZERO, mips::ZERO);
202    }
203    (Base::GetAssembler()->*f)(mips::A1, &label);
204
205    std::string expected =
206        ".set noreorder\n" +
207        instr_name + " $a0, 1f\n"
208        "nop\n" +
209        RepeatInsn(kAdduCount1, "addu $zero, $zero, $zero\n") +
210        "1:\n" +
211        RepeatInsn(kAdduCount2, "addu $zero, $zero, $zero\n") +
212        instr_name + " $a1, 1b\n"
213        "nop\n";
214    DriverStr(expected, instr_name);
215  }
216
217  void BranchCondTwoRegsHelper(void (mips::MipsAssembler::*f)(mips::Register,
218                                                              mips::Register,
219                                                              mips::MipsLabel*),
220                               std::string instr_name) {
221    mips::MipsLabel label;
222    (Base::GetAssembler()->*f)(mips::A0, mips::A1, &label);
223    constexpr size_t kAdduCount1 = 63;
224    for (size_t i = 0; i != kAdduCount1; ++i) {
225      __ Addu(mips::ZERO, mips::ZERO, mips::ZERO);
226    }
227    __ Bind(&label);
228    constexpr size_t kAdduCount2 = 64;
229    for (size_t i = 0; i != kAdduCount2; ++i) {
230      __ Addu(mips::ZERO, mips::ZERO, mips::ZERO);
231    }
232    (Base::GetAssembler()->*f)(mips::A2, mips::A3, &label);
233
234    std::string expected =
235        ".set noreorder\n" +
236        instr_name + " $a0, $a1, 1f\n"
237        "nop\n" +
238        RepeatInsn(kAdduCount1, "addu $zero, $zero, $zero\n") +
239        "1:\n" +
240        RepeatInsn(kAdduCount2, "addu $zero, $zero, $zero\n") +
241        instr_name + " $a2, $a3, 1b\n"
242        "nop\n";
243    DriverStr(expected, instr_name);
244  }
245
246 private:
247  std::vector<mips::Register*> registers_;
248  std::map<mips::Register, std::string, MIPSCpuRegisterCompare> secondary_register_names_;
249
250  std::vector<mips::FRegister*> fp_registers_;
251};
252
253
254TEST_F(AssemblerMIPSTest, Toolchain) {
255  EXPECT_TRUE(CheckTools());
256}
257
258TEST_F(AssemblerMIPSTest, Addu) {
259  DriverStr(RepeatRRR(&mips::MipsAssembler::Addu, "addu ${reg1}, ${reg2}, ${reg3}"), "Addu");
260}
261
262TEST_F(AssemblerMIPSTest, Addiu) {
263  DriverStr(RepeatRRIb(&mips::MipsAssembler::Addiu, -16, "addiu ${reg1}, ${reg2}, {imm}"), "Addiu");
264}
265
266TEST_F(AssemblerMIPSTest, Subu) {
267  DriverStr(RepeatRRR(&mips::MipsAssembler::Subu, "subu ${reg1}, ${reg2}, ${reg3}"), "Subu");
268}
269
270TEST_F(AssemblerMIPSTest, MultR2) {
271  DriverStr(RepeatRR(&mips::MipsAssembler::MultR2, "mult ${reg1}, ${reg2}"), "MultR2");
272}
273
274TEST_F(AssemblerMIPSTest, MultuR2) {
275  DriverStr(RepeatRR(&mips::MipsAssembler::MultuR2, "multu ${reg1}, ${reg2}"), "MultuR2");
276}
277
278TEST_F(AssemblerMIPSTest, DivR2Basic) {
279  DriverStr(RepeatRR(&mips::MipsAssembler::DivR2, "div $zero, ${reg1}, ${reg2}"), "DivR2Basic");
280}
281
282TEST_F(AssemblerMIPSTest, DivuR2Basic) {
283  DriverStr(RepeatRR(&mips::MipsAssembler::DivuR2, "divu $zero, ${reg1}, ${reg2}"), "DivuR2Basic");
284}
285
286TEST_F(AssemblerMIPSTest, MulR2) {
287  DriverStr(RepeatRRR(&mips::MipsAssembler::MulR2, "mul ${reg1}, ${reg2}, ${reg3}"), "MulR2");
288}
289
290TEST_F(AssemblerMIPSTest, DivR2) {
291  DriverStr(RepeatRRR(&mips::MipsAssembler::DivR2, "div $zero, ${reg2}, ${reg3}\nmflo ${reg1}"),
292            "DivR2");
293}
294
295TEST_F(AssemblerMIPSTest, ModR2) {
296  DriverStr(RepeatRRR(&mips::MipsAssembler::ModR2, "div $zero, ${reg2}, ${reg3}\nmfhi ${reg1}"),
297            "ModR2");
298}
299
300TEST_F(AssemblerMIPSTest, DivuR2) {
301  DriverStr(RepeatRRR(&mips::MipsAssembler::DivuR2, "divu $zero, ${reg2}, ${reg3}\nmflo ${reg1}"),
302            "DivuR2");
303}
304
305TEST_F(AssemblerMIPSTest, ModuR2) {
306  DriverStr(RepeatRRR(&mips::MipsAssembler::ModuR2, "divu $zero, ${reg2}, ${reg3}\nmfhi ${reg1}"),
307            "ModuR2");
308}
309
310TEST_F(AssemblerMIPSTest, And) {
311  DriverStr(RepeatRRR(&mips::MipsAssembler::And, "and ${reg1}, ${reg2}, ${reg3}"), "And");
312}
313
314TEST_F(AssemblerMIPSTest, Andi) {
315  DriverStr(RepeatRRIb(&mips::MipsAssembler::Andi, 16, "andi ${reg1}, ${reg2}, {imm}"), "Andi");
316}
317
318TEST_F(AssemblerMIPSTest, Or) {
319  DriverStr(RepeatRRR(&mips::MipsAssembler::Or, "or ${reg1}, ${reg2}, ${reg3}"), "Or");
320}
321
322TEST_F(AssemblerMIPSTest, Ori) {
323  DriverStr(RepeatRRIb(&mips::MipsAssembler::Ori, 16, "ori ${reg1}, ${reg2}, {imm}"), "Ori");
324}
325
326TEST_F(AssemblerMIPSTest, Xor) {
327  DriverStr(RepeatRRR(&mips::MipsAssembler::Xor, "xor ${reg1}, ${reg2}, ${reg3}"), "Xor");
328}
329
330TEST_F(AssemblerMIPSTest, Xori) {
331  DriverStr(RepeatRRIb(&mips::MipsAssembler::Xori, 16, "xori ${reg1}, ${reg2}, {imm}"), "Xori");
332}
333
334TEST_F(AssemblerMIPSTest, Nor) {
335  DriverStr(RepeatRRR(&mips::MipsAssembler::Nor, "nor ${reg1}, ${reg2}, ${reg3}"), "Nor");
336}
337
338TEST_F(AssemblerMIPSTest, Seb) {
339  DriverStr(RepeatRR(&mips::MipsAssembler::Seb, "seb ${reg1}, ${reg2}"), "Seb");
340}
341
342TEST_F(AssemblerMIPSTest, Seh) {
343  DriverStr(RepeatRR(&mips::MipsAssembler::Seh, "seh ${reg1}, ${reg2}"), "Seh");
344}
345
346TEST_F(AssemblerMIPSTest, Sll) {
347  DriverStr(RepeatRRIb(&mips::MipsAssembler::Sll, 5, "sll ${reg1}, ${reg2}, {imm}"), "Sll");
348}
349
350TEST_F(AssemblerMIPSTest, Srl) {
351  DriverStr(RepeatRRIb(&mips::MipsAssembler::Srl, 5, "srl ${reg1}, ${reg2}, {imm}"), "Srl");
352}
353
354TEST_F(AssemblerMIPSTest, Sra) {
355  DriverStr(RepeatRRIb(&mips::MipsAssembler::Sra, 5, "sra ${reg1}, ${reg2}, {imm}"), "Sra");
356}
357
358TEST_F(AssemblerMIPSTest, Sllv) {
359  DriverStr(RepeatRRR(&mips::MipsAssembler::Sllv, "sllv ${reg1}, ${reg2}, ${reg3}"), "Sllv");
360}
361
362TEST_F(AssemblerMIPSTest, Srlv) {
363  DriverStr(RepeatRRR(&mips::MipsAssembler::Srlv, "srlv ${reg1}, ${reg2}, ${reg3}"), "Srlv");
364}
365
366TEST_F(AssemblerMIPSTest, Srav) {
367  DriverStr(RepeatRRR(&mips::MipsAssembler::Srav, "srav ${reg1}, ${reg2}, ${reg3}"), "Srav");
368}
369
370TEST_F(AssemblerMIPSTest, Ins) {
371  std::vector<mips::Register*> regs = GetRegisters();
372  WarnOnCombinations(regs.size() * regs.size() * 33 * 16);
373  std::string expected;
374  for (mips::Register* reg1 : regs) {
375    for (mips::Register* reg2 : regs) {
376      for (int32_t pos = 0; pos < 32; pos++) {
377        for (int32_t size = 1; pos + size <= 32; size++) {
378          __ Ins(*reg1, *reg2, pos, size);
379          std::ostringstream instr;
380          instr << "ins $" << *reg1 << ", $" << *reg2 << ", " << pos << ", " << size << "\n";
381          expected += instr.str();
382        }
383      }
384    }
385  }
386  DriverStr(expected, "Ins");
387}
388
389TEST_F(AssemblerMIPSTest, Ext) {
390  std::vector<mips::Register*> regs = GetRegisters();
391  WarnOnCombinations(regs.size() * regs.size() * 33 * 16);
392  std::string expected;
393  for (mips::Register* reg1 : regs) {
394    for (mips::Register* reg2 : regs) {
395      for (int32_t pos = 0; pos < 32; pos++) {
396        for (int32_t size = 1; pos + size <= 32; size++) {
397          __ Ext(*reg1, *reg2, pos, size);
398          std::ostringstream instr;
399          instr << "ext $" << *reg1 << ", $" << *reg2 << ", " << pos << ", " << size << "\n";
400          expected += instr.str();
401        }
402      }
403    }
404  }
405  DriverStr(expected, "Ext");
406}
407
408TEST_F(AssemblerMIPSTest, Lb) {
409  DriverStr(RepeatRRIb(&mips::MipsAssembler::Lb, -16, "lb ${reg1}, {imm}(${reg2})"), "Lb");
410}
411
412TEST_F(AssemblerMIPSTest, Lh) {
413  DriverStr(RepeatRRIb(&mips::MipsAssembler::Lh, -16, "lh ${reg1}, {imm}(${reg2})"), "Lh");
414}
415
416TEST_F(AssemblerMIPSTest, Lw) {
417  DriverStr(RepeatRRIb(&mips::MipsAssembler::Lw, -16, "lw ${reg1}, {imm}(${reg2})"), "Lw");
418}
419
420TEST_F(AssemblerMIPSTest, Lbu) {
421  DriverStr(RepeatRRIb(&mips::MipsAssembler::Lbu, -16, "lbu ${reg1}, {imm}(${reg2})"), "Lbu");
422}
423
424TEST_F(AssemblerMIPSTest, Lhu) {
425  DriverStr(RepeatRRIb(&mips::MipsAssembler::Lhu, -16, "lhu ${reg1}, {imm}(${reg2})"), "Lhu");
426}
427
428TEST_F(AssemblerMIPSTest, Lui) {
429  DriverStr(RepeatRIb(&mips::MipsAssembler::Lui, 16, "lui ${reg}, {imm}"), "Lui");
430}
431
432TEST_F(AssemblerMIPSTest, Mfhi) {
433  DriverStr(RepeatR(&mips::MipsAssembler::Mfhi, "mfhi ${reg}"), "Mfhi");
434}
435
436TEST_F(AssemblerMIPSTest, Mflo) {
437  DriverStr(RepeatR(&mips::MipsAssembler::Mflo, "mflo ${reg}"), "Mflo");
438}
439
440TEST_F(AssemblerMIPSTest, Sb) {
441  DriverStr(RepeatRRIb(&mips::MipsAssembler::Sb, -16, "sb ${reg1}, {imm}(${reg2})"), "Sb");
442}
443
444TEST_F(AssemblerMIPSTest, Sh) {
445  DriverStr(RepeatRRIb(&mips::MipsAssembler::Sh, -16, "sh ${reg1}, {imm}(${reg2})"), "Sh");
446}
447
448TEST_F(AssemblerMIPSTest, Sw) {
449  DriverStr(RepeatRRIb(&mips::MipsAssembler::Sw, -16, "sw ${reg1}, {imm}(${reg2})"), "Sw");
450}
451
452TEST_F(AssemblerMIPSTest, Slt) {
453  DriverStr(RepeatRRR(&mips::MipsAssembler::Slt, "slt ${reg1}, ${reg2}, ${reg3}"), "Slt");
454}
455
456TEST_F(AssemblerMIPSTest, Sltu) {
457  DriverStr(RepeatRRR(&mips::MipsAssembler::Sltu, "sltu ${reg1}, ${reg2}, ${reg3}"), "Sltu");
458}
459
460TEST_F(AssemblerMIPSTest, Slti) {
461  DriverStr(RepeatRRIb(&mips::MipsAssembler::Slti, -16, "slti ${reg1}, ${reg2}, {imm}"), "Slti");
462}
463
464TEST_F(AssemblerMIPSTest, Sltiu) {
465  DriverStr(RepeatRRIb(&mips::MipsAssembler::Sltiu, -16, "sltiu ${reg1}, ${reg2}, {imm}"), "Sltiu");
466}
467
468TEST_F(AssemblerMIPSTest, AddS) {
469  DriverStr(RepeatFFF(&mips::MipsAssembler::AddS, "add.s ${reg1}, ${reg2}, ${reg3}"), "AddS");
470}
471
472TEST_F(AssemblerMIPSTest, AddD) {
473  DriverStr(RepeatFFF(&mips::MipsAssembler::AddD, "add.d ${reg1}, ${reg2}, ${reg3}"), "AddD");
474}
475
476TEST_F(AssemblerMIPSTest, SubS) {
477  DriverStr(RepeatFFF(&mips::MipsAssembler::SubS, "sub.s ${reg1}, ${reg2}, ${reg3}"), "SubS");
478}
479
480TEST_F(AssemblerMIPSTest, SubD) {
481  DriverStr(RepeatFFF(&mips::MipsAssembler::SubD, "sub.d ${reg1}, ${reg2}, ${reg3}"), "SubD");
482}
483
484TEST_F(AssemblerMIPSTest, MulS) {
485  DriverStr(RepeatFFF(&mips::MipsAssembler::MulS, "mul.s ${reg1}, ${reg2}, ${reg3}"), "MulS");
486}
487
488TEST_F(AssemblerMIPSTest, MulD) {
489  DriverStr(RepeatFFF(&mips::MipsAssembler::MulD, "mul.d ${reg1}, ${reg2}, ${reg3}"), "MulD");
490}
491
492TEST_F(AssemblerMIPSTest, DivS) {
493  DriverStr(RepeatFFF(&mips::MipsAssembler::DivS, "div.s ${reg1}, ${reg2}, ${reg3}"), "DivS");
494}
495
496TEST_F(AssemblerMIPSTest, DivD) {
497  DriverStr(RepeatFFF(&mips::MipsAssembler::DivD, "div.d ${reg1}, ${reg2}, ${reg3}"), "DivD");
498}
499
500TEST_F(AssemblerMIPSTest, MovS) {
501  DriverStr(RepeatFF(&mips::MipsAssembler::MovS, "mov.s ${reg1}, ${reg2}"), "MovS");
502}
503
504TEST_F(AssemblerMIPSTest, MovD) {
505  DriverStr(RepeatFF(&mips::MipsAssembler::MovD, "mov.d ${reg1}, ${reg2}"), "MovD");
506}
507
508TEST_F(AssemblerMIPSTest, NegS) {
509  DriverStr(RepeatFF(&mips::MipsAssembler::NegS, "neg.s ${reg1}, ${reg2}"), "NegS");
510}
511
512TEST_F(AssemblerMIPSTest, NegD) {
513  DriverStr(RepeatFF(&mips::MipsAssembler::NegD, "neg.d ${reg1}, ${reg2}"), "NegD");
514}
515
516TEST_F(AssemblerMIPSTest, CunS) {
517  DriverStr(RepeatIbFF(&mips::MipsAssembler::CunS, 3, "c.un.s $fcc{imm}, ${reg1}, ${reg2}"),
518            "CunS");
519}
520
521TEST_F(AssemblerMIPSTest, CeqS) {
522  DriverStr(RepeatIbFF(&mips::MipsAssembler::CeqS, 3, "c.eq.s $fcc{imm}, ${reg1}, ${reg2}"),
523            "CeqS");
524}
525
526TEST_F(AssemblerMIPSTest, CueqS) {
527  DriverStr(RepeatIbFF(&mips::MipsAssembler::CueqS, 3, "c.ueq.s $fcc{imm}, ${reg1}, ${reg2}"),
528            "CueqS");
529}
530
531TEST_F(AssemblerMIPSTest, ColtS) {
532  DriverStr(RepeatIbFF(&mips::MipsAssembler::ColtS, 3, "c.olt.s $fcc{imm}, ${reg1}, ${reg2}"),
533            "ColtS");
534}
535
536TEST_F(AssemblerMIPSTest, CultS) {
537  DriverStr(RepeatIbFF(&mips::MipsAssembler::CultS, 3, "c.ult.s $fcc{imm}, ${reg1}, ${reg2}"),
538            "CultS");
539}
540
541TEST_F(AssemblerMIPSTest, ColeS) {
542  DriverStr(RepeatIbFF(&mips::MipsAssembler::ColeS, 3, "c.ole.s $fcc{imm}, ${reg1}, ${reg2}"),
543            "ColeS");
544}
545
546TEST_F(AssemblerMIPSTest, CuleS) {
547  DriverStr(RepeatIbFF(&mips::MipsAssembler::CuleS, 3, "c.ule.s $fcc{imm}, ${reg1}, ${reg2}"),
548            "CuleS");
549}
550
551TEST_F(AssemblerMIPSTest, CunD) {
552  DriverStr(RepeatIbFF(&mips::MipsAssembler::CunD, 3, "c.un.d $fcc{imm}, ${reg1}, ${reg2}"),
553            "CunD");
554}
555
556TEST_F(AssemblerMIPSTest, CeqD) {
557  DriverStr(RepeatIbFF(&mips::MipsAssembler::CeqD, 3, "c.eq.d $fcc{imm}, ${reg1}, ${reg2}"),
558            "CeqD");
559}
560
561TEST_F(AssemblerMIPSTest, CueqD) {
562  DriverStr(RepeatIbFF(&mips::MipsAssembler::CueqD, 3, "c.ueq.d $fcc{imm}, ${reg1}, ${reg2}"),
563            "CueqD");
564}
565
566TEST_F(AssemblerMIPSTest, ColtD) {
567  DriverStr(RepeatIbFF(&mips::MipsAssembler::ColtD, 3, "c.olt.d $fcc{imm}, ${reg1}, ${reg2}"),
568            "ColtD");
569}
570
571TEST_F(AssemblerMIPSTest, CultD) {
572  DriverStr(RepeatIbFF(&mips::MipsAssembler::CultD, 3, "c.ult.d $fcc{imm}, ${reg1}, ${reg2}"),
573            "CultD");
574}
575
576TEST_F(AssemblerMIPSTest, ColeD) {
577  DriverStr(RepeatIbFF(&mips::MipsAssembler::ColeD, 3, "c.ole.d $fcc{imm}, ${reg1}, ${reg2}"),
578            "ColeD");
579}
580
581TEST_F(AssemblerMIPSTest, CuleD) {
582  DriverStr(RepeatIbFF(&mips::MipsAssembler::CuleD, 3, "c.ule.d $fcc{imm}, ${reg1}, ${reg2}"),
583            "CuleD");
584}
585
586TEST_F(AssemblerMIPSTest, Movf) {
587  DriverStr(RepeatRRIb(&mips::MipsAssembler::Movf, 3, "movf ${reg1}, ${reg2}, $fcc{imm}"), "Movf");
588}
589
590TEST_F(AssemblerMIPSTest, Movt) {
591  DriverStr(RepeatRRIb(&mips::MipsAssembler::Movt, 3, "movt ${reg1}, ${reg2}, $fcc{imm}"), "Movt");
592}
593
594TEST_F(AssemblerMIPSTest, CvtSW) {
595  DriverStr(RepeatFF(&mips::MipsAssembler::Cvtsw, "cvt.s.w ${reg1}, ${reg2}"), "CvtSW");
596}
597
598TEST_F(AssemblerMIPSTest, CvtDW) {
599  DriverStr(RepeatFF(&mips::MipsAssembler::Cvtdw, "cvt.d.w ${reg1}, ${reg2}"), "CvtDW");
600}
601
602TEST_F(AssemblerMIPSTest, CvtSD) {
603  DriverStr(RepeatFF(&mips::MipsAssembler::Cvtsd, "cvt.s.d ${reg1}, ${reg2}"), "CvtSD");
604}
605
606TEST_F(AssemblerMIPSTest, CvtDS) {
607  DriverStr(RepeatFF(&mips::MipsAssembler::Cvtds, "cvt.d.s ${reg1}, ${reg2}"), "CvtDS");
608}
609
610TEST_F(AssemblerMIPSTest, Mfc1) {
611  DriverStr(RepeatRF(&mips::MipsAssembler::Mfc1, "mfc1 ${reg1}, ${reg2}"), "Mfc1");
612}
613
614TEST_F(AssemblerMIPSTest, Mtc1) {
615  DriverStr(RepeatRF(&mips::MipsAssembler::Mtc1, "mtc1 ${reg1}, ${reg2}"), "Mtc1");
616}
617
618TEST_F(AssemblerMIPSTest, Mfhc1) {
619  DriverStr(RepeatRF(&mips::MipsAssembler::Mfhc1, "mfhc1 ${reg1}, ${reg2}"), "Mfhc1");
620}
621
622TEST_F(AssemblerMIPSTest, Mthc1) {
623  DriverStr(RepeatRF(&mips::MipsAssembler::Mthc1, "mthc1 ${reg1}, ${reg2}"), "Mthc1");
624}
625
626TEST_F(AssemblerMIPSTest, Lwc1) {
627  DriverStr(RepeatFRIb(&mips::MipsAssembler::Lwc1, -16, "lwc1 ${reg1}, {imm}(${reg2})"), "Lwc1");
628}
629
630TEST_F(AssemblerMIPSTest, Ldc1) {
631  DriverStr(RepeatFRIb(&mips::MipsAssembler::Ldc1, -16, "ldc1 ${reg1}, {imm}(${reg2})"), "Ldc1");
632}
633
634TEST_F(AssemblerMIPSTest, Swc1) {
635  DriverStr(RepeatFRIb(&mips::MipsAssembler::Swc1, -16, "swc1 ${reg1}, {imm}(${reg2})"), "Swc1");
636}
637
638TEST_F(AssemblerMIPSTest, Sdc1) {
639  DriverStr(RepeatFRIb(&mips::MipsAssembler::Sdc1, -16, "sdc1 ${reg1}, {imm}(${reg2})"), "Sdc1");
640}
641
642TEST_F(AssemblerMIPSTest, Move) {
643  DriverStr(RepeatRR(&mips::MipsAssembler::Move, "or ${reg1}, ${reg2}, $zero"), "Move");
644}
645
646TEST_F(AssemblerMIPSTest, Clear) {
647  DriverStr(RepeatR(&mips::MipsAssembler::Clear, "or ${reg}, $zero, $zero"), "Clear");
648}
649
650TEST_F(AssemblerMIPSTest, Not) {
651  DriverStr(RepeatRR(&mips::MipsAssembler::Not, "nor ${reg1}, ${reg2}, $zero"), "Not");
652}
653
654TEST_F(AssemblerMIPSTest, LoadFromOffset) {
655  __ LoadFromOffset(mips::kLoadSignedByte, mips::A0, mips::A0, 0);
656  __ LoadFromOffset(mips::kLoadSignedByte, mips::A0, mips::A1, 0);
657  __ LoadFromOffset(mips::kLoadSignedByte, mips::A0, mips::A1, 256);
658  __ LoadFromOffset(mips::kLoadSignedByte, mips::A0, mips::A1, 1000);
659  __ LoadFromOffset(mips::kLoadSignedByte, mips::A0, mips::A1, 0x8000);
660  __ LoadFromOffset(mips::kLoadSignedByte, mips::A0, mips::A1, 0x10000);
661  __ LoadFromOffset(mips::kLoadSignedByte, mips::A0, mips::A1, 0x12345678);
662  __ LoadFromOffset(mips::kLoadSignedByte, mips::A0, mips::A1, -256);
663  __ LoadFromOffset(mips::kLoadSignedByte, mips::A0, mips::A1, 0xFFFF8000);
664  __ LoadFromOffset(mips::kLoadSignedByte, mips::A0, mips::A1, 0xABCDEF00);
665
666  __ LoadFromOffset(mips::kLoadUnsignedByte, mips::A0, mips::A0, 0);
667  __ LoadFromOffset(mips::kLoadUnsignedByte, mips::A0, mips::A1, 0);
668  __ LoadFromOffset(mips::kLoadUnsignedByte, mips::A0, mips::A1, 256);
669  __ LoadFromOffset(mips::kLoadUnsignedByte, mips::A0, mips::A1, 1000);
670  __ LoadFromOffset(mips::kLoadUnsignedByte, mips::A0, mips::A1, 0x8000);
671  __ LoadFromOffset(mips::kLoadUnsignedByte, mips::A0, mips::A1, 0x10000);
672  __ LoadFromOffset(mips::kLoadUnsignedByte, mips::A0, mips::A1, 0x12345678);
673  __ LoadFromOffset(mips::kLoadUnsignedByte, mips::A0, mips::A1, -256);
674  __ LoadFromOffset(mips::kLoadUnsignedByte, mips::A0, mips::A1, 0xFFFF8000);
675  __ LoadFromOffset(mips::kLoadUnsignedByte, mips::A0, mips::A1, 0xABCDEF00);
676
677  __ LoadFromOffset(mips::kLoadSignedHalfword, mips::A0, mips::A0, 0);
678  __ LoadFromOffset(mips::kLoadSignedHalfword, mips::A0, mips::A1, 0);
679  __ LoadFromOffset(mips::kLoadSignedHalfword, mips::A0, mips::A1, 256);
680  __ LoadFromOffset(mips::kLoadSignedHalfword, mips::A0, mips::A1, 1000);
681  __ LoadFromOffset(mips::kLoadSignedHalfword, mips::A0, mips::A1, 0x8000);
682  __ LoadFromOffset(mips::kLoadSignedHalfword, mips::A0, mips::A1, 0x10000);
683  __ LoadFromOffset(mips::kLoadSignedHalfword, mips::A0, mips::A1, 0x12345678);
684  __ LoadFromOffset(mips::kLoadSignedHalfword, mips::A0, mips::A1, -256);
685  __ LoadFromOffset(mips::kLoadSignedHalfword, mips::A0, mips::A1, 0xFFFF8000);
686  __ LoadFromOffset(mips::kLoadSignedHalfword, mips::A0, mips::A1, 0xABCDEF00);
687
688  __ LoadFromOffset(mips::kLoadUnsignedHalfword, mips::A0, mips::A0, 0);
689  __ LoadFromOffset(mips::kLoadUnsignedHalfword, mips::A0, mips::A1, 0);
690  __ LoadFromOffset(mips::kLoadUnsignedHalfword, mips::A0, mips::A1, 256);
691  __ LoadFromOffset(mips::kLoadUnsignedHalfword, mips::A0, mips::A1, 1000);
692  __ LoadFromOffset(mips::kLoadUnsignedHalfword, mips::A0, mips::A1, 0x8000);
693  __ LoadFromOffset(mips::kLoadUnsignedHalfword, mips::A0, mips::A1, 0x10000);
694  __ LoadFromOffset(mips::kLoadUnsignedHalfword, mips::A0, mips::A1, 0x12345678);
695  __ LoadFromOffset(mips::kLoadUnsignedHalfword, mips::A0, mips::A1, -256);
696  __ LoadFromOffset(mips::kLoadUnsignedHalfword, mips::A0, mips::A1, 0xFFFF8000);
697  __ LoadFromOffset(mips::kLoadUnsignedHalfword, mips::A0, mips::A1, 0xABCDEF00);
698
699  __ LoadFromOffset(mips::kLoadWord, mips::A0, mips::A0, 0);
700  __ LoadFromOffset(mips::kLoadWord, mips::A0, mips::A1, 0);
701  __ LoadFromOffset(mips::kLoadWord, mips::A0, mips::A1, 256);
702  __ LoadFromOffset(mips::kLoadWord, mips::A0, mips::A1, 1000);
703  __ LoadFromOffset(mips::kLoadWord, mips::A0, mips::A1, 0x8000);
704  __ LoadFromOffset(mips::kLoadWord, mips::A0, mips::A1, 0x10000);
705  __ LoadFromOffset(mips::kLoadWord, mips::A0, mips::A1, 0x12345678);
706  __ LoadFromOffset(mips::kLoadWord, mips::A0, mips::A1, -256);
707  __ LoadFromOffset(mips::kLoadWord, mips::A0, mips::A1, 0xFFFF8000);
708  __ LoadFromOffset(mips::kLoadWord, mips::A0, mips::A1, 0xABCDEF00);
709
710  __ LoadFromOffset(mips::kLoadDoubleword, mips::A0, mips::A0, 0);
711  __ LoadFromOffset(mips::kLoadDoubleword, mips::A0, mips::A1, 0);
712  __ LoadFromOffset(mips::kLoadDoubleword, mips::A1, mips::A0, 0);
713  __ LoadFromOffset(mips::kLoadDoubleword, mips::A0, mips::A2, 0);
714  __ LoadFromOffset(mips::kLoadDoubleword, mips::A0, mips::A2, 256);
715  __ LoadFromOffset(mips::kLoadDoubleword, mips::A0, mips::A2, 1000);
716  __ LoadFromOffset(mips::kLoadDoubleword, mips::A0, mips::A2, 0x8000);
717  __ LoadFromOffset(mips::kLoadDoubleword, mips::A0, mips::A2, 0x10000);
718  __ LoadFromOffset(mips::kLoadDoubleword, mips::A0, mips::A2, 0x12345678);
719  __ LoadFromOffset(mips::kLoadDoubleword, mips::A0, mips::A2, -256);
720  __ LoadFromOffset(mips::kLoadDoubleword, mips::A0, mips::A2, 0xFFFF8000);
721  __ LoadFromOffset(mips::kLoadDoubleword, mips::A0, mips::A2, 0xABCDEF00);
722
723  const char* expected =
724      "lb $a0, 0($a0)\n"
725      "lb $a0, 0($a1)\n"
726      "lb $a0, 256($a1)\n"
727      "lb $a0, 1000($a1)\n"
728      "ori $at, $zero, 0x8000\n"
729      "addu $at, $at, $a1\n"
730      "lb $a0, 0($at)\n"
731      "lui $at, 1\n"
732      "addu $at, $at, $a1\n"
733      "lb $a0, 0($at)\n"
734      "lui $at, 0x1234\n"
735      "ori $at, 0x5678\n"
736      "addu $at, $at, $a1\n"
737      "lb $a0, 0($at)\n"
738      "lb $a0, -256($a1)\n"
739      "lb $a0, 0xFFFF8000($a1)\n"
740      "lui $at, 0xABCD\n"
741      "ori $at, 0xEF00\n"
742      "addu $at, $at, $a1\n"
743      "lb $a0, 0($at)\n"
744
745      "lbu $a0, 0($a0)\n"
746      "lbu $a0, 0($a1)\n"
747      "lbu $a0, 256($a1)\n"
748      "lbu $a0, 1000($a1)\n"
749      "ori $at, $zero, 0x8000\n"
750      "addu $at, $at, $a1\n"
751      "lbu $a0, 0($at)\n"
752      "lui $at, 1\n"
753      "addu $at, $at, $a1\n"
754      "lbu $a0, 0($at)\n"
755      "lui $at, 0x1234\n"
756      "ori $at, 0x5678\n"
757      "addu $at, $at, $a1\n"
758      "lbu $a0, 0($at)\n"
759      "lbu $a0, -256($a1)\n"
760      "lbu $a0, 0xFFFF8000($a1)\n"
761      "lui $at, 0xABCD\n"
762      "ori $at, 0xEF00\n"
763      "addu $at, $at, $a1\n"
764      "lbu $a0, 0($at)\n"
765
766      "lh $a0, 0($a0)\n"
767      "lh $a0, 0($a1)\n"
768      "lh $a0, 256($a1)\n"
769      "lh $a0, 1000($a1)\n"
770      "ori $at, $zero, 0x8000\n"
771      "addu $at, $at, $a1\n"
772      "lh $a0, 0($at)\n"
773      "lui $at, 1\n"
774      "addu $at, $at, $a1\n"
775      "lh $a0, 0($at)\n"
776      "lui $at, 0x1234\n"
777      "ori $at, 0x5678\n"
778      "addu $at, $at, $a1\n"
779      "lh $a0, 0($at)\n"
780      "lh $a0, -256($a1)\n"
781      "lh $a0, 0xFFFF8000($a1)\n"
782      "lui $at, 0xABCD\n"
783      "ori $at, 0xEF00\n"
784      "addu $at, $at, $a1\n"
785      "lh $a0, 0($at)\n"
786
787      "lhu $a0, 0($a0)\n"
788      "lhu $a0, 0($a1)\n"
789      "lhu $a0, 256($a1)\n"
790      "lhu $a0, 1000($a1)\n"
791      "ori $at, $zero, 0x8000\n"
792      "addu $at, $at, $a1\n"
793      "lhu $a0, 0($at)\n"
794      "lui $at, 1\n"
795      "addu $at, $at, $a1\n"
796      "lhu $a0, 0($at)\n"
797      "lui $at, 0x1234\n"
798      "ori $at, 0x5678\n"
799      "addu $at, $at, $a1\n"
800      "lhu $a0, 0($at)\n"
801      "lhu $a0, -256($a1)\n"
802      "lhu $a0, 0xFFFF8000($a1)\n"
803      "lui $at, 0xABCD\n"
804      "ori $at, 0xEF00\n"
805      "addu $at, $at, $a1\n"
806      "lhu $a0, 0($at)\n"
807
808      "lw $a0, 0($a0)\n"
809      "lw $a0, 0($a1)\n"
810      "lw $a0, 256($a1)\n"
811      "lw $a0, 1000($a1)\n"
812      "ori $at, $zero, 0x8000\n"
813      "addu $at, $at, $a1\n"
814      "lw $a0, 0($at)\n"
815      "lui $at, 1\n"
816      "addu $at, $at, $a1\n"
817      "lw $a0, 0($at)\n"
818      "lui $at, 0x1234\n"
819      "ori $at, 0x5678\n"
820      "addu $at, $at, $a1\n"
821      "lw $a0, 0($at)\n"
822      "lw $a0, -256($a1)\n"
823      "lw $a0, 0xFFFF8000($a1)\n"
824      "lui $at, 0xABCD\n"
825      "ori $at, 0xEF00\n"
826      "addu $at, $at, $a1\n"
827      "lw $a0, 0($at)\n"
828
829      "lw $a1, 4($a0)\n"
830      "lw $a0, 0($a0)\n"
831      "lw $a0, 0($a1)\n"
832      "lw $a1, 4($a1)\n"
833      "lw $a1, 0($a0)\n"
834      "lw $a2, 4($a0)\n"
835      "lw $a0, 0($a2)\n"
836      "lw $a1, 4($a2)\n"
837      "lw $a0, 256($a2)\n"
838      "lw $a1, 260($a2)\n"
839      "lw $a0, 1000($a2)\n"
840      "lw $a1, 1004($a2)\n"
841      "ori $at, $zero, 0x8000\n"
842      "addu $at, $at, $a2\n"
843      "lw $a0, 0($at)\n"
844      "lw $a1, 4($at)\n"
845      "lui $at, 1\n"
846      "addu $at, $at, $a2\n"
847      "lw $a0, 0($at)\n"
848      "lw $a1, 4($at)\n"
849      "lui $at, 0x1234\n"
850      "ori $at, 0x5678\n"
851      "addu $at, $at, $a2\n"
852      "lw $a0, 0($at)\n"
853      "lw $a1, 4($at)\n"
854      "lw $a0, -256($a2)\n"
855      "lw $a1, -252($a2)\n"
856      "lw $a0, 0xFFFF8000($a2)\n"
857      "lw $a1, 0xFFFF8004($a2)\n"
858      "lui $at, 0xABCD\n"
859      "ori $at, 0xEF00\n"
860      "addu $at, $at, $a2\n"
861      "lw $a0, 0($at)\n"
862      "lw $a1, 4($at)\n";
863  DriverStr(expected, "LoadFromOffset");
864}
865
866TEST_F(AssemblerMIPSTest, LoadSFromOffset) {
867  __ LoadSFromOffset(mips::F0, mips::A0, 0);
868  __ LoadSFromOffset(mips::F0, mips::A0, 4);
869  __ LoadSFromOffset(mips::F0, mips::A0, 256);
870  __ LoadSFromOffset(mips::F0, mips::A0, 0x8000);
871  __ LoadSFromOffset(mips::F0, mips::A0, 0x10000);
872  __ LoadSFromOffset(mips::F0, mips::A0, 0x12345678);
873  __ LoadSFromOffset(mips::F0, mips::A0, -256);
874  __ LoadSFromOffset(mips::F0, mips::A0, 0xFFFF8000);
875  __ LoadSFromOffset(mips::F0, mips::A0, 0xABCDEF00);
876
877  const char* expected =
878      "lwc1 $f0, 0($a0)\n"
879      "lwc1 $f0, 4($a0)\n"
880      "lwc1 $f0, 256($a0)\n"
881      "ori $at, $zero, 0x8000\n"
882      "addu $at, $at, $a0\n"
883      "lwc1 $f0, 0($at)\n"
884      "lui $at, 1\n"
885      "addu $at, $at, $a0\n"
886      "lwc1 $f0, 0($at)\n"
887      "lui $at, 0x1234\n"
888      "ori $at, 0x5678\n"
889      "addu $at, $at, $a0\n"
890      "lwc1 $f0, 0($at)\n"
891      "lwc1 $f0, -256($a0)\n"
892      "lwc1 $f0, 0xFFFF8000($a0)\n"
893      "lui $at, 0xABCD\n"
894      "ori $at, 0xEF00\n"
895      "addu $at, $at, $a0\n"
896      "lwc1 $f0, 0($at)\n";
897  DriverStr(expected, "LoadSFromOffset");
898}
899
900
901TEST_F(AssemblerMIPSTest, LoadDFromOffset) {
902  __ LoadDFromOffset(mips::F0, mips::A0, 0);
903  __ LoadDFromOffset(mips::F0, mips::A0, 4);
904  __ LoadDFromOffset(mips::F0, mips::A0, 256);
905  __ LoadDFromOffset(mips::F0, mips::A0, 0x8000);
906  __ LoadDFromOffset(mips::F0, mips::A0, 0x10000);
907  __ LoadDFromOffset(mips::F0, mips::A0, 0x12345678);
908  __ LoadDFromOffset(mips::F0, mips::A0, -256);
909  __ LoadDFromOffset(mips::F0, mips::A0, 0xFFFF8000);
910  __ LoadDFromOffset(mips::F0, mips::A0, 0xABCDEF00);
911
912  const char* expected =
913      "ldc1 $f0, 0($a0)\n"
914      "lwc1 $f0, 4($a0)\n"
915      "lwc1 $f1, 8($a0)\n"
916      "ldc1 $f0, 256($a0)\n"
917      "ori $at, $zero, 0x8000\n"
918      "addu $at, $at, $a0\n"
919      "ldc1 $f0, 0($at)\n"
920      "lui $at, 1\n"
921      "addu $at, $at, $a0\n"
922      "ldc1 $f0, 0($at)\n"
923      "lui $at, 0x1234\n"
924      "ori $at, 0x5678\n"
925      "addu $at, $at, $a0\n"
926      "ldc1 $f0, 0($at)\n"
927      "ldc1 $f0, -256($a0)\n"
928      "ldc1 $f0, 0xFFFF8000($a0)\n"
929      "lui $at, 0xABCD\n"
930      "ori $at, 0xEF00\n"
931      "addu $at, $at, $a0\n"
932      "ldc1 $f0, 0($at)\n";
933  DriverStr(expected, "LoadDFromOffset");
934}
935
936TEST_F(AssemblerMIPSTest, StoreToOffset) {
937  __ StoreToOffset(mips::kStoreByte, mips::A0, mips::A0, 0);
938  __ StoreToOffset(mips::kStoreByte, mips::A0, mips::A1, 0);
939  __ StoreToOffset(mips::kStoreByte, mips::A0, mips::A1, 256);
940  __ StoreToOffset(mips::kStoreByte, mips::A0, mips::A1, 1000);
941  __ StoreToOffset(mips::kStoreByte, mips::A0, mips::A1, 0x8000);
942  __ StoreToOffset(mips::kStoreByte, mips::A0, mips::A1, 0x10000);
943  __ StoreToOffset(mips::kStoreByte, mips::A0, mips::A1, 0x12345678);
944  __ StoreToOffset(mips::kStoreByte, mips::A0, mips::A1, -256);
945  __ StoreToOffset(mips::kStoreByte, mips::A0, mips::A1, 0xFFFF8000);
946  __ StoreToOffset(mips::kStoreByte, mips::A0, mips::A1, 0xABCDEF00);
947
948  __ StoreToOffset(mips::kStoreHalfword, mips::A0, mips::A0, 0);
949  __ StoreToOffset(mips::kStoreHalfword, mips::A0, mips::A1, 0);
950  __ StoreToOffset(mips::kStoreHalfword, mips::A0, mips::A1, 256);
951  __ StoreToOffset(mips::kStoreHalfword, mips::A0, mips::A1, 1000);
952  __ StoreToOffset(mips::kStoreHalfword, mips::A0, mips::A1, 0x8000);
953  __ StoreToOffset(mips::kStoreHalfword, mips::A0, mips::A1, 0x10000);
954  __ StoreToOffset(mips::kStoreHalfword, mips::A0, mips::A1, 0x12345678);
955  __ StoreToOffset(mips::kStoreHalfword, mips::A0, mips::A1, -256);
956  __ StoreToOffset(mips::kStoreHalfword, mips::A0, mips::A1, 0xFFFF8000);
957  __ StoreToOffset(mips::kStoreHalfword, mips::A0, mips::A1, 0xABCDEF00);
958
959  __ StoreToOffset(mips::kStoreWord, mips::A0, mips::A0, 0);
960  __ StoreToOffset(mips::kStoreWord, mips::A0, mips::A1, 0);
961  __ StoreToOffset(mips::kStoreWord, mips::A0, mips::A1, 256);
962  __ StoreToOffset(mips::kStoreWord, mips::A0, mips::A1, 1000);
963  __ StoreToOffset(mips::kStoreWord, mips::A0, mips::A1, 0x8000);
964  __ StoreToOffset(mips::kStoreWord, mips::A0, mips::A1, 0x10000);
965  __ StoreToOffset(mips::kStoreWord, mips::A0, mips::A1, 0x12345678);
966  __ StoreToOffset(mips::kStoreWord, mips::A0, mips::A1, -256);
967  __ StoreToOffset(mips::kStoreWord, mips::A0, mips::A1, 0xFFFF8000);
968  __ StoreToOffset(mips::kStoreWord, mips::A0, mips::A1, 0xABCDEF00);
969
970  __ StoreToOffset(mips::kStoreDoubleword, mips::A0, mips::A2, 0);
971  __ StoreToOffset(mips::kStoreDoubleword, mips::A0, mips::A2, 256);
972  __ StoreToOffset(mips::kStoreDoubleword, mips::A0, mips::A2, 1000);
973  __ StoreToOffset(mips::kStoreDoubleword, mips::A0, mips::A2, 0x8000);
974  __ StoreToOffset(mips::kStoreDoubleword, mips::A0, mips::A2, 0x10000);
975  __ StoreToOffset(mips::kStoreDoubleword, mips::A0, mips::A2, 0x12345678);
976  __ StoreToOffset(mips::kStoreDoubleword, mips::A0, mips::A2, -256);
977  __ StoreToOffset(mips::kStoreDoubleword, mips::A0, mips::A2, 0xFFFF8000);
978  __ StoreToOffset(mips::kStoreDoubleword, mips::A0, mips::A2, 0xABCDEF00);
979
980  const char* expected =
981      "sb $a0, 0($a0)\n"
982      "sb $a0, 0($a1)\n"
983      "sb $a0, 256($a1)\n"
984      "sb $a0, 1000($a1)\n"
985      "ori $at, $zero, 0x8000\n"
986      "addu $at, $at, $a1\n"
987      "sb $a0, 0($at)\n"
988      "lui $at, 1\n"
989      "addu $at, $at, $a1\n"
990      "sb $a0, 0($at)\n"
991      "lui $at, 0x1234\n"
992      "ori $at, 0x5678\n"
993      "addu $at, $at, $a1\n"
994      "sb $a0, 0($at)\n"
995      "sb $a0, -256($a1)\n"
996      "sb $a0, 0xFFFF8000($a1)\n"
997      "lui $at, 0xABCD\n"
998      "ori $at, 0xEF00\n"
999      "addu $at, $at, $a1\n"
1000      "sb $a0, 0($at)\n"
1001
1002      "sh $a0, 0($a0)\n"
1003      "sh $a0, 0($a1)\n"
1004      "sh $a0, 256($a1)\n"
1005      "sh $a0, 1000($a1)\n"
1006      "ori $at, $zero, 0x8000\n"
1007      "addu $at, $at, $a1\n"
1008      "sh $a0, 0($at)\n"
1009      "lui $at, 1\n"
1010      "addu $at, $at, $a1\n"
1011      "sh $a0, 0($at)\n"
1012      "lui $at, 0x1234\n"
1013      "ori $at, 0x5678\n"
1014      "addu $at, $at, $a1\n"
1015      "sh $a0, 0($at)\n"
1016      "sh $a0, -256($a1)\n"
1017      "sh $a0, 0xFFFF8000($a1)\n"
1018      "lui $at, 0xABCD\n"
1019      "ori $at, 0xEF00\n"
1020      "addu $at, $at, $a1\n"
1021      "sh $a0, 0($at)\n"
1022
1023      "sw $a0, 0($a0)\n"
1024      "sw $a0, 0($a1)\n"
1025      "sw $a0, 256($a1)\n"
1026      "sw $a0, 1000($a1)\n"
1027      "ori $at, $zero, 0x8000\n"
1028      "addu $at, $at, $a1\n"
1029      "sw $a0, 0($at)\n"
1030      "lui $at, 1\n"
1031      "addu $at, $at, $a1\n"
1032      "sw $a0, 0($at)\n"
1033      "lui $at, 0x1234\n"
1034      "ori $at, 0x5678\n"
1035      "addu $at, $at, $a1\n"
1036      "sw $a0, 0($at)\n"
1037      "sw $a0, -256($a1)\n"
1038      "sw $a0, 0xFFFF8000($a1)\n"
1039      "lui $at, 0xABCD\n"
1040      "ori $at, 0xEF00\n"
1041      "addu $at, $at, $a1\n"
1042      "sw $a0, 0($at)\n"
1043
1044      "sw $a0, 0($a2)\n"
1045      "sw $a1, 4($a2)\n"
1046      "sw $a0, 256($a2)\n"
1047      "sw $a1, 260($a2)\n"
1048      "sw $a0, 1000($a2)\n"
1049      "sw $a1, 1004($a2)\n"
1050      "ori $at, $zero, 0x8000\n"
1051      "addu $at, $at, $a2\n"
1052      "sw $a0, 0($at)\n"
1053      "sw $a1, 4($at)\n"
1054      "lui $at, 1\n"
1055      "addu $at, $at, $a2\n"
1056      "sw $a0, 0($at)\n"
1057      "sw $a1, 4($at)\n"
1058      "lui $at, 0x1234\n"
1059      "ori $at, 0x5678\n"
1060      "addu $at, $at, $a2\n"
1061      "sw $a0, 0($at)\n"
1062      "sw $a1, 4($at)\n"
1063      "sw $a0, -256($a2)\n"
1064      "sw $a1, -252($a2)\n"
1065      "sw $a0, 0xFFFF8000($a2)\n"
1066      "sw $a1, 0xFFFF8004($a2)\n"
1067      "lui $at, 0xABCD\n"
1068      "ori $at, 0xEF00\n"
1069      "addu $at, $at, $a2\n"
1070      "sw $a0, 0($at)\n"
1071      "sw $a1, 4($at)\n";
1072  DriverStr(expected, "StoreToOffset");
1073}
1074
1075TEST_F(AssemblerMIPSTest, StoreSToOffset) {
1076  __ StoreSToOffset(mips::F0, mips::A0, 0);
1077  __ StoreSToOffset(mips::F0, mips::A0, 4);
1078  __ StoreSToOffset(mips::F0, mips::A0, 256);
1079  __ StoreSToOffset(mips::F0, mips::A0, 0x8000);
1080  __ StoreSToOffset(mips::F0, mips::A0, 0x10000);
1081  __ StoreSToOffset(mips::F0, mips::A0, 0x12345678);
1082  __ StoreSToOffset(mips::F0, mips::A0, -256);
1083  __ StoreSToOffset(mips::F0, mips::A0, 0xFFFF8000);
1084  __ StoreSToOffset(mips::F0, mips::A0, 0xABCDEF00);
1085
1086  const char* expected =
1087      "swc1 $f0, 0($a0)\n"
1088      "swc1 $f0, 4($a0)\n"
1089      "swc1 $f0, 256($a0)\n"
1090      "ori $at, $zero, 0x8000\n"
1091      "addu $at, $at, $a0\n"
1092      "swc1 $f0, 0($at)\n"
1093      "lui $at, 1\n"
1094      "addu $at, $at, $a0\n"
1095      "swc1 $f0, 0($at)\n"
1096      "lui $at, 0x1234\n"
1097      "ori $at, 0x5678\n"
1098      "addu $at, $at, $a0\n"
1099      "swc1 $f0, 0($at)\n"
1100      "swc1 $f0, -256($a0)\n"
1101      "swc1 $f0, 0xFFFF8000($a0)\n"
1102      "lui $at, 0xABCD\n"
1103      "ori $at, 0xEF00\n"
1104      "addu $at, $at, $a0\n"
1105      "swc1 $f0, 0($at)\n";
1106  DriverStr(expected, "StoreSToOffset");
1107}
1108
1109TEST_F(AssemblerMIPSTest, StoreDToOffset) {
1110  __ StoreDToOffset(mips::F0, mips::A0, 0);
1111  __ StoreDToOffset(mips::F0, mips::A0, 4);
1112  __ StoreDToOffset(mips::F0, mips::A0, 256);
1113  __ StoreDToOffset(mips::F0, mips::A0, 0x8000);
1114  __ StoreDToOffset(mips::F0, mips::A0, 0x10000);
1115  __ StoreDToOffset(mips::F0, mips::A0, 0x12345678);
1116  __ StoreDToOffset(mips::F0, mips::A0, -256);
1117  __ StoreDToOffset(mips::F0, mips::A0, 0xFFFF8000);
1118  __ StoreDToOffset(mips::F0, mips::A0, 0xABCDEF00);
1119
1120  const char* expected =
1121      "sdc1 $f0, 0($a0)\n"
1122      "swc1 $f0, 4($a0)\n"
1123      "swc1 $f1, 8($a0)\n"
1124      "sdc1 $f0, 256($a0)\n"
1125      "ori $at, $zero, 0x8000\n"
1126      "addu $at, $at, $a0\n"
1127      "sdc1 $f0, 0($at)\n"
1128      "lui $at, 1\n"
1129      "addu $at, $at, $a0\n"
1130      "sdc1 $f0, 0($at)\n"
1131      "lui $at, 0x1234\n"
1132      "ori $at, 0x5678\n"
1133      "addu $at, $at, $a0\n"
1134      "sdc1 $f0, 0($at)\n"
1135      "sdc1 $f0, -256($a0)\n"
1136      "sdc1 $f0, 0xFFFF8000($a0)\n"
1137      "lui $at, 0xABCD\n"
1138      "ori $at, 0xEF00\n"
1139      "addu $at, $at, $a0\n"
1140      "sdc1 $f0, 0($at)\n";
1141  DriverStr(expected, "StoreDToOffset");
1142}
1143
1144TEST_F(AssemblerMIPSTest, B) {
1145  mips::MipsLabel label1, label2;
1146  __ B(&label1);
1147  constexpr size_t kAdduCount1 = 63;
1148  for (size_t i = 0; i != kAdduCount1; ++i) {
1149    __ Addu(mips::ZERO, mips::ZERO, mips::ZERO);
1150  }
1151  __ Bind(&label1);
1152  __ B(&label2);
1153  constexpr size_t kAdduCount2 = 64;
1154  for (size_t i = 0; i != kAdduCount2; ++i) {
1155    __ Addu(mips::ZERO, mips::ZERO, mips::ZERO);
1156  }
1157  __ Bind(&label2);
1158  __ B(&label1);
1159
1160  std::string expected =
1161      ".set noreorder\n"
1162      "b 1f\n"
1163      "nop\n" +
1164      RepeatInsn(kAdduCount1, "addu $zero, $zero, $zero\n") +
1165      "1:\n"
1166      "b 2f\n"
1167      "nop\n" +
1168      RepeatInsn(kAdduCount2, "addu $zero, $zero, $zero\n") +
1169      "2:\n"
1170      "b 1b\n"
1171      "nop\n";
1172  DriverStr(expected, "B");
1173}
1174
1175TEST_F(AssemblerMIPSTest, Beq) {
1176  BranchCondTwoRegsHelper(&mips::MipsAssembler::Beq, "Beq");
1177}
1178
1179TEST_F(AssemblerMIPSTest, Bne) {
1180  BranchCondTwoRegsHelper(&mips::MipsAssembler::Bne, "Bne");
1181}
1182
1183TEST_F(AssemblerMIPSTest, Beqz) {
1184  mips::MipsLabel label;
1185  __ Beqz(mips::A0, &label);
1186  constexpr size_t kAdduCount1 = 63;
1187  for (size_t i = 0; i != kAdduCount1; ++i) {
1188    __ Addu(mips::ZERO, mips::ZERO, mips::ZERO);
1189  }
1190  __ Bind(&label);
1191  constexpr size_t kAdduCount2 = 64;
1192  for (size_t i = 0; i != kAdduCount2; ++i) {
1193    __ Addu(mips::ZERO, mips::ZERO, mips::ZERO);
1194  }
1195  __ Beqz(mips::A1, &label);
1196
1197  std::string expected =
1198      ".set noreorder\n"
1199      "beq $zero, $a0, 1f\n"
1200      "nop\n" +
1201      RepeatInsn(kAdduCount1, "addu $zero, $zero, $zero\n") +
1202      "1:\n" +
1203      RepeatInsn(kAdduCount2, "addu $zero, $zero, $zero\n") +
1204      "beq $zero, $a1, 1b\n"
1205      "nop\n";
1206  DriverStr(expected, "Beqz");
1207}
1208
1209TEST_F(AssemblerMIPSTest, Bnez) {
1210  mips::MipsLabel label;
1211  __ Bnez(mips::A0, &label);
1212  constexpr size_t kAdduCount1 = 63;
1213  for (size_t i = 0; i != kAdduCount1; ++i) {
1214    __ Addu(mips::ZERO, mips::ZERO, mips::ZERO);
1215  }
1216  __ Bind(&label);
1217  constexpr size_t kAdduCount2 = 64;
1218  for (size_t i = 0; i != kAdduCount2; ++i) {
1219    __ Addu(mips::ZERO, mips::ZERO, mips::ZERO);
1220  }
1221  __ Bnez(mips::A1, &label);
1222
1223  std::string expected =
1224      ".set noreorder\n"
1225      "bne $zero, $a0, 1f\n"
1226      "nop\n" +
1227      RepeatInsn(kAdduCount1, "addu $zero, $zero, $zero\n") +
1228      "1:\n" +
1229      RepeatInsn(kAdduCount2, "addu $zero, $zero, $zero\n") +
1230      "bne $zero, $a1, 1b\n"
1231      "nop\n";
1232  DriverStr(expected, "Bnez");
1233}
1234
1235TEST_F(AssemblerMIPSTest, Bltz) {
1236  BranchCondOneRegHelper(&mips::MipsAssembler::Bltz, "Bltz");
1237}
1238
1239TEST_F(AssemblerMIPSTest, Bgez) {
1240  BranchCondOneRegHelper(&mips::MipsAssembler::Bgez, "Bgez");
1241}
1242
1243TEST_F(AssemblerMIPSTest, Blez) {
1244  BranchCondOneRegHelper(&mips::MipsAssembler::Blez, "Blez");
1245}
1246
1247TEST_F(AssemblerMIPSTest, Bgtz) {
1248  BranchCondOneRegHelper(&mips::MipsAssembler::Bgtz, "Bgtz");
1249}
1250
1251TEST_F(AssemblerMIPSTest, Blt) {
1252  mips::MipsLabel label;
1253  __ Blt(mips::A0, mips::A1, &label);
1254  constexpr size_t kAdduCount1 = 63;
1255  for (size_t i = 0; i != kAdduCount1; ++i) {
1256    __ Addu(mips::ZERO, mips::ZERO, mips::ZERO);
1257  }
1258  __ Bind(&label);
1259  constexpr size_t kAdduCount2 = 64;
1260  for (size_t i = 0; i != kAdduCount2; ++i) {
1261    __ Addu(mips::ZERO, mips::ZERO, mips::ZERO);
1262  }
1263  __ Blt(mips::A2, mips::A3, &label);
1264
1265  std::string expected =
1266      ".set noreorder\n"
1267      "slt $at, $a0, $a1\n"
1268      "bne $zero, $at, 1f\n"
1269      "nop\n" +
1270      RepeatInsn(kAdduCount1, "addu $zero, $zero, $zero\n") +
1271      "1:\n" +
1272      RepeatInsn(kAdduCount2, "addu $zero, $zero, $zero\n") +
1273      "slt $at, $a2, $a3\n"
1274      "bne $zero, $at, 1b\n"
1275      "nop\n";
1276  DriverStr(expected, "Blt");
1277}
1278
1279TEST_F(AssemblerMIPSTest, Bge) {
1280  mips::MipsLabel label;
1281  __ Bge(mips::A0, mips::A1, &label);
1282  constexpr size_t kAdduCount1 = 63;
1283  for (size_t i = 0; i != kAdduCount1; ++i) {
1284    __ Addu(mips::ZERO, mips::ZERO, mips::ZERO);
1285  }
1286  __ Bind(&label);
1287  constexpr size_t kAdduCount2 = 64;
1288  for (size_t i = 0; i != kAdduCount2; ++i) {
1289    __ Addu(mips::ZERO, mips::ZERO, mips::ZERO);
1290  }
1291  __ Bge(mips::A2, mips::A3, &label);
1292
1293  std::string expected =
1294      ".set noreorder\n"
1295      "slt $at, $a0, $a1\n"
1296      "beq $zero, $at, 1f\n"
1297      "nop\n" +
1298      RepeatInsn(kAdduCount1, "addu $zero, $zero, $zero\n") +
1299      "1:\n" +
1300      RepeatInsn(kAdduCount2, "addu $zero, $zero, $zero\n") +
1301      "slt $at, $a2, $a3\n"
1302      "beq $zero, $at, 1b\n"
1303      "nop\n";
1304  DriverStr(expected, "Bge");
1305}
1306
1307TEST_F(AssemblerMIPSTest, Bltu) {
1308  mips::MipsLabel label;
1309  __ Bltu(mips::A0, mips::A1, &label);
1310  constexpr size_t kAdduCount1 = 63;
1311  for (size_t i = 0; i != kAdduCount1; ++i) {
1312    __ Addu(mips::ZERO, mips::ZERO, mips::ZERO);
1313  }
1314  __ Bind(&label);
1315  constexpr size_t kAdduCount2 = 64;
1316  for (size_t i = 0; i != kAdduCount2; ++i) {
1317    __ Addu(mips::ZERO, mips::ZERO, mips::ZERO);
1318  }
1319  __ Bltu(mips::A2, mips::A3, &label);
1320
1321  std::string expected =
1322      ".set noreorder\n"
1323      "sltu $at, $a0, $a1\n"
1324      "bne $zero, $at, 1f\n"
1325      "nop\n" +
1326      RepeatInsn(kAdduCount1, "addu $zero, $zero, $zero\n") +
1327      "1:\n" +
1328      RepeatInsn(kAdduCount2, "addu $zero, $zero, $zero\n") +
1329      "sltu $at, $a2, $a3\n"
1330      "bne $zero, $at, 1b\n"
1331      "nop\n";
1332  DriverStr(expected, "Bltu");
1333}
1334
1335TEST_F(AssemblerMIPSTest, Bgeu) {
1336  mips::MipsLabel label;
1337  __ Bgeu(mips::A0, mips::A1, &label);
1338  constexpr size_t kAdduCount1 = 63;
1339  for (size_t i = 0; i != kAdduCount1; ++i) {
1340    __ Addu(mips::ZERO, mips::ZERO, mips::ZERO);
1341  }
1342  __ Bind(&label);
1343  constexpr size_t kAdduCount2 = 64;
1344  for (size_t i = 0; i != kAdduCount2; ++i) {
1345    __ Addu(mips::ZERO, mips::ZERO, mips::ZERO);
1346  }
1347  __ Bgeu(mips::A2, mips::A3, &label);
1348
1349  std::string expected =
1350      ".set noreorder\n"
1351      "sltu $at, $a0, $a1\n"
1352      "beq $zero, $at, 1f\n"
1353      "nop\n" +
1354      RepeatInsn(kAdduCount1, "addu $zero, $zero, $zero\n") +
1355      "1:\n" +
1356      RepeatInsn(kAdduCount2, "addu $zero, $zero, $zero\n") +
1357      "sltu $at, $a2, $a3\n"
1358      "beq $zero, $at, 1b\n"
1359      "nop\n";
1360  DriverStr(expected, "Bgeu");
1361}
1362
1363TEST_F(AssemblerMIPSTest, Bc1f) {
1364  mips::MipsLabel label;
1365  __ Bc1f(0, &label);
1366  constexpr size_t kAdduCount1 = 63;
1367  for (size_t i = 0; i != kAdduCount1; ++i) {
1368    __ Addu(mips::ZERO, mips::ZERO, mips::ZERO);
1369  }
1370  __ Bind(&label);
1371  constexpr size_t kAdduCount2 = 64;
1372  for (size_t i = 0; i != kAdduCount2; ++i) {
1373    __ Addu(mips::ZERO, mips::ZERO, mips::ZERO);
1374  }
1375  __ Bc1f(7, &label);
1376
1377  std::string expected =
1378      ".set noreorder\n"
1379      "bc1f $fcc0, 1f\n"
1380      "nop\n" +
1381      RepeatInsn(kAdduCount1, "addu $zero, $zero, $zero\n") +
1382      "1:\n" +
1383      RepeatInsn(kAdduCount2, "addu $zero, $zero, $zero\n") +
1384      "bc1f $fcc7, 1b\n"
1385      "nop\n";
1386  DriverStr(expected, "Bc1f");
1387}
1388
1389TEST_F(AssemblerMIPSTest, Bc1t) {
1390  mips::MipsLabel label;
1391  __ Bc1t(0, &label);
1392  constexpr size_t kAdduCount1 = 63;
1393  for (size_t i = 0; i != kAdduCount1; ++i) {
1394    __ Addu(mips::ZERO, mips::ZERO, mips::ZERO);
1395  }
1396  __ Bind(&label);
1397  constexpr size_t kAdduCount2 = 64;
1398  for (size_t i = 0; i != kAdduCount2; ++i) {
1399    __ Addu(mips::ZERO, mips::ZERO, mips::ZERO);
1400  }
1401  __ Bc1t(7, &label);
1402
1403  std::string expected =
1404      ".set noreorder\n"
1405      "bc1t $fcc0, 1f\n"
1406      "nop\n" +
1407      RepeatInsn(kAdduCount1, "addu $zero, $zero, $zero\n") +
1408      "1:\n" +
1409      RepeatInsn(kAdduCount2, "addu $zero, $zero, $zero\n") +
1410      "bc1t $fcc7, 1b\n"
1411      "nop\n";
1412  DriverStr(expected, "Bc1t");
1413}
1414
1415#undef __
1416
1417}  // namespace art
1418