assembler_mips_test.cc revision baf60b7cceb3968ae36540e2f7f92cec3805f6ed 
1/*
2 * Copyright (C) 2015 The Android Open Source Project
3 *
4 * Licensed under the Apache License, Version 2.0 (the "License");
5 * you may not use this file except in compliance with the License.
6 * You may obtain a copy of the License at
7 *
8 *      http://www.apache.org/licenses/LICENSE-2.0
9 *
10 * Unless required by applicable law or agreed to in writing, software
11 * distributed under the License is distributed on an "AS IS" BASIS,
12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 * See the License for the specific language governing permissions and
14 * limitations under the License.
15 */
16
17#include "assembler_mips.h"
18
19#include <map>
20
21#include "base/stl_util.h"
22#include "utils/assembler_test.h"
23
24#define __ GetAssembler()->
25
26namespace art {
27
28struct MIPSCpuRegisterCompare {
29  bool operator()(const mips::Register& a, const mips::Register& b) const {
30    return a < b;
31  }
32};
33
34class AssemblerMIPSTest : public AssemblerTest<mips::MipsAssembler,
35                                               mips::Register,
36                                               mips::FRegister,
37                                               uint32_t> {
38 public:
39  typedef AssemblerTest<mips::MipsAssembler, mips::Register, mips::FRegister, uint32_t> Base;
40
41 protected:
42  // Get the typically used name for this architecture, e.g., aarch64, x86-64, ...
43  std::string GetArchitectureString() OVERRIDE {
44    return "mips";
45  }
46
47  std::string GetAssemblerParameters() OVERRIDE {
48    return " --no-warn -32 -march=mips32r2";
49  }
50
51  std::string GetDisassembleParameters() OVERRIDE {
52    return " -D -bbinary -mmips:isa32r2";
53  }
54
55  void SetUpHelpers() OVERRIDE {
56    if (registers_.size() == 0) {
57      registers_.push_back(new mips::Register(mips::ZERO));
58      registers_.push_back(new mips::Register(mips::AT));
59      registers_.push_back(new mips::Register(mips::V0));
60      registers_.push_back(new mips::Register(mips::V1));
61      registers_.push_back(new mips::Register(mips::A0));
62      registers_.push_back(new mips::Register(mips::A1));
63      registers_.push_back(new mips::Register(mips::A2));
64      registers_.push_back(new mips::Register(mips::A3));
65      registers_.push_back(new mips::Register(mips::T0));
66      registers_.push_back(new mips::Register(mips::T1));
67      registers_.push_back(new mips::Register(mips::T2));
68      registers_.push_back(new mips::Register(mips::T3));
69      registers_.push_back(new mips::Register(mips::T4));
70      registers_.push_back(new mips::Register(mips::T5));
71      registers_.push_back(new mips::Register(mips::T6));
72      registers_.push_back(new mips::Register(mips::T7));
73      registers_.push_back(new mips::Register(mips::S0));
74      registers_.push_back(new mips::Register(mips::S1));
75      registers_.push_back(new mips::Register(mips::S2));
76      registers_.push_back(new mips::Register(mips::S3));
77      registers_.push_back(new mips::Register(mips::S4));
78      registers_.push_back(new mips::Register(mips::S5));
79      registers_.push_back(new mips::Register(mips::S6));
80      registers_.push_back(new mips::Register(mips::S7));
81      registers_.push_back(new mips::Register(mips::T8));
82      registers_.push_back(new mips::Register(mips::T9));
83      registers_.push_back(new mips::Register(mips::K0));
84      registers_.push_back(new mips::Register(mips::K1));
85      registers_.push_back(new mips::Register(mips::GP));
86      registers_.push_back(new mips::Register(mips::SP));
87      registers_.push_back(new mips::Register(mips::FP));
88      registers_.push_back(new mips::Register(mips::RA));
89
90      secondary_register_names_.emplace(mips::Register(mips::ZERO), "zero");
91      secondary_register_names_.emplace(mips::Register(mips::AT), "at");
92      secondary_register_names_.emplace(mips::Register(mips::V0), "v0");
93      secondary_register_names_.emplace(mips::Register(mips::V1), "v1");
94      secondary_register_names_.emplace(mips::Register(mips::A0), "a0");
95      secondary_register_names_.emplace(mips::Register(mips::A1), "a1");
96      secondary_register_names_.emplace(mips::Register(mips::A2), "a2");
97      secondary_register_names_.emplace(mips::Register(mips::A3), "a3");
98      secondary_register_names_.emplace(mips::Register(mips::T0), "t0");
99      secondary_register_names_.emplace(mips::Register(mips::T1), "t1");
100      secondary_register_names_.emplace(mips::Register(mips::T2), "t2");
101      secondary_register_names_.emplace(mips::Register(mips::T3), "t3");
102      secondary_register_names_.emplace(mips::Register(mips::T4), "t4");
103      secondary_register_names_.emplace(mips::Register(mips::T5), "t5");
104      secondary_register_names_.emplace(mips::Register(mips::T6), "t6");
105      secondary_register_names_.emplace(mips::Register(mips::T7), "t7");
106      secondary_register_names_.emplace(mips::Register(mips::S0), "s0");
107      secondary_register_names_.emplace(mips::Register(mips::S1), "s1");
108      secondary_register_names_.emplace(mips::Register(mips::S2), "s2");
109      secondary_register_names_.emplace(mips::Register(mips::S3), "s3");
110      secondary_register_names_.emplace(mips::Register(mips::S4), "s4");
111      secondary_register_names_.emplace(mips::Register(mips::S5), "s5");
112      secondary_register_names_.emplace(mips::Register(mips::S6), "s6");
113      secondary_register_names_.emplace(mips::Register(mips::S7), "s7");
114      secondary_register_names_.emplace(mips::Register(mips::T8), "t8");
115      secondary_register_names_.emplace(mips::Register(mips::T9), "t9");
116      secondary_register_names_.emplace(mips::Register(mips::K0), "k0");
117      secondary_register_names_.emplace(mips::Register(mips::K1), "k1");
118      secondary_register_names_.emplace(mips::Register(mips::GP), "gp");
119      secondary_register_names_.emplace(mips::Register(mips::SP), "sp");
120      secondary_register_names_.emplace(mips::Register(mips::FP), "fp");
121      secondary_register_names_.emplace(mips::Register(mips::RA), "ra");
122
123      fp_registers_.push_back(new mips::FRegister(mips::F0));
124      fp_registers_.push_back(new mips::FRegister(mips::F1));
125      fp_registers_.push_back(new mips::FRegister(mips::F2));
126      fp_registers_.push_back(new mips::FRegister(mips::F3));
127      fp_registers_.push_back(new mips::FRegister(mips::F4));
128      fp_registers_.push_back(new mips::FRegister(mips::F5));
129      fp_registers_.push_back(new mips::FRegister(mips::F6));
130      fp_registers_.push_back(new mips::FRegister(mips::F7));
131      fp_registers_.push_back(new mips::FRegister(mips::F8));
132      fp_registers_.push_back(new mips::FRegister(mips::F9));
133      fp_registers_.push_back(new mips::FRegister(mips::F10));
134      fp_registers_.push_back(new mips::FRegister(mips::F11));
135      fp_registers_.push_back(new mips::FRegister(mips::F12));
136      fp_registers_.push_back(new mips::FRegister(mips::F13));
137      fp_registers_.push_back(new mips::FRegister(mips::F14));
138      fp_registers_.push_back(new mips::FRegister(mips::F15));
139      fp_registers_.push_back(new mips::FRegister(mips::F16));
140      fp_registers_.push_back(new mips::FRegister(mips::F17));
141      fp_registers_.push_back(new mips::FRegister(mips::F18));
142      fp_registers_.push_back(new mips::FRegister(mips::F19));
143      fp_registers_.push_back(new mips::FRegister(mips::F20));
144      fp_registers_.push_back(new mips::FRegister(mips::F21));
145      fp_registers_.push_back(new mips::FRegister(mips::F22));
146      fp_registers_.push_back(new mips::FRegister(mips::F23));
147      fp_registers_.push_back(new mips::FRegister(mips::F24));
148      fp_registers_.push_back(new mips::FRegister(mips::F25));
149      fp_registers_.push_back(new mips::FRegister(mips::F26));
150      fp_registers_.push_back(new mips::FRegister(mips::F27));
151      fp_registers_.push_back(new mips::FRegister(mips::F28));
152      fp_registers_.push_back(new mips::FRegister(mips::F29));
153      fp_registers_.push_back(new mips::FRegister(mips::F30));
154      fp_registers_.push_back(new mips::FRegister(mips::F31));
155    }
156  }
157
158  void TearDown() OVERRIDE {
159    AssemblerTest::TearDown();
160    STLDeleteElements(&registers_);
161    STLDeleteElements(&fp_registers_);
162  }
163
164  std::vector<mips::Register*> GetRegisters() OVERRIDE {
165    return registers_;
166  }
167
168  std::vector<mips::FRegister*> GetFPRegisters() OVERRIDE {
169    return fp_registers_;
170  }
171
172  uint32_t CreateImmediate(int64_t imm_value) OVERRIDE {
173    return imm_value;
174  }
175
176  std::string GetSecondaryRegisterName(const mips::Register& reg) OVERRIDE {
177    CHECK(secondary_register_names_.find(reg) != secondary_register_names_.end());
178    return secondary_register_names_[reg];
179  }
180
181  std::string RepeatInsn(size_t count, const std::string& insn) {
182    std::string result;
183    for (; count != 0u; --count) {
184      result += insn;
185    }
186    return result;
187  }
188
189  void BranchCondOneRegHelper(void (mips::MipsAssembler::*f)(mips::Register,
190                                                             mips::MipsLabel*),
191                              std::string instr_name) {
192    mips::MipsLabel label;
193    (Base::GetAssembler()->*f)(mips::A0, &label);
194    constexpr size_t kAdduCount1 = 63;
195    for (size_t i = 0; i != kAdduCount1; ++i) {
196      __ Addu(mips::ZERO, mips::ZERO, mips::ZERO);
197    }
198    __ Bind(&label);
199    constexpr size_t kAdduCount2 = 64;
200    for (size_t i = 0; i != kAdduCount2; ++i) {
201      __ Addu(mips::ZERO, mips::ZERO, mips::ZERO);
202    }
203    (Base::GetAssembler()->*f)(mips::A1, &label);
204
205    std::string expected =
206        ".set noreorder\n" +
207        instr_name + " $a0, 1f\n"
208        "nop\n" +
209        RepeatInsn(kAdduCount1, "addu $zero, $zero, $zero\n") +
210        "1:\n" +
211        RepeatInsn(kAdduCount2, "addu $zero, $zero, $zero\n") +
212        instr_name + " $a1, 1b\n"
213        "nop\n";
214    DriverStr(expected, instr_name);
215  }
216
217  void BranchCondTwoRegsHelper(void (mips::MipsAssembler::*f)(mips::Register,
218                                                              mips::Register,
219                                                              mips::MipsLabel*),
220                               std::string instr_name) {
221    mips::MipsLabel label;
222    (Base::GetAssembler()->*f)(mips::A0, mips::A1, &label);
223    constexpr size_t kAdduCount1 = 63;
224    for (size_t i = 0; i != kAdduCount1; ++i) {
225      __ Addu(mips::ZERO, mips::ZERO, mips::ZERO);
226    }
227    __ Bind(&label);
228    constexpr size_t kAdduCount2 = 64;
229    for (size_t i = 0; i != kAdduCount2; ++i) {
230      __ Addu(mips::ZERO, mips::ZERO, mips::ZERO);
231    }
232    (Base::GetAssembler()->*f)(mips::A2, mips::A3, &label);
233
234    std::string expected =
235        ".set noreorder\n" +
236        instr_name + " $a0, $a1, 1f\n"
237        "nop\n" +
238        RepeatInsn(kAdduCount1, "addu $zero, $zero, $zero\n") +
239        "1:\n" +
240        RepeatInsn(kAdduCount2, "addu $zero, $zero, $zero\n") +
241        instr_name + " $a2, $a3, 1b\n"
242        "nop\n";
243    DriverStr(expected, instr_name);
244  }
245
246 private:
247  std::vector<mips::Register*> registers_;
248  std::map<mips::Register, std::string, MIPSCpuRegisterCompare> secondary_register_names_;
249
250  std::vector<mips::FRegister*> fp_registers_;
251};
252
253
254TEST_F(AssemblerMIPSTest, Toolchain) {
255  EXPECT_TRUE(CheckTools());
256}
257
258TEST_F(AssemblerMIPSTest, Addu) {
259  DriverStr(RepeatRRR(&mips::MipsAssembler::Addu, "addu ${reg1}, ${reg2}, ${reg3}"), "Addu");
260}
261
262TEST_F(AssemblerMIPSTest, Addiu) {
263  DriverStr(RepeatRRIb(&mips::MipsAssembler::Addiu, -16, "addiu ${reg1}, ${reg2}, {imm}"), "Addiu");
264}
265
266TEST_F(AssemblerMIPSTest, Subu) {
267  DriverStr(RepeatRRR(&mips::MipsAssembler::Subu, "subu ${reg1}, ${reg2}, ${reg3}"), "Subu");
268}
269
270TEST_F(AssemblerMIPSTest, MultR2) {
271  DriverStr(RepeatRR(&mips::MipsAssembler::MultR2, "mult ${reg1}, ${reg2}"), "MultR2");
272}
273
274TEST_F(AssemblerMIPSTest, MultuR2) {
275  DriverStr(RepeatRR(&mips::MipsAssembler::MultuR2, "multu ${reg1}, ${reg2}"), "MultuR2");
276}
277
278TEST_F(AssemblerMIPSTest, DivR2Basic) {
279  DriverStr(RepeatRR(&mips::MipsAssembler::DivR2, "div $zero, ${reg1}, ${reg2}"), "DivR2Basic");
280}
281
282TEST_F(AssemblerMIPSTest, DivuR2Basic) {
283  DriverStr(RepeatRR(&mips::MipsAssembler::DivuR2, "divu $zero, ${reg1}, ${reg2}"), "DivuR2Basic");
284}
285
286TEST_F(AssemblerMIPSTest, MulR2) {
287  DriverStr(RepeatRRR(&mips::MipsAssembler::MulR2, "mul ${reg1}, ${reg2}, ${reg3}"), "MulR2");
288}
289
290TEST_F(AssemblerMIPSTest, DivR2) {
291  DriverStr(RepeatRRR(&mips::MipsAssembler::DivR2, "div $zero, ${reg2}, ${reg3}\nmflo ${reg1}"),
292            "DivR2");
293}
294
295TEST_F(AssemblerMIPSTest, ModR2) {
296  DriverStr(RepeatRRR(&mips::MipsAssembler::ModR2, "div $zero, ${reg2}, ${reg3}\nmfhi ${reg1}"),
297            "ModR2");
298}
299
300TEST_F(AssemblerMIPSTest, DivuR2) {
301  DriverStr(RepeatRRR(&mips::MipsAssembler::DivuR2, "divu $zero, ${reg2}, ${reg3}\nmflo ${reg1}"),
302            "DivuR2");
303}
304
305TEST_F(AssemblerMIPSTest, ModuR2) {
306  DriverStr(RepeatRRR(&mips::MipsAssembler::ModuR2, "divu $zero, ${reg2}, ${reg3}\nmfhi ${reg1}"),
307            "ModuR2");
308}
309
310TEST_F(AssemblerMIPSTest, And) {
311  DriverStr(RepeatRRR(&mips::MipsAssembler::And, "and ${reg1}, ${reg2}, ${reg3}"), "And");
312}
313
314TEST_F(AssemblerMIPSTest, Andi) {
315  DriverStr(RepeatRRIb(&mips::MipsAssembler::Andi, 16, "andi ${reg1}, ${reg2}, {imm}"), "Andi");
316}
317
318TEST_F(AssemblerMIPSTest, Or) {
319  DriverStr(RepeatRRR(&mips::MipsAssembler::Or, "or ${reg1}, ${reg2}, ${reg3}"), "Or");
320}
321
322TEST_F(AssemblerMIPSTest, Ori) {
323  DriverStr(RepeatRRIb(&mips::MipsAssembler::Ori, 16, "ori ${reg1}, ${reg2}, {imm}"), "Ori");
324}
325
326TEST_F(AssemblerMIPSTest, Xor) {
327  DriverStr(RepeatRRR(&mips::MipsAssembler::Xor, "xor ${reg1}, ${reg2}, ${reg3}"), "Xor");
328}
329
330TEST_F(AssemblerMIPSTest, Xori) {
331  DriverStr(RepeatRRIb(&mips::MipsAssembler::Xori, 16, "xori ${reg1}, ${reg2}, {imm}"), "Xori");
332}
333
334TEST_F(AssemblerMIPSTest, Nor) {
335  DriverStr(RepeatRRR(&mips::MipsAssembler::Nor, "nor ${reg1}, ${reg2}, ${reg3}"), "Nor");
336}
337
338TEST_F(AssemblerMIPSTest, Seb) {
339  DriverStr(RepeatRR(&mips::MipsAssembler::Seb, "seb ${reg1}, ${reg2}"), "Seb");
340}
341
342TEST_F(AssemblerMIPSTest, Seh) {
343  DriverStr(RepeatRR(&mips::MipsAssembler::Seh, "seh ${reg1}, ${reg2}"), "Seh");
344}
345
346TEST_F(AssemblerMIPSTest, Sll) {
347  DriverStr(RepeatRRIb(&mips::MipsAssembler::Sll, 5, "sll ${reg1}, ${reg2}, {imm}"), "Sll");
348}
349
350TEST_F(AssemblerMIPSTest, Srl) {
351  DriverStr(RepeatRRIb(&mips::MipsAssembler::Srl, 5, "srl ${reg1}, ${reg2}, {imm}"), "Srl");
352}
353
354TEST_F(AssemblerMIPSTest, Sra) {
355  DriverStr(RepeatRRIb(&mips::MipsAssembler::Sra, 5, "sra ${reg1}, ${reg2}, {imm}"), "Sra");
356}
357
358TEST_F(AssemblerMIPSTest, Sllv) {
359  DriverStr(RepeatRRR(&mips::MipsAssembler::Sllv, "sllv ${reg1}, ${reg2}, ${reg3}"), "Sllv");
360}
361
362TEST_F(AssemblerMIPSTest, Srlv) {
363  DriverStr(RepeatRRR(&mips::MipsAssembler::Srlv, "srlv ${reg1}, ${reg2}, ${reg3}"), "Srlv");
364}
365
366TEST_F(AssemblerMIPSTest, Srav) {
367  DriverStr(RepeatRRR(&mips::MipsAssembler::Srav, "srav ${reg1}, ${reg2}, ${reg3}"), "Srav");
368}
369
370TEST_F(AssemblerMIPSTest, Ins) {
371  std::vector<mips::Register*> regs = GetRegisters();
372  WarnOnCombinations(regs.size() * regs.size() * 33 * 16);
373  std::string expected;
374  for (mips::Register* reg1 : regs) {
375    for (mips::Register* reg2 : regs) {
376      for (int32_t pos = 0; pos < 32; pos++) {
377        for (int32_t size = 1; pos + size <= 32; size++) {
378          __ Ins(*reg1, *reg2, pos, size);
379          std::ostringstream instr;
380          instr << "ins $" << *reg1 << ", $" << *reg2 << ", " << pos << ", " << size << "\n";
381          expected += instr.str();
382        }
383      }
384    }
385  }
386  DriverStr(expected, "Ins");
387}
388
389TEST_F(AssemblerMIPSTest, Ext) {
390  std::vector<mips::Register*> regs = GetRegisters();
391  WarnOnCombinations(regs.size() * regs.size() * 33 * 16);
392  std::string expected;
393  for (mips::Register* reg1 : regs) {
394    for (mips::Register* reg2 : regs) {
395      for (int32_t pos = 0; pos < 32; pos++) {
396        for (int32_t size = 1; pos + size <= 32; size++) {
397          __ Ext(*reg1, *reg2, pos, size);
398          std::ostringstream instr;
399          instr << "ext $" << *reg1 << ", $" << *reg2 << ", " << pos << ", " << size << "\n";
400          expected += instr.str();
401        }
402      }
403    }
404  }
405  DriverStr(expected, "Ext");
406}
407
408TEST_F(AssemblerMIPSTest, Lb) {
409  DriverStr(RepeatRRIb(&mips::MipsAssembler::Lb, -16, "lb ${reg1}, {imm}(${reg2})"), "Lb");
410}
411
412TEST_F(AssemblerMIPSTest, Lh) {
413  DriverStr(RepeatRRIb(&mips::MipsAssembler::Lh, -16, "lh ${reg1}, {imm}(${reg2})"), "Lh");
414}
415
416TEST_F(AssemblerMIPSTest, Lw) {
417  DriverStr(RepeatRRIb(&mips::MipsAssembler::Lw, -16, "lw ${reg1}, {imm}(${reg2})"), "Lw");
418}
419
420TEST_F(AssemblerMIPSTest, Lbu) {
421  DriverStr(RepeatRRIb(&mips::MipsAssembler::Lbu, -16, "lbu ${reg1}, {imm}(${reg2})"), "Lbu");
422}
423
424TEST_F(AssemblerMIPSTest, Lhu) {
425  DriverStr(RepeatRRIb(&mips::MipsAssembler::Lhu, -16, "lhu ${reg1}, {imm}(${reg2})"), "Lhu");
426}
427
428TEST_F(AssemblerMIPSTest, Lui) {
429  DriverStr(RepeatRIb(&mips::MipsAssembler::Lui, 16, "lui ${reg}, {imm}"), "Lui");
430}
431
432TEST_F(AssemblerMIPSTest, Mfhi) {
433  DriverStr(RepeatR(&mips::MipsAssembler::Mfhi, "mfhi ${reg}"), "Mfhi");
434}
435
436TEST_F(AssemblerMIPSTest, Mflo) {
437  DriverStr(RepeatR(&mips::MipsAssembler::Mflo, "mflo ${reg}"), "Mflo");
438}
439
440TEST_F(AssemblerMIPSTest, Sb) {
441  DriverStr(RepeatRRIb(&mips::MipsAssembler::Sb, -16, "sb ${reg1}, {imm}(${reg2})"), "Sb");
442}
443
444TEST_F(AssemblerMIPSTest, Sh) {
445  DriverStr(RepeatRRIb(&mips::MipsAssembler::Sh, -16, "sh ${reg1}, {imm}(${reg2})"), "Sh");
446}
447
448TEST_F(AssemblerMIPSTest, Sw) {
449  DriverStr(RepeatRRIb(&mips::MipsAssembler::Sw, -16, "sw ${reg1}, {imm}(${reg2})"), "Sw");
450}
451
452TEST_F(AssemblerMIPSTest, Slt) {
453  DriverStr(RepeatRRR(&mips::MipsAssembler::Slt, "slt ${reg1}, ${reg2}, ${reg3}"), "Slt");
454}
455
456TEST_F(AssemblerMIPSTest, Sltu) {
457  DriverStr(RepeatRRR(&mips::MipsAssembler::Sltu, "sltu ${reg1}, ${reg2}, ${reg3}"), "Sltu");
458}
459
460TEST_F(AssemblerMIPSTest, Slti) {
461  DriverStr(RepeatRRIb(&mips::MipsAssembler::Slti, -16, "slti ${reg1}, ${reg2}, {imm}"), "Slti");
462}
463
464TEST_F(AssemblerMIPSTest, Sltiu) {
465  DriverStr(RepeatRRIb(&mips::MipsAssembler::Sltiu, -16, "sltiu ${reg1}, ${reg2}, {imm}"), "Sltiu");
466}
467
468TEST_F(AssemblerMIPSTest, AddS) {
469  DriverStr(RepeatFFF(&mips::MipsAssembler::AddS, "add.s ${reg1}, ${reg2}, ${reg3}"), "AddS");
470}
471
472TEST_F(AssemblerMIPSTest, AddD) {
473  DriverStr(RepeatFFF(&mips::MipsAssembler::AddD, "add.d ${reg1}, ${reg2}, ${reg3}"), "AddD");
474}
475
476TEST_F(AssemblerMIPSTest, SubS) {
477  DriverStr(RepeatFFF(&mips::MipsAssembler::SubS, "sub.s ${reg1}, ${reg2}, ${reg3}"), "SubS");
478}
479
480TEST_F(AssemblerMIPSTest, SubD) {
481  DriverStr(RepeatFFF(&mips::MipsAssembler::SubD, "sub.d ${reg1}, ${reg2}, ${reg3}"), "SubD");
482}
483
484TEST_F(AssemblerMIPSTest, MulS) {
485  DriverStr(RepeatFFF(&mips::MipsAssembler::MulS, "mul.s ${reg1}, ${reg2}, ${reg3}"), "MulS");
486}
487
488TEST_F(AssemblerMIPSTest, MulD) {
489  DriverStr(RepeatFFF(&mips::MipsAssembler::MulD, "mul.d ${reg1}, ${reg2}, ${reg3}"), "MulD");
490}
491
492TEST_F(AssemblerMIPSTest, DivS) {
493  DriverStr(RepeatFFF(&mips::MipsAssembler::DivS, "div.s ${reg1}, ${reg2}, ${reg3}"), "DivS");
494}
495
496TEST_F(AssemblerMIPSTest, DivD) {
497  DriverStr(RepeatFFF(&mips::MipsAssembler::DivD, "div.d ${reg1}, ${reg2}, ${reg3}"), "DivD");
498}
499
500TEST_F(AssemblerMIPSTest, MovS) {
501  DriverStr(RepeatFF(&mips::MipsAssembler::MovS, "mov.s ${reg1}, ${reg2}"), "MovS");
502}
503
504TEST_F(AssemblerMIPSTest, MovD) {
505  DriverStr(RepeatFF(&mips::MipsAssembler::MovD, "mov.d ${reg1}, ${reg2}"), "MovD");
506}
507
508TEST_F(AssemblerMIPSTest, NegS) {
509  DriverStr(RepeatFF(&mips::MipsAssembler::NegS, "neg.s ${reg1}, ${reg2}"), "NegS");
510}
511
512TEST_F(AssemblerMIPSTest, NegD) {
513  DriverStr(RepeatFF(&mips::MipsAssembler::NegD, "neg.d ${reg1}, ${reg2}"), "NegD");
514}
515
516TEST_F(AssemblerMIPSTest, CunS) {
517  DriverStr(RepeatIbFF(&mips::MipsAssembler::CunS, 3, "c.un.s $fcc{imm}, ${reg1}, ${reg2}"),
518            "CunS");
519}
520
521TEST_F(AssemblerMIPSTest, CeqS) {
522  DriverStr(RepeatIbFF(&mips::MipsAssembler::CeqS, 3, "c.eq.s $fcc{imm}, ${reg1}, ${reg2}"),
523            "CeqS");
524}
525
526TEST_F(AssemblerMIPSTest, CueqS) {
527  DriverStr(RepeatIbFF(&mips::MipsAssembler::CueqS, 3, "c.ueq.s $fcc{imm}, ${reg1}, ${reg2}"),
528            "CueqS");
529}
530
531TEST_F(AssemblerMIPSTest, ColtS) {
532  DriverStr(RepeatIbFF(&mips::MipsAssembler::ColtS, 3, "c.olt.s $fcc{imm}, ${reg1}, ${reg2}"),
533            "ColtS");
534}
535
536TEST_F(AssemblerMIPSTest, CultS) {
537  DriverStr(RepeatIbFF(&mips::MipsAssembler::CultS, 3, "c.ult.s $fcc{imm}, ${reg1}, ${reg2}"),
538            "CultS");
539}
540
541TEST_F(AssemblerMIPSTest, ColeS) {
542  DriverStr(RepeatIbFF(&mips::MipsAssembler::ColeS, 3, "c.ole.s $fcc{imm}, ${reg1}, ${reg2}"),
543            "ColeS");
544}
545
546TEST_F(AssemblerMIPSTest, CuleS) {
547  DriverStr(RepeatIbFF(&mips::MipsAssembler::CuleS, 3, "c.ule.s $fcc{imm}, ${reg1}, ${reg2}"),
548            "CuleS");
549}
550
551TEST_F(AssemblerMIPSTest, CunD) {
552  DriverStr(RepeatIbFF(&mips::MipsAssembler::CunD, 3, "c.un.d $fcc{imm}, ${reg1}, ${reg2}"),
553            "CunD");
554}
555
556TEST_F(AssemblerMIPSTest, CeqD) {
557  DriverStr(RepeatIbFF(&mips::MipsAssembler::CeqD, 3, "c.eq.d $fcc{imm}, ${reg1}, ${reg2}"),
558            "CeqD");
559}
560
561TEST_F(AssemblerMIPSTest, CueqD) {
562  DriverStr(RepeatIbFF(&mips::MipsAssembler::CueqD, 3, "c.ueq.d $fcc{imm}, ${reg1}, ${reg2}"),
563            "CueqD");
564}
565
566TEST_F(AssemblerMIPSTest, ColtD) {
567  DriverStr(RepeatIbFF(&mips::MipsAssembler::ColtD, 3, "c.olt.d $fcc{imm}, ${reg1}, ${reg2}"),
568            "ColtD");
569}
570
571TEST_F(AssemblerMIPSTest, CultD) {
572  DriverStr(RepeatIbFF(&mips::MipsAssembler::CultD, 3, "c.ult.d $fcc{imm}, ${reg1}, ${reg2}"),
573            "CultD");
574}
575
576TEST_F(AssemblerMIPSTest, ColeD) {
577  DriverStr(RepeatIbFF(&mips::MipsAssembler::ColeD, 3, "c.ole.d $fcc{imm}, ${reg1}, ${reg2}"),
578            "ColeD");
579}
580
581TEST_F(AssemblerMIPSTest, CuleD) {
582  DriverStr(RepeatIbFF(&mips::MipsAssembler::CuleD, 3, "c.ule.d $fcc{imm}, ${reg1}, ${reg2}"),
583            "CuleD");
584}
585
586TEST_F(AssemblerMIPSTest, Movf) {
587  DriverStr(RepeatRRIb(&mips::MipsAssembler::Movf, 3, "movf ${reg1}, ${reg2}, $fcc{imm}"), "Movf");
588}
589
590TEST_F(AssemblerMIPSTest, Movt) {
591  DriverStr(RepeatRRIb(&mips::MipsAssembler::Movt, 3, "movt ${reg1}, ${reg2}, $fcc{imm}"), "Movt");
592}
593
594TEST_F(AssemblerMIPSTest, CvtSW) {
595  DriverStr(RepeatFF(&mips::MipsAssembler::Cvtsw, "cvt.s.w ${reg1}, ${reg2}"), "CvtSW");
596}
597
598TEST_F(AssemblerMIPSTest, CvtDW) {
599  DriverStr(RepeatFF(&mips::MipsAssembler::Cvtdw, "cvt.d.w ${reg1}, ${reg2}"), "CvtDW");
600}
601
602TEST_F(AssemblerMIPSTest, CvtSL) {
603  DriverStr(RepeatFF(&mips::MipsAssembler::Cvtsl, "cvt.s.l ${reg1}, ${reg2}"), "CvtSL");
604}
605
606TEST_F(AssemblerMIPSTest, CvtDL) {
607  DriverStr(RepeatFF(&mips::MipsAssembler::Cvtdl, "cvt.d.l ${reg1}, ${reg2}"), "CvtDL");
608}
609
610TEST_F(AssemblerMIPSTest, CvtSD) {
611  DriverStr(RepeatFF(&mips::MipsAssembler::Cvtsd, "cvt.s.d ${reg1}, ${reg2}"), "CvtSD");
612}
613
614TEST_F(AssemblerMIPSTest, CvtDS) {
615  DriverStr(RepeatFF(&mips::MipsAssembler::Cvtds, "cvt.d.s ${reg1}, ${reg2}"), "CvtDS");
616}
617
618TEST_F(AssemblerMIPSTest, TruncWS) {
619  DriverStr(RepeatFF(&mips::MipsAssembler::TruncWS, "trunc.w.s ${reg1}, ${reg2}"), "TruncWS");
620}
621
622TEST_F(AssemblerMIPSTest, TruncWD) {
623  DriverStr(RepeatFF(&mips::MipsAssembler::TruncWD, "trunc.w.d ${reg1}, ${reg2}"), "TruncWD");
624}
625
626TEST_F(AssemblerMIPSTest, TruncLS) {
627  DriverStr(RepeatFF(&mips::MipsAssembler::TruncLS, "trunc.l.s ${reg1}, ${reg2}"), "TruncLS");
628}
629
630TEST_F(AssemblerMIPSTest, TruncLD) {
631  DriverStr(RepeatFF(&mips::MipsAssembler::TruncLD, "trunc.l.d ${reg1}, ${reg2}"), "TruncLD");
632}
633
634TEST_F(AssemblerMIPSTest, Mfc1) {
635  DriverStr(RepeatRF(&mips::MipsAssembler::Mfc1, "mfc1 ${reg1}, ${reg2}"), "Mfc1");
636}
637
638TEST_F(AssemblerMIPSTest, Mtc1) {
639  DriverStr(RepeatRF(&mips::MipsAssembler::Mtc1, "mtc1 ${reg1}, ${reg2}"), "Mtc1");
640}
641
642TEST_F(AssemblerMIPSTest, Mfhc1) {
643  DriverStr(RepeatRF(&mips::MipsAssembler::Mfhc1, "mfhc1 ${reg1}, ${reg2}"), "Mfhc1");
644}
645
646TEST_F(AssemblerMIPSTest, Mthc1) {
647  DriverStr(RepeatRF(&mips::MipsAssembler::Mthc1, "mthc1 ${reg1}, ${reg2}"), "Mthc1");
648}
649
650TEST_F(AssemblerMIPSTest, Lwc1) {
651  DriverStr(RepeatFRIb(&mips::MipsAssembler::Lwc1, -16, "lwc1 ${reg1}, {imm}(${reg2})"), "Lwc1");
652}
653
654TEST_F(AssemblerMIPSTest, Ldc1) {
655  DriverStr(RepeatFRIb(&mips::MipsAssembler::Ldc1, -16, "ldc1 ${reg1}, {imm}(${reg2})"), "Ldc1");
656}
657
658TEST_F(AssemblerMIPSTest, Swc1) {
659  DriverStr(RepeatFRIb(&mips::MipsAssembler::Swc1, -16, "swc1 ${reg1}, {imm}(${reg2})"), "Swc1");
660}
661
662TEST_F(AssemblerMIPSTest, Sdc1) {
663  DriverStr(RepeatFRIb(&mips::MipsAssembler::Sdc1, -16, "sdc1 ${reg1}, {imm}(${reg2})"), "Sdc1");
664}
665
666TEST_F(AssemblerMIPSTest, Move) {
667  DriverStr(RepeatRR(&mips::MipsAssembler::Move, "or ${reg1}, ${reg2}, $zero"), "Move");
668}
669
670TEST_F(AssemblerMIPSTest, Clear) {
671  DriverStr(RepeatR(&mips::MipsAssembler::Clear, "or ${reg}, $zero, $zero"), "Clear");
672}
673
674TEST_F(AssemblerMIPSTest, Not) {
675  DriverStr(RepeatRR(&mips::MipsAssembler::Not, "nor ${reg1}, ${reg2}, $zero"), "Not");
676}
677
678TEST_F(AssemblerMIPSTest, LoadFromOffset) {
679  __ LoadFromOffset(mips::kLoadSignedByte, mips::A0, mips::A0, 0);
680  __ LoadFromOffset(mips::kLoadSignedByte, mips::A0, mips::A1, 0);
681  __ LoadFromOffset(mips::kLoadSignedByte, mips::A0, mips::A1, 256);
682  __ LoadFromOffset(mips::kLoadSignedByte, mips::A0, mips::A1, 1000);
683  __ LoadFromOffset(mips::kLoadSignedByte, mips::A0, mips::A1, 0x8000);
684  __ LoadFromOffset(mips::kLoadSignedByte, mips::A0, mips::A1, 0x10000);
685  __ LoadFromOffset(mips::kLoadSignedByte, mips::A0, mips::A1, 0x12345678);
686  __ LoadFromOffset(mips::kLoadSignedByte, mips::A0, mips::A1, -256);
687  __ LoadFromOffset(mips::kLoadSignedByte, mips::A0, mips::A1, 0xFFFF8000);
688  __ LoadFromOffset(mips::kLoadSignedByte, mips::A0, mips::A1, 0xABCDEF00);
689
690  __ LoadFromOffset(mips::kLoadUnsignedByte, mips::A0, mips::A0, 0);
691  __ LoadFromOffset(mips::kLoadUnsignedByte, mips::A0, mips::A1, 0);
692  __ LoadFromOffset(mips::kLoadUnsignedByte, mips::A0, mips::A1, 256);
693  __ LoadFromOffset(mips::kLoadUnsignedByte, mips::A0, mips::A1, 1000);
694  __ LoadFromOffset(mips::kLoadUnsignedByte, mips::A0, mips::A1, 0x8000);
695  __ LoadFromOffset(mips::kLoadUnsignedByte, mips::A0, mips::A1, 0x10000);
696  __ LoadFromOffset(mips::kLoadUnsignedByte, mips::A0, mips::A1, 0x12345678);
697  __ LoadFromOffset(mips::kLoadUnsignedByte, mips::A0, mips::A1, -256);
698  __ LoadFromOffset(mips::kLoadUnsignedByte, mips::A0, mips::A1, 0xFFFF8000);
699  __ LoadFromOffset(mips::kLoadUnsignedByte, mips::A0, mips::A1, 0xABCDEF00);
700
701  __ LoadFromOffset(mips::kLoadSignedHalfword, mips::A0, mips::A0, 0);
702  __ LoadFromOffset(mips::kLoadSignedHalfword, mips::A0, mips::A1, 0);
703  __ LoadFromOffset(mips::kLoadSignedHalfword, mips::A0, mips::A1, 256);
704  __ LoadFromOffset(mips::kLoadSignedHalfword, mips::A0, mips::A1, 1000);
705  __ LoadFromOffset(mips::kLoadSignedHalfword, mips::A0, mips::A1, 0x8000);
706  __ LoadFromOffset(mips::kLoadSignedHalfword, mips::A0, mips::A1, 0x10000);
707  __ LoadFromOffset(mips::kLoadSignedHalfword, mips::A0, mips::A1, 0x12345678);
708  __ LoadFromOffset(mips::kLoadSignedHalfword, mips::A0, mips::A1, -256);
709  __ LoadFromOffset(mips::kLoadSignedHalfword, mips::A0, mips::A1, 0xFFFF8000);
710  __ LoadFromOffset(mips::kLoadSignedHalfword, mips::A0, mips::A1, 0xABCDEF00);
711
712  __ LoadFromOffset(mips::kLoadUnsignedHalfword, mips::A0, mips::A0, 0);
713  __ LoadFromOffset(mips::kLoadUnsignedHalfword, mips::A0, mips::A1, 0);
714  __ LoadFromOffset(mips::kLoadUnsignedHalfword, mips::A0, mips::A1, 256);
715  __ LoadFromOffset(mips::kLoadUnsignedHalfword, mips::A0, mips::A1, 1000);
716  __ LoadFromOffset(mips::kLoadUnsignedHalfword, mips::A0, mips::A1, 0x8000);
717  __ LoadFromOffset(mips::kLoadUnsignedHalfword, mips::A0, mips::A1, 0x10000);
718  __ LoadFromOffset(mips::kLoadUnsignedHalfword, mips::A0, mips::A1, 0x12345678);
719  __ LoadFromOffset(mips::kLoadUnsignedHalfword, mips::A0, mips::A1, -256);
720  __ LoadFromOffset(mips::kLoadUnsignedHalfword, mips::A0, mips::A1, 0xFFFF8000);
721  __ LoadFromOffset(mips::kLoadUnsignedHalfword, mips::A0, mips::A1, 0xABCDEF00);
722
723  __ LoadFromOffset(mips::kLoadWord, mips::A0, mips::A0, 0);
724  __ LoadFromOffset(mips::kLoadWord, mips::A0, mips::A1, 0);
725  __ LoadFromOffset(mips::kLoadWord, mips::A0, mips::A1, 256);
726  __ LoadFromOffset(mips::kLoadWord, mips::A0, mips::A1, 1000);
727  __ LoadFromOffset(mips::kLoadWord, mips::A0, mips::A1, 0x8000);
728  __ LoadFromOffset(mips::kLoadWord, mips::A0, mips::A1, 0x10000);
729  __ LoadFromOffset(mips::kLoadWord, mips::A0, mips::A1, 0x12345678);
730  __ LoadFromOffset(mips::kLoadWord, mips::A0, mips::A1, -256);
731  __ LoadFromOffset(mips::kLoadWord, mips::A0, mips::A1, 0xFFFF8000);
732  __ LoadFromOffset(mips::kLoadWord, mips::A0, mips::A1, 0xABCDEF00);
733
734  __ LoadFromOffset(mips::kLoadDoubleword, mips::A0, mips::A0, 0);
735  __ LoadFromOffset(mips::kLoadDoubleword, mips::A0, mips::A1, 0);
736  __ LoadFromOffset(mips::kLoadDoubleword, mips::A1, mips::A0, 0);
737  __ LoadFromOffset(mips::kLoadDoubleword, mips::A0, mips::A2, 0);
738  __ LoadFromOffset(mips::kLoadDoubleword, mips::A0, mips::A2, 256);
739  __ LoadFromOffset(mips::kLoadDoubleword, mips::A0, mips::A2, 1000);
740  __ LoadFromOffset(mips::kLoadDoubleword, mips::A0, mips::A2, 0x8000);
741  __ LoadFromOffset(mips::kLoadDoubleword, mips::A0, mips::A2, 0x10000);
742  __ LoadFromOffset(mips::kLoadDoubleword, mips::A0, mips::A2, 0x12345678);
743  __ LoadFromOffset(mips::kLoadDoubleword, mips::A0, mips::A2, -256);
744  __ LoadFromOffset(mips::kLoadDoubleword, mips::A0, mips::A2, 0xFFFF8000);
745  __ LoadFromOffset(mips::kLoadDoubleword, mips::A0, mips::A2, 0xABCDEF00);
746
747  const char* expected =
748      "lb $a0, 0($a0)\n"
749      "lb $a0, 0($a1)\n"
750      "lb $a0, 256($a1)\n"
751      "lb $a0, 1000($a1)\n"
752      "ori $at, $zero, 0x8000\n"
753      "addu $at, $at, $a1\n"
754      "lb $a0, 0($at)\n"
755      "lui $at, 1\n"
756      "addu $at, $at, $a1\n"
757      "lb $a0, 0($at)\n"
758      "lui $at, 0x1234\n"
759      "ori $at, 0x5678\n"
760      "addu $at, $at, $a1\n"
761      "lb $a0, 0($at)\n"
762      "lb $a0, -256($a1)\n"
763      "lb $a0, 0xFFFF8000($a1)\n"
764      "lui $at, 0xABCD\n"
765      "ori $at, 0xEF00\n"
766      "addu $at, $at, $a1\n"
767      "lb $a0, 0($at)\n"
768
769      "lbu $a0, 0($a0)\n"
770      "lbu $a0, 0($a1)\n"
771      "lbu $a0, 256($a1)\n"
772      "lbu $a0, 1000($a1)\n"
773      "ori $at, $zero, 0x8000\n"
774      "addu $at, $at, $a1\n"
775      "lbu $a0, 0($at)\n"
776      "lui $at, 1\n"
777      "addu $at, $at, $a1\n"
778      "lbu $a0, 0($at)\n"
779      "lui $at, 0x1234\n"
780      "ori $at, 0x5678\n"
781      "addu $at, $at, $a1\n"
782      "lbu $a0, 0($at)\n"
783      "lbu $a0, -256($a1)\n"
784      "lbu $a0, 0xFFFF8000($a1)\n"
785      "lui $at, 0xABCD\n"
786      "ori $at, 0xEF00\n"
787      "addu $at, $at, $a1\n"
788      "lbu $a0, 0($at)\n"
789
790      "lh $a0, 0($a0)\n"
791      "lh $a0, 0($a1)\n"
792      "lh $a0, 256($a1)\n"
793      "lh $a0, 1000($a1)\n"
794      "ori $at, $zero, 0x8000\n"
795      "addu $at, $at, $a1\n"
796      "lh $a0, 0($at)\n"
797      "lui $at, 1\n"
798      "addu $at, $at, $a1\n"
799      "lh $a0, 0($at)\n"
800      "lui $at, 0x1234\n"
801      "ori $at, 0x5678\n"
802      "addu $at, $at, $a1\n"
803      "lh $a0, 0($at)\n"
804      "lh $a0, -256($a1)\n"
805      "lh $a0, 0xFFFF8000($a1)\n"
806      "lui $at, 0xABCD\n"
807      "ori $at, 0xEF00\n"
808      "addu $at, $at, $a1\n"
809      "lh $a0, 0($at)\n"
810
811      "lhu $a0, 0($a0)\n"
812      "lhu $a0, 0($a1)\n"
813      "lhu $a0, 256($a1)\n"
814      "lhu $a0, 1000($a1)\n"
815      "ori $at, $zero, 0x8000\n"
816      "addu $at, $at, $a1\n"
817      "lhu $a0, 0($at)\n"
818      "lui $at, 1\n"
819      "addu $at, $at, $a1\n"
820      "lhu $a0, 0($at)\n"
821      "lui $at, 0x1234\n"
822      "ori $at, 0x5678\n"
823      "addu $at, $at, $a1\n"
824      "lhu $a0, 0($at)\n"
825      "lhu $a0, -256($a1)\n"
826      "lhu $a0, 0xFFFF8000($a1)\n"
827      "lui $at, 0xABCD\n"
828      "ori $at, 0xEF00\n"
829      "addu $at, $at, $a1\n"
830      "lhu $a0, 0($at)\n"
831
832      "lw $a0, 0($a0)\n"
833      "lw $a0, 0($a1)\n"
834      "lw $a0, 256($a1)\n"
835      "lw $a0, 1000($a1)\n"
836      "ori $at, $zero, 0x8000\n"
837      "addu $at, $at, $a1\n"
838      "lw $a0, 0($at)\n"
839      "lui $at, 1\n"
840      "addu $at, $at, $a1\n"
841      "lw $a0, 0($at)\n"
842      "lui $at, 0x1234\n"
843      "ori $at, 0x5678\n"
844      "addu $at, $at, $a1\n"
845      "lw $a0, 0($at)\n"
846      "lw $a0, -256($a1)\n"
847      "lw $a0, 0xFFFF8000($a1)\n"
848      "lui $at, 0xABCD\n"
849      "ori $at, 0xEF00\n"
850      "addu $at, $at, $a1\n"
851      "lw $a0, 0($at)\n"
852
853      "lw $a1, 4($a0)\n"
854      "lw $a0, 0($a0)\n"
855      "lw $a0, 0($a1)\n"
856      "lw $a1, 4($a1)\n"
857      "lw $a1, 0($a0)\n"
858      "lw $a2, 4($a0)\n"
859      "lw $a0, 0($a2)\n"
860      "lw $a1, 4($a2)\n"
861      "lw $a0, 256($a2)\n"
862      "lw $a1, 260($a2)\n"
863      "lw $a0, 1000($a2)\n"
864      "lw $a1, 1004($a2)\n"
865      "ori $at, $zero, 0x8000\n"
866      "addu $at, $at, $a2\n"
867      "lw $a0, 0($at)\n"
868      "lw $a1, 4($at)\n"
869      "lui $at, 1\n"
870      "addu $at, $at, $a2\n"
871      "lw $a0, 0($at)\n"
872      "lw $a1, 4($at)\n"
873      "lui $at, 0x1234\n"
874      "ori $at, 0x5678\n"
875      "addu $at, $at, $a2\n"
876      "lw $a0, 0($at)\n"
877      "lw $a1, 4($at)\n"
878      "lw $a0, -256($a2)\n"
879      "lw $a1, -252($a2)\n"
880      "lw $a0, 0xFFFF8000($a2)\n"
881      "lw $a1, 0xFFFF8004($a2)\n"
882      "lui $at, 0xABCD\n"
883      "ori $at, 0xEF00\n"
884      "addu $at, $at, $a2\n"
885      "lw $a0, 0($at)\n"
886      "lw $a1, 4($at)\n";
887  DriverStr(expected, "LoadFromOffset");
888}
889
890TEST_F(AssemblerMIPSTest, LoadSFromOffset) {
891  __ LoadSFromOffset(mips::F0, mips::A0, 0);
892  __ LoadSFromOffset(mips::F0, mips::A0, 4);
893  __ LoadSFromOffset(mips::F0, mips::A0, 256);
894  __ LoadSFromOffset(mips::F0, mips::A0, 0x8000);
895  __ LoadSFromOffset(mips::F0, mips::A0, 0x10000);
896  __ LoadSFromOffset(mips::F0, mips::A0, 0x12345678);
897  __ LoadSFromOffset(mips::F0, mips::A0, -256);
898  __ LoadSFromOffset(mips::F0, mips::A0, 0xFFFF8000);
899  __ LoadSFromOffset(mips::F0, mips::A0, 0xABCDEF00);
900
901  const char* expected =
902      "lwc1 $f0, 0($a0)\n"
903      "lwc1 $f0, 4($a0)\n"
904      "lwc1 $f0, 256($a0)\n"
905      "ori $at, $zero, 0x8000\n"
906      "addu $at, $at, $a0\n"
907      "lwc1 $f0, 0($at)\n"
908      "lui $at, 1\n"
909      "addu $at, $at, $a0\n"
910      "lwc1 $f0, 0($at)\n"
911      "lui $at, 0x1234\n"
912      "ori $at, 0x5678\n"
913      "addu $at, $at, $a0\n"
914      "lwc1 $f0, 0($at)\n"
915      "lwc1 $f0, -256($a0)\n"
916      "lwc1 $f0, 0xFFFF8000($a0)\n"
917      "lui $at, 0xABCD\n"
918      "ori $at, 0xEF00\n"
919      "addu $at, $at, $a0\n"
920      "lwc1 $f0, 0($at)\n";
921  DriverStr(expected, "LoadSFromOffset");
922}
923
924
925TEST_F(AssemblerMIPSTest, LoadDFromOffset) {
926  __ LoadDFromOffset(mips::F0, mips::A0, 0);
927  __ LoadDFromOffset(mips::F0, mips::A0, 4);
928  __ LoadDFromOffset(mips::F0, mips::A0, 256);
929  __ LoadDFromOffset(mips::F0, mips::A0, 0x8000);
930  __ LoadDFromOffset(mips::F0, mips::A0, 0x10000);
931  __ LoadDFromOffset(mips::F0, mips::A0, 0x12345678);
932  __ LoadDFromOffset(mips::F0, mips::A0, -256);
933  __ LoadDFromOffset(mips::F0, mips::A0, 0xFFFF8000);
934  __ LoadDFromOffset(mips::F0, mips::A0, 0xABCDEF00);
935
936  const char* expected =
937      "ldc1 $f0, 0($a0)\n"
938      "lwc1 $f0, 4($a0)\n"
939      "lwc1 $f1, 8($a0)\n"
940      "ldc1 $f0, 256($a0)\n"
941      "ori $at, $zero, 0x8000\n"
942      "addu $at, $at, $a0\n"
943      "ldc1 $f0, 0($at)\n"
944      "lui $at, 1\n"
945      "addu $at, $at, $a0\n"
946      "ldc1 $f0, 0($at)\n"
947      "lui $at, 0x1234\n"
948      "ori $at, 0x5678\n"
949      "addu $at, $at, $a0\n"
950      "ldc1 $f0, 0($at)\n"
951      "ldc1 $f0, -256($a0)\n"
952      "ldc1 $f0, 0xFFFF8000($a0)\n"
953      "lui $at, 0xABCD\n"
954      "ori $at, 0xEF00\n"
955      "addu $at, $at, $a0\n"
956      "ldc1 $f0, 0($at)\n";
957  DriverStr(expected, "LoadDFromOffset");
958}
959
960TEST_F(AssemblerMIPSTest, StoreToOffset) {
961  __ StoreToOffset(mips::kStoreByte, mips::A0, mips::A0, 0);
962  __ StoreToOffset(mips::kStoreByte, mips::A0, mips::A1, 0);
963  __ StoreToOffset(mips::kStoreByte, mips::A0, mips::A1, 256);
964  __ StoreToOffset(mips::kStoreByte, mips::A0, mips::A1, 1000);
965  __ StoreToOffset(mips::kStoreByte, mips::A0, mips::A1, 0x8000);
966  __ StoreToOffset(mips::kStoreByte, mips::A0, mips::A1, 0x10000);
967  __ StoreToOffset(mips::kStoreByte, mips::A0, mips::A1, 0x12345678);
968  __ StoreToOffset(mips::kStoreByte, mips::A0, mips::A1, -256);
969  __ StoreToOffset(mips::kStoreByte, mips::A0, mips::A1, 0xFFFF8000);
970  __ StoreToOffset(mips::kStoreByte, mips::A0, mips::A1, 0xABCDEF00);
971
972  __ StoreToOffset(mips::kStoreHalfword, mips::A0, mips::A0, 0);
973  __ StoreToOffset(mips::kStoreHalfword, mips::A0, mips::A1, 0);
974  __ StoreToOffset(mips::kStoreHalfword, mips::A0, mips::A1, 256);
975  __ StoreToOffset(mips::kStoreHalfword, mips::A0, mips::A1, 1000);
976  __ StoreToOffset(mips::kStoreHalfword, mips::A0, mips::A1, 0x8000);
977  __ StoreToOffset(mips::kStoreHalfword, mips::A0, mips::A1, 0x10000);
978  __ StoreToOffset(mips::kStoreHalfword, mips::A0, mips::A1, 0x12345678);
979  __ StoreToOffset(mips::kStoreHalfword, mips::A0, mips::A1, -256);
980  __ StoreToOffset(mips::kStoreHalfword, mips::A0, mips::A1, 0xFFFF8000);
981  __ StoreToOffset(mips::kStoreHalfword, mips::A0, mips::A1, 0xABCDEF00);
982
983  __ StoreToOffset(mips::kStoreWord, mips::A0, mips::A0, 0);
984  __ StoreToOffset(mips::kStoreWord, mips::A0, mips::A1, 0);
985  __ StoreToOffset(mips::kStoreWord, mips::A0, mips::A1, 256);
986  __ StoreToOffset(mips::kStoreWord, mips::A0, mips::A1, 1000);
987  __ StoreToOffset(mips::kStoreWord, mips::A0, mips::A1, 0x8000);
988  __ StoreToOffset(mips::kStoreWord, mips::A0, mips::A1, 0x10000);
989  __ StoreToOffset(mips::kStoreWord, mips::A0, mips::A1, 0x12345678);
990  __ StoreToOffset(mips::kStoreWord, mips::A0, mips::A1, -256);
991  __ StoreToOffset(mips::kStoreWord, mips::A0, mips::A1, 0xFFFF8000);
992  __ StoreToOffset(mips::kStoreWord, mips::A0, mips::A1, 0xABCDEF00);
993
994  __ StoreToOffset(mips::kStoreDoubleword, mips::A0, mips::A2, 0);
995  __ StoreToOffset(mips::kStoreDoubleword, mips::A0, mips::A2, 256);
996  __ StoreToOffset(mips::kStoreDoubleword, mips::A0, mips::A2, 1000);
997  __ StoreToOffset(mips::kStoreDoubleword, mips::A0, mips::A2, 0x8000);
998  __ StoreToOffset(mips::kStoreDoubleword, mips::A0, mips::A2, 0x10000);
999  __ StoreToOffset(mips::kStoreDoubleword, mips::A0, mips::A2, 0x12345678);
1000  __ StoreToOffset(mips::kStoreDoubleword, mips::A0, mips::A2, -256);
1001  __ StoreToOffset(mips::kStoreDoubleword, mips::A0, mips::A2, 0xFFFF8000);
1002  __ StoreToOffset(mips::kStoreDoubleword, mips::A0, mips::A2, 0xABCDEF00);
1003
1004  const char* expected =
1005      "sb $a0, 0($a0)\n"
1006      "sb $a0, 0($a1)\n"
1007      "sb $a0, 256($a1)\n"
1008      "sb $a0, 1000($a1)\n"
1009      "ori $at, $zero, 0x8000\n"
1010      "addu $at, $at, $a1\n"
1011      "sb $a0, 0($at)\n"
1012      "lui $at, 1\n"
1013      "addu $at, $at, $a1\n"
1014      "sb $a0, 0($at)\n"
1015      "lui $at, 0x1234\n"
1016      "ori $at, 0x5678\n"
1017      "addu $at, $at, $a1\n"
1018      "sb $a0, 0($at)\n"
1019      "sb $a0, -256($a1)\n"
1020      "sb $a0, 0xFFFF8000($a1)\n"
1021      "lui $at, 0xABCD\n"
1022      "ori $at, 0xEF00\n"
1023      "addu $at, $at, $a1\n"
1024      "sb $a0, 0($at)\n"
1025
1026      "sh $a0, 0($a0)\n"
1027      "sh $a0, 0($a1)\n"
1028      "sh $a0, 256($a1)\n"
1029      "sh $a0, 1000($a1)\n"
1030      "ori $at, $zero, 0x8000\n"
1031      "addu $at, $at, $a1\n"
1032      "sh $a0, 0($at)\n"
1033      "lui $at, 1\n"
1034      "addu $at, $at, $a1\n"
1035      "sh $a0, 0($at)\n"
1036      "lui $at, 0x1234\n"
1037      "ori $at, 0x5678\n"
1038      "addu $at, $at, $a1\n"
1039      "sh $a0, 0($at)\n"
1040      "sh $a0, -256($a1)\n"
1041      "sh $a0, 0xFFFF8000($a1)\n"
1042      "lui $at, 0xABCD\n"
1043      "ori $at, 0xEF00\n"
1044      "addu $at, $at, $a1\n"
1045      "sh $a0, 0($at)\n"
1046
1047      "sw $a0, 0($a0)\n"
1048      "sw $a0, 0($a1)\n"
1049      "sw $a0, 256($a1)\n"
1050      "sw $a0, 1000($a1)\n"
1051      "ori $at, $zero, 0x8000\n"
1052      "addu $at, $at, $a1\n"
1053      "sw $a0, 0($at)\n"
1054      "lui $at, 1\n"
1055      "addu $at, $at, $a1\n"
1056      "sw $a0, 0($at)\n"
1057      "lui $at, 0x1234\n"
1058      "ori $at, 0x5678\n"
1059      "addu $at, $at, $a1\n"
1060      "sw $a0, 0($at)\n"
1061      "sw $a0, -256($a1)\n"
1062      "sw $a0, 0xFFFF8000($a1)\n"
1063      "lui $at, 0xABCD\n"
1064      "ori $at, 0xEF00\n"
1065      "addu $at, $at, $a1\n"
1066      "sw $a0, 0($at)\n"
1067
1068      "sw $a0, 0($a2)\n"
1069      "sw $a1, 4($a2)\n"
1070      "sw $a0, 256($a2)\n"
1071      "sw $a1, 260($a2)\n"
1072      "sw $a0, 1000($a2)\n"
1073      "sw $a1, 1004($a2)\n"
1074      "ori $at, $zero, 0x8000\n"
1075      "addu $at, $at, $a2\n"
1076      "sw $a0, 0($at)\n"
1077      "sw $a1, 4($at)\n"
1078      "lui $at, 1\n"
1079      "addu $at, $at, $a2\n"
1080      "sw $a0, 0($at)\n"
1081      "sw $a1, 4($at)\n"
1082      "lui $at, 0x1234\n"
1083      "ori $at, 0x5678\n"
1084      "addu $at, $at, $a2\n"
1085      "sw $a0, 0($at)\n"
1086      "sw $a1, 4($at)\n"
1087      "sw $a0, -256($a2)\n"
1088      "sw $a1, -252($a2)\n"
1089      "sw $a0, 0xFFFF8000($a2)\n"
1090      "sw $a1, 0xFFFF8004($a2)\n"
1091      "lui $at, 0xABCD\n"
1092      "ori $at, 0xEF00\n"
1093      "addu $at, $at, $a2\n"
1094      "sw $a0, 0($at)\n"
1095      "sw $a1, 4($at)\n";
1096  DriverStr(expected, "StoreToOffset");
1097}
1098
1099TEST_F(AssemblerMIPSTest, StoreSToOffset) {
1100  __ StoreSToOffset(mips::F0, mips::A0, 0);
1101  __ StoreSToOffset(mips::F0, mips::A0, 4);
1102  __ StoreSToOffset(mips::F0, mips::A0, 256);
1103  __ StoreSToOffset(mips::F0, mips::A0, 0x8000);
1104  __ StoreSToOffset(mips::F0, mips::A0, 0x10000);
1105  __ StoreSToOffset(mips::F0, mips::A0, 0x12345678);
1106  __ StoreSToOffset(mips::F0, mips::A0, -256);
1107  __ StoreSToOffset(mips::F0, mips::A0, 0xFFFF8000);
1108  __ StoreSToOffset(mips::F0, mips::A0, 0xABCDEF00);
1109
1110  const char* expected =
1111      "swc1 $f0, 0($a0)\n"
1112      "swc1 $f0, 4($a0)\n"
1113      "swc1 $f0, 256($a0)\n"
1114      "ori $at, $zero, 0x8000\n"
1115      "addu $at, $at, $a0\n"
1116      "swc1 $f0, 0($at)\n"
1117      "lui $at, 1\n"
1118      "addu $at, $at, $a0\n"
1119      "swc1 $f0, 0($at)\n"
1120      "lui $at, 0x1234\n"
1121      "ori $at, 0x5678\n"
1122      "addu $at, $at, $a0\n"
1123      "swc1 $f0, 0($at)\n"
1124      "swc1 $f0, -256($a0)\n"
1125      "swc1 $f0, 0xFFFF8000($a0)\n"
1126      "lui $at, 0xABCD\n"
1127      "ori $at, 0xEF00\n"
1128      "addu $at, $at, $a0\n"
1129      "swc1 $f0, 0($at)\n";
1130  DriverStr(expected, "StoreSToOffset");
1131}
1132
1133TEST_F(AssemblerMIPSTest, StoreDToOffset) {
1134  __ StoreDToOffset(mips::F0, mips::A0, 0);
1135  __ StoreDToOffset(mips::F0, mips::A0, 4);
1136  __ StoreDToOffset(mips::F0, mips::A0, 256);
1137  __ StoreDToOffset(mips::F0, mips::A0, 0x8000);
1138  __ StoreDToOffset(mips::F0, mips::A0, 0x10000);
1139  __ StoreDToOffset(mips::F0, mips::A0, 0x12345678);
1140  __ StoreDToOffset(mips::F0, mips::A0, -256);
1141  __ StoreDToOffset(mips::F0, mips::A0, 0xFFFF8000);
1142  __ StoreDToOffset(mips::F0, mips::A0, 0xABCDEF00);
1143
1144  const char* expected =
1145      "sdc1 $f0, 0($a0)\n"
1146      "swc1 $f0, 4($a0)\n"
1147      "swc1 $f1, 8($a0)\n"
1148      "sdc1 $f0, 256($a0)\n"
1149      "ori $at, $zero, 0x8000\n"
1150      "addu $at, $at, $a0\n"
1151      "sdc1 $f0, 0($at)\n"
1152      "lui $at, 1\n"
1153      "addu $at, $at, $a0\n"
1154      "sdc1 $f0, 0($at)\n"
1155      "lui $at, 0x1234\n"
1156      "ori $at, 0x5678\n"
1157      "addu $at, $at, $a0\n"
1158      "sdc1 $f0, 0($at)\n"
1159      "sdc1 $f0, -256($a0)\n"
1160      "sdc1 $f0, 0xFFFF8000($a0)\n"
1161      "lui $at, 0xABCD\n"
1162      "ori $at, 0xEF00\n"
1163      "addu $at, $at, $a0\n"
1164      "sdc1 $f0, 0($at)\n";
1165  DriverStr(expected, "StoreDToOffset");
1166}
1167
1168TEST_F(AssemblerMIPSTest, B) {
1169  mips::MipsLabel label1, label2;
1170  __ B(&label1);
1171  constexpr size_t kAdduCount1 = 63;
1172  for (size_t i = 0; i != kAdduCount1; ++i) {
1173    __ Addu(mips::ZERO, mips::ZERO, mips::ZERO);
1174  }
1175  __ Bind(&label1);
1176  __ B(&label2);
1177  constexpr size_t kAdduCount2 = 64;
1178  for (size_t i = 0; i != kAdduCount2; ++i) {
1179    __ Addu(mips::ZERO, mips::ZERO, mips::ZERO);
1180  }
1181  __ Bind(&label2);
1182  __ B(&label1);
1183
1184  std::string expected =
1185      ".set noreorder\n"
1186      "b 1f\n"
1187      "nop\n" +
1188      RepeatInsn(kAdduCount1, "addu $zero, $zero, $zero\n") +
1189      "1:\n"
1190      "b 2f\n"
1191      "nop\n" +
1192      RepeatInsn(kAdduCount2, "addu $zero, $zero, $zero\n") +
1193      "2:\n"
1194      "b 1b\n"
1195      "nop\n";
1196  DriverStr(expected, "B");
1197}
1198
1199TEST_F(AssemblerMIPSTest, Beq) {
1200  BranchCondTwoRegsHelper(&mips::MipsAssembler::Beq, "Beq");
1201}
1202
1203TEST_F(AssemblerMIPSTest, Bne) {
1204  BranchCondTwoRegsHelper(&mips::MipsAssembler::Bne, "Bne");
1205}
1206
1207TEST_F(AssemblerMIPSTest, Beqz) {
1208  mips::MipsLabel label;
1209  __ Beqz(mips::A0, &label);
1210  constexpr size_t kAdduCount1 = 63;
1211  for (size_t i = 0; i != kAdduCount1; ++i) {
1212    __ Addu(mips::ZERO, mips::ZERO, mips::ZERO);
1213  }
1214  __ Bind(&label);
1215  constexpr size_t kAdduCount2 = 64;
1216  for (size_t i = 0; i != kAdduCount2; ++i) {
1217    __ Addu(mips::ZERO, mips::ZERO, mips::ZERO);
1218  }
1219  __ Beqz(mips::A1, &label);
1220
1221  std::string expected =
1222      ".set noreorder\n"
1223      "beq $zero, $a0, 1f\n"
1224      "nop\n" +
1225      RepeatInsn(kAdduCount1, "addu $zero, $zero, $zero\n") +
1226      "1:\n" +
1227      RepeatInsn(kAdduCount2, "addu $zero, $zero, $zero\n") +
1228      "beq $zero, $a1, 1b\n"
1229      "nop\n";
1230  DriverStr(expected, "Beqz");
1231}
1232
1233TEST_F(AssemblerMIPSTest, Bnez) {
1234  mips::MipsLabel label;
1235  __ Bnez(mips::A0, &label);
1236  constexpr size_t kAdduCount1 = 63;
1237  for (size_t i = 0; i != kAdduCount1; ++i) {
1238    __ Addu(mips::ZERO, mips::ZERO, mips::ZERO);
1239  }
1240  __ Bind(&label);
1241  constexpr size_t kAdduCount2 = 64;
1242  for (size_t i = 0; i != kAdduCount2; ++i) {
1243    __ Addu(mips::ZERO, mips::ZERO, mips::ZERO);
1244  }
1245  __ Bnez(mips::A1, &label);
1246
1247  std::string expected =
1248      ".set noreorder\n"
1249      "bne $zero, $a0, 1f\n"
1250      "nop\n" +
1251      RepeatInsn(kAdduCount1, "addu $zero, $zero, $zero\n") +
1252      "1:\n" +
1253      RepeatInsn(kAdduCount2, "addu $zero, $zero, $zero\n") +
1254      "bne $zero, $a1, 1b\n"
1255      "nop\n";
1256  DriverStr(expected, "Bnez");
1257}
1258
1259TEST_F(AssemblerMIPSTest, Bltz) {
1260  BranchCondOneRegHelper(&mips::MipsAssembler::Bltz, "Bltz");
1261}
1262
1263TEST_F(AssemblerMIPSTest, Bgez) {
1264  BranchCondOneRegHelper(&mips::MipsAssembler::Bgez, "Bgez");
1265}
1266
1267TEST_F(AssemblerMIPSTest, Blez) {
1268  BranchCondOneRegHelper(&mips::MipsAssembler::Blez, "Blez");
1269}
1270
1271TEST_F(AssemblerMIPSTest, Bgtz) {
1272  BranchCondOneRegHelper(&mips::MipsAssembler::Bgtz, "Bgtz");
1273}
1274
1275TEST_F(AssemblerMIPSTest, Blt) {
1276  mips::MipsLabel label;
1277  __ Blt(mips::A0, mips::A1, &label);
1278  constexpr size_t kAdduCount1 = 63;
1279  for (size_t i = 0; i != kAdduCount1; ++i) {
1280    __ Addu(mips::ZERO, mips::ZERO, mips::ZERO);
1281  }
1282  __ Bind(&label);
1283  constexpr size_t kAdduCount2 = 64;
1284  for (size_t i = 0; i != kAdduCount2; ++i) {
1285    __ Addu(mips::ZERO, mips::ZERO, mips::ZERO);
1286  }
1287  __ Blt(mips::A2, mips::A3, &label);
1288
1289  std::string expected =
1290      ".set noreorder\n"
1291      "slt $at, $a0, $a1\n"
1292      "bne $zero, $at, 1f\n"
1293      "nop\n" +
1294      RepeatInsn(kAdduCount1, "addu $zero, $zero, $zero\n") +
1295      "1:\n" +
1296      RepeatInsn(kAdduCount2, "addu $zero, $zero, $zero\n") +
1297      "slt $at, $a2, $a3\n"
1298      "bne $zero, $at, 1b\n"
1299      "nop\n";
1300  DriverStr(expected, "Blt");
1301}
1302
1303TEST_F(AssemblerMIPSTest, Bge) {
1304  mips::MipsLabel label;
1305  __ Bge(mips::A0, mips::A1, &label);
1306  constexpr size_t kAdduCount1 = 63;
1307  for (size_t i = 0; i != kAdduCount1; ++i) {
1308    __ Addu(mips::ZERO, mips::ZERO, mips::ZERO);
1309  }
1310  __ Bind(&label);
1311  constexpr size_t kAdduCount2 = 64;
1312  for (size_t i = 0; i != kAdduCount2; ++i) {
1313    __ Addu(mips::ZERO, mips::ZERO, mips::ZERO);
1314  }
1315  __ Bge(mips::A2, mips::A3, &label);
1316
1317  std::string expected =
1318      ".set noreorder\n"
1319      "slt $at, $a0, $a1\n"
1320      "beq $zero, $at, 1f\n"
1321      "nop\n" +
1322      RepeatInsn(kAdduCount1, "addu $zero, $zero, $zero\n") +
1323      "1:\n" +
1324      RepeatInsn(kAdduCount2, "addu $zero, $zero, $zero\n") +
1325      "slt $at, $a2, $a3\n"
1326      "beq $zero, $at, 1b\n"
1327      "nop\n";
1328  DriverStr(expected, "Bge");
1329}
1330
1331TEST_F(AssemblerMIPSTest, Bltu) {
1332  mips::MipsLabel label;
1333  __ Bltu(mips::A0, mips::A1, &label);
1334  constexpr size_t kAdduCount1 = 63;
1335  for (size_t i = 0; i != kAdduCount1; ++i) {
1336    __ Addu(mips::ZERO, mips::ZERO, mips::ZERO);
1337  }
1338  __ Bind(&label);
1339  constexpr size_t kAdduCount2 = 64;
1340  for (size_t i = 0; i != kAdduCount2; ++i) {
1341    __ Addu(mips::ZERO, mips::ZERO, mips::ZERO);
1342  }
1343  __ Bltu(mips::A2, mips::A3, &label);
1344
1345  std::string expected =
1346      ".set noreorder\n"
1347      "sltu $at, $a0, $a1\n"
1348      "bne $zero, $at, 1f\n"
1349      "nop\n" +
1350      RepeatInsn(kAdduCount1, "addu $zero, $zero, $zero\n") +
1351      "1:\n" +
1352      RepeatInsn(kAdduCount2, "addu $zero, $zero, $zero\n") +
1353      "sltu $at, $a2, $a3\n"
1354      "bne $zero, $at, 1b\n"
1355      "nop\n";
1356  DriverStr(expected, "Bltu");
1357}
1358
1359TEST_F(AssemblerMIPSTest, Bgeu) {
1360  mips::MipsLabel label;
1361  __ Bgeu(mips::A0, mips::A1, &label);
1362  constexpr size_t kAdduCount1 = 63;
1363  for (size_t i = 0; i != kAdduCount1; ++i) {
1364    __ Addu(mips::ZERO, mips::ZERO, mips::ZERO);
1365  }
1366  __ Bind(&label);
1367  constexpr size_t kAdduCount2 = 64;
1368  for (size_t i = 0; i != kAdduCount2; ++i) {
1369    __ Addu(mips::ZERO, mips::ZERO, mips::ZERO);
1370  }
1371  __ Bgeu(mips::A2, mips::A3, &label);
1372
1373  std::string expected =
1374      ".set noreorder\n"
1375      "sltu $at, $a0, $a1\n"
1376      "beq $zero, $at, 1f\n"
1377      "nop\n" +
1378      RepeatInsn(kAdduCount1, "addu $zero, $zero, $zero\n") +
1379      "1:\n" +
1380      RepeatInsn(kAdduCount2, "addu $zero, $zero, $zero\n") +
1381      "sltu $at, $a2, $a3\n"
1382      "beq $zero, $at, 1b\n"
1383      "nop\n";
1384  DriverStr(expected, "Bgeu");
1385}
1386
1387TEST_F(AssemblerMIPSTest, Bc1f) {
1388  mips::MipsLabel label;
1389  __ Bc1f(0, &label);
1390  constexpr size_t kAdduCount1 = 63;
1391  for (size_t i = 0; i != kAdduCount1; ++i) {
1392    __ Addu(mips::ZERO, mips::ZERO, mips::ZERO);
1393  }
1394  __ Bind(&label);
1395  constexpr size_t kAdduCount2 = 64;
1396  for (size_t i = 0; i != kAdduCount2; ++i) {
1397    __ Addu(mips::ZERO, mips::ZERO, mips::ZERO);
1398  }
1399  __ Bc1f(7, &label);
1400
1401  std::string expected =
1402      ".set noreorder\n"
1403      "bc1f $fcc0, 1f\n"
1404      "nop\n" +
1405      RepeatInsn(kAdduCount1, "addu $zero, $zero, $zero\n") +
1406      "1:\n" +
1407      RepeatInsn(kAdduCount2, "addu $zero, $zero, $zero\n") +
1408      "bc1f $fcc7, 1b\n"
1409      "nop\n";
1410  DriverStr(expected, "Bc1f");
1411}
1412
1413TEST_F(AssemblerMIPSTest, Bc1t) {
1414  mips::MipsLabel label;
1415  __ Bc1t(0, &label);
1416  constexpr size_t kAdduCount1 = 63;
1417  for (size_t i = 0; i != kAdduCount1; ++i) {
1418    __ Addu(mips::ZERO, mips::ZERO, mips::ZERO);
1419  }
1420  __ Bind(&label);
1421  constexpr size_t kAdduCount2 = 64;
1422  for (size_t i = 0; i != kAdduCount2; ++i) {
1423    __ Addu(mips::ZERO, mips::ZERO, mips::ZERO);
1424  }
1425  __ Bc1t(7, &label);
1426
1427  std::string expected =
1428      ".set noreorder\n"
1429      "bc1t $fcc0, 1f\n"
1430      "nop\n" +
1431      RepeatInsn(kAdduCount1, "addu $zero, $zero, $zero\n") +
1432      "1:\n" +
1433      RepeatInsn(kAdduCount2, "addu $zero, $zero, $zero\n") +
1434      "bc1t $fcc7, 1b\n"
1435      "nop\n";
1436  DriverStr(expected, "Bc1t");
1437}
1438
1439#undef __
1440
1441}  // namespace art
1442