assembler_x86.h revision 91debbc3da3e3376416e4394155d9f9e355255cb 
1/*
2 * Copyright (C) 2011 The Android Open Source Project
3 *
4 * Licensed under the Apache License, Version 2.0 (the "License");
5 * you may not use this file except in compliance with the License.
6 * You may obtain a copy of the License at
7 *
8 *      http://www.apache.org/licenses/LICENSE-2.0
9 *
10 * Unless required by applicable law or agreed to in writing, software
11 * distributed under the License is distributed on an "AS IS" BASIS,
12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 * See the License for the specific language governing permissions and
14 * limitations under the License.
15 */
16
17#ifndef ART_COMPILER_UTILS_X86_ASSEMBLER_X86_H_
18#define ART_COMPILER_UTILS_X86_ASSEMBLER_X86_H_
19
20#include <vector>
21#include "base/macros.h"
22#include "constants_x86.h"
23#include "globals.h"
24#include "managed_register_x86.h"
25#include "offsets.h"
26#include "utils/assembler.h"
27#include "utils.h"
28
29namespace art {
30namespace x86 {
31
32class Immediate : public ValueObject {
33 public:
34  explicit Immediate(int32_t value_in) : value_(value_in) {}
35
36  int32_t value() const { return value_; }
37
38  bool is_int8() const { return IsInt(8, value_); }
39  bool is_uint8() const { return IsUint(8, value_); }
40  bool is_int16() const { return IsInt(16, value_); }
41  bool is_uint16() const { return IsUint(16, value_); }
42
43 private:
44  const int32_t value_;
45
46  DISALLOW_COPY_AND_ASSIGN(Immediate);
47};
48
49
50class Operand : public ValueObject {
51 public:
52  uint8_t mod() const {
53    return (encoding_at(0) >> 6) & 3;
54  }
55
56  Register rm() const {
57    return static_cast<Register>(encoding_at(0) & 7);
58  }
59
60  ScaleFactor scale() const {
61    return static_cast<ScaleFactor>((encoding_at(1) >> 6) & 3);
62  }
63
64  Register index() const {
65    return static_cast<Register>((encoding_at(1) >> 3) & 7);
66  }
67
68  Register base() const {
69    return static_cast<Register>(encoding_at(1) & 7);
70  }
71
72  int8_t disp8() const {
73    CHECK_GE(length_, 2);
74    return static_cast<int8_t>(encoding_[length_ - 1]);
75  }
76
77  int32_t disp32() const {
78    CHECK_GE(length_, 5);
79    int32_t value;
80    memcpy(&value, &encoding_[length_ - 4], sizeof(value));
81    return value;
82  }
83
84  bool IsRegister(Register reg) const {
85    return ((encoding_[0] & 0xF8) == 0xC0)  // Addressing mode is register only.
86        && ((encoding_[0] & 0x07) == reg);  // Register codes match.
87  }
88
89 protected:
90  // Operand can be sub classed (e.g: Address).
91  Operand() : length_(0) { }
92
93  void SetModRM(int mod_in, Register rm_in) {
94    CHECK_EQ(mod_in & ~3, 0);
95    encoding_[0] = (mod_in << 6) | rm_in;
96    length_ = 1;
97  }
98
99  void SetSIB(ScaleFactor scale_in, Register index_in, Register base_in) {
100    CHECK_EQ(length_, 1);
101    CHECK_EQ(scale_in & ~3, 0);
102    encoding_[1] = (scale_in << 6) | (index_in << 3) | base_in;
103    length_ = 2;
104  }
105
106  void SetDisp8(int8_t disp) {
107    CHECK(length_ == 1 || length_ == 2);
108    encoding_[length_++] = static_cast<uint8_t>(disp);
109  }
110
111  void SetDisp32(int32_t disp) {
112    CHECK(length_ == 1 || length_ == 2);
113    int disp_size = sizeof(disp);
114    memmove(&encoding_[length_], &disp, disp_size);
115    length_ += disp_size;
116  }
117
118 private:
119  uint8_t length_;
120  uint8_t encoding_[6];
121
122  explicit Operand(Register reg) { SetModRM(3, reg); }
123
124  // Get the operand encoding byte at the given index.
125  uint8_t encoding_at(int index_in) const {
126    CHECK_GE(index_in, 0);
127    CHECK_LT(index_in, length_);
128    return encoding_[index_in];
129  }
130
131  friend class X86Assembler;
132};
133
134
135class Address : public Operand {
136 public:
137  Address(Register base_in, int32_t disp) {
138    Init(base_in, disp);
139  }
140
141  Address(Register base_in, Offset disp) {
142    Init(base_in, disp.Int32Value());
143  }
144
145  Address(Register base_in, FrameOffset disp) {
146    CHECK_EQ(base_in, ESP);
147    Init(ESP, disp.Int32Value());
148  }
149
150  Address(Register base_in, MemberOffset disp) {
151    Init(base_in, disp.Int32Value());
152  }
153
154  void Init(Register base_in, int32_t disp) {
155    if (disp == 0 && base_in != EBP) {
156      SetModRM(0, base_in);
157      if (base_in == ESP) SetSIB(TIMES_1, ESP, base_in);
158    } else if (disp >= -128 && disp <= 127) {
159      SetModRM(1, base_in);
160      if (base_in == ESP) SetSIB(TIMES_1, ESP, base_in);
161      SetDisp8(disp);
162    } else {
163      SetModRM(2, base_in);
164      if (base_in == ESP) SetSIB(TIMES_1, ESP, base_in);
165      SetDisp32(disp);
166    }
167  }
168
169  Address(Register index_in, ScaleFactor scale_in, int32_t disp) {
170    CHECK_NE(index_in, ESP);  // Illegal addressing mode.
171    SetModRM(0, ESP);
172    SetSIB(scale_in, index_in, EBP);
173    SetDisp32(disp);
174  }
175
176  Address(Register base_in, Register index_in, ScaleFactor scale_in, int32_t disp) {
177    CHECK_NE(index_in, ESP);  // Illegal addressing mode.
178    if (disp == 0 && base_in != EBP) {
179      SetModRM(0, ESP);
180      SetSIB(scale_in, index_in, base_in);
181    } else if (disp >= -128 && disp <= 127) {
182      SetModRM(1, ESP);
183      SetSIB(scale_in, index_in, base_in);
184      SetDisp8(disp);
185    } else {
186      SetModRM(2, ESP);
187      SetSIB(scale_in, index_in, base_in);
188      SetDisp32(disp);
189    }
190  }
191
192  static Address Absolute(uintptr_t addr) {
193    Address result;
194    result.SetModRM(0, EBP);
195    result.SetDisp32(addr);
196    return result;
197  }
198
199  static Address Absolute(ThreadOffset<4> addr) {
200    return Absolute(addr.Int32Value());
201  }
202
203 private:
204  Address() {}
205};
206
207
208class X86Assembler FINAL : public Assembler {
209 public:
210  explicit X86Assembler() : cfi_cfa_offset_(0), cfi_pc_(0) {}
211  virtual ~X86Assembler() {}
212
213  /*
214   * Emit Machine Instructions.
215   */
216  void call(Register reg);
217  void call(const Address& address);
218  void call(Label* label);
219  void call(const ExternalLabel& label);
220
221  void pushl(Register reg);
222  void pushl(const Address& address);
223  void pushl(const Immediate& imm);
224
225  void popl(Register reg);
226  void popl(const Address& address);
227
228  void movl(Register dst, const Immediate& src);
229  void movl(Register dst, Register src);
230
231  void movl(Register dst, const Address& src);
232  void movl(const Address& dst, Register src);
233  void movl(const Address& dst, const Immediate& imm);
234  void movl(const Address& dst, Label* lbl);
235
236  void movzxb(Register dst, ByteRegister src);
237  void movzxb(Register dst, const Address& src);
238  void movsxb(Register dst, ByteRegister src);
239  void movsxb(Register dst, const Address& src);
240  void movb(Register dst, const Address& src);
241  void movb(const Address& dst, ByteRegister src);
242  void movb(const Address& dst, const Immediate& imm);
243
244  void movzxw(Register dst, Register src);
245  void movzxw(Register dst, const Address& src);
246  void movsxw(Register dst, Register src);
247  void movsxw(Register dst, const Address& src);
248  void movw(Register dst, const Address& src);
249  void movw(const Address& dst, Register src);
250  void movw(const Address& dst, const Immediate& imm);
251
252  void leal(Register dst, const Address& src);
253
254  void cmovl(Condition condition, Register dst, Register src);
255
256  void setb(Condition condition, Register dst);
257
258  void movaps(XmmRegister dst, XmmRegister src);
259  void movss(XmmRegister dst, const Address& src);
260  void movss(const Address& dst, XmmRegister src);
261  void movss(XmmRegister dst, XmmRegister src);
262
263  void movd(XmmRegister dst, Register src);
264  void movd(Register dst, XmmRegister src);
265
266  void addss(XmmRegister dst, XmmRegister src);
267  void addss(XmmRegister dst, const Address& src);
268  void subss(XmmRegister dst, XmmRegister src);
269  void subss(XmmRegister dst, const Address& src);
270  void mulss(XmmRegister dst, XmmRegister src);
271  void mulss(XmmRegister dst, const Address& src);
272  void divss(XmmRegister dst, XmmRegister src);
273  void divss(XmmRegister dst, const Address& src);
274
275  void movsd(XmmRegister dst, const Address& src);
276  void movsd(const Address& dst, XmmRegister src);
277  void movsd(XmmRegister dst, XmmRegister src);
278
279  void addsd(XmmRegister dst, XmmRegister src);
280  void addsd(XmmRegister dst, const Address& src);
281  void subsd(XmmRegister dst, XmmRegister src);
282  void subsd(XmmRegister dst, const Address& src);
283  void mulsd(XmmRegister dst, XmmRegister src);
284  void mulsd(XmmRegister dst, const Address& src);
285  void divsd(XmmRegister dst, XmmRegister src);
286  void divsd(XmmRegister dst, const Address& src);
287
288  void cvtsi2ss(XmmRegister dst, Register src);
289  void cvtsi2sd(XmmRegister dst, Register src);
290
291  void cvtss2si(Register dst, XmmRegister src);
292  void cvtss2sd(XmmRegister dst, XmmRegister src);
293
294  void cvtsd2si(Register dst, XmmRegister src);
295  void cvtsd2ss(XmmRegister dst, XmmRegister src);
296
297  void cvttss2si(Register dst, XmmRegister src);
298  void cvttsd2si(Register dst, XmmRegister src);
299
300  void cvtdq2pd(XmmRegister dst, XmmRegister src);
301
302  void comiss(XmmRegister a, XmmRegister b);
303  void comisd(XmmRegister a, XmmRegister b);
304
305  void sqrtsd(XmmRegister dst, XmmRegister src);
306  void sqrtss(XmmRegister dst, XmmRegister src);
307
308  void xorpd(XmmRegister dst, const Address& src);
309  void xorpd(XmmRegister dst, XmmRegister src);
310  void xorps(XmmRegister dst, const Address& src);
311  void xorps(XmmRegister dst, XmmRegister src);
312
313  void andpd(XmmRegister dst, const Address& src);
314
315  void flds(const Address& src);
316  void fstps(const Address& dst);
317
318  void fldl(const Address& src);
319  void fstpl(const Address& dst);
320
321  void fnstcw(const Address& dst);
322  void fldcw(const Address& src);
323
324  void fistpl(const Address& dst);
325  void fistps(const Address& dst);
326  void fildl(const Address& src);
327
328  void fincstp();
329  void ffree(const Immediate& index);
330
331  void fsin();
332  void fcos();
333  void fptan();
334
335  void xchgl(Register dst, Register src);
336  void xchgl(Register reg, const Address& address);
337
338  void cmpw(const Address& address, const Immediate& imm);
339
340  void cmpl(Register reg, const Immediate& imm);
341  void cmpl(Register reg0, Register reg1);
342  void cmpl(Register reg, const Address& address);
343
344  void cmpl(const Address& address, Register reg);
345  void cmpl(const Address& address, const Immediate& imm);
346
347  void testl(Register reg1, Register reg2);
348  void testl(Register reg, const Immediate& imm);
349  void testl(Register reg1, const Address& address);
350
351  void andl(Register dst, const Immediate& imm);
352  void andl(Register dst, Register src);
353  void andl(Register dst, const Address& address);
354
355  void orl(Register dst, const Immediate& imm);
356  void orl(Register dst, Register src);
357  void orl(Register dst, const Address& address);
358
359  void xorl(Register dst, Register src);
360  void xorl(Register dst, const Immediate& imm);
361  void xorl(Register dst, const Address& address);
362
363  void addl(Register dst, Register src);
364  void addl(Register reg, const Immediate& imm);
365  void addl(Register reg, const Address& address);
366
367  void addl(const Address& address, Register reg);
368  void addl(const Address& address, const Immediate& imm);
369
370  void adcl(Register dst, Register src);
371  void adcl(Register reg, const Immediate& imm);
372  void adcl(Register dst, const Address& address);
373
374  void subl(Register dst, Register src);
375  void subl(Register reg, const Immediate& imm);
376  void subl(Register reg, const Address& address);
377
378  void cdq();
379
380  void idivl(Register reg);
381
382  void imull(Register dst, Register src);
383  void imull(Register reg, const Immediate& imm);
384  void imull(Register reg, const Address& address);
385
386  void imull(Register reg);
387  void imull(const Address& address);
388
389  void mull(Register reg);
390  void mull(const Address& address);
391
392  void sbbl(Register dst, Register src);
393  void sbbl(Register reg, const Immediate& imm);
394  void sbbl(Register reg, const Address& address);
395
396  void incl(Register reg);
397  void incl(const Address& address);
398
399  void decl(Register reg);
400  void decl(const Address& address);
401
402  void shll(Register reg, const Immediate& imm);
403  void shll(Register operand, Register shifter);
404  void shrl(Register reg, const Immediate& imm);
405  void shrl(Register operand, Register shifter);
406  void sarl(Register reg, const Immediate& imm);
407  void sarl(Register operand, Register shifter);
408  void shld(Register dst, Register src, Register shifter);
409  void shrd(Register dst, Register src, Register shifter);
410
411  void negl(Register reg);
412  void notl(Register reg);
413
414  void enter(const Immediate& imm);
415  void leave();
416
417  void ret();
418  void ret(const Immediate& imm);
419
420  void nop();
421  void int3();
422  void hlt();
423
424  void j(Condition condition, Label* label);
425
426  void jmp(Register reg);
427  void jmp(const Address& address);
428  void jmp(Label* label);
429
430  X86Assembler* lock();
431  void cmpxchgl(const Address& address, Register reg);
432
433  void mfence();
434
435  X86Assembler* fs();
436  X86Assembler* gs();
437
438  //
439  // Macros for High-level operations.
440  //
441
442  void AddImmediate(Register reg, const Immediate& imm);
443
444  void LoadDoubleConstant(XmmRegister dst, double value);
445
446  void DoubleNegate(XmmRegister d);
447  void FloatNegate(XmmRegister f);
448
449  void DoubleAbs(XmmRegister reg);
450
451  void LockCmpxchgl(const Address& address, Register reg) {
452    lock()->cmpxchgl(address, reg);
453  }
454
455  //
456  // Misc. functionality
457  //
458  int PreferredLoopAlignment() { return 16; }
459  void Align(int alignment, int offset);
460  void Bind(Label* label);
461
462  //
463  // Overridden common assembler high-level functionality
464  //
465
466  // Emit code that will create an activation on the stack
467  void BuildFrame(size_t frame_size, ManagedRegister method_reg,
468                  const std::vector<ManagedRegister>& callee_save_regs,
469                  const ManagedRegisterEntrySpills& entry_spills) OVERRIDE;
470
471  // Emit code that will remove an activation from the stack
472  void RemoveFrame(size_t frame_size, const std::vector<ManagedRegister>& callee_save_regs)
473      OVERRIDE;
474
475  void IncreaseFrameSize(size_t adjust) OVERRIDE;
476  void DecreaseFrameSize(size_t adjust) OVERRIDE;
477
478  // Store routines
479  void Store(FrameOffset offs, ManagedRegister src, size_t size) OVERRIDE;
480  void StoreRef(FrameOffset dest, ManagedRegister src) OVERRIDE;
481  void StoreRawPtr(FrameOffset dest, ManagedRegister src) OVERRIDE;
482
483  void StoreImmediateToFrame(FrameOffset dest, uint32_t imm, ManagedRegister scratch) OVERRIDE;
484
485  void StoreImmediateToThread32(ThreadOffset<4> dest, uint32_t imm, ManagedRegister scratch)
486      OVERRIDE;
487
488  void StoreStackOffsetToThread32(ThreadOffset<4> thr_offs, FrameOffset fr_offs,
489                                  ManagedRegister scratch) OVERRIDE;
490
491  void StoreStackPointerToThread32(ThreadOffset<4> thr_offs) OVERRIDE;
492
493  void StoreSpanning(FrameOffset dest, ManagedRegister src, FrameOffset in_off,
494                     ManagedRegister scratch) OVERRIDE;
495
496  // Load routines
497  void Load(ManagedRegister dest, FrameOffset src, size_t size) OVERRIDE;
498
499  void LoadFromThread32(ManagedRegister dest, ThreadOffset<4> src, size_t size) OVERRIDE;
500
501  void LoadRef(ManagedRegister dest, FrameOffset  src) OVERRIDE;
502
503  void LoadRef(ManagedRegister dest, ManagedRegister base, MemberOffset offs) OVERRIDE;
504
505  void LoadRawPtr(ManagedRegister dest, ManagedRegister base, Offset offs) OVERRIDE;
506
507  void LoadRawPtrFromThread32(ManagedRegister dest, ThreadOffset<4> offs) OVERRIDE;
508
509  // Copying routines
510  void Move(ManagedRegister dest, ManagedRegister src, size_t size) OVERRIDE;
511
512  void CopyRawPtrFromThread32(FrameOffset fr_offs, ThreadOffset<4> thr_offs,
513                              ManagedRegister scratch) OVERRIDE;
514
515  void CopyRawPtrToThread32(ThreadOffset<4> thr_offs, FrameOffset fr_offs, ManagedRegister scratch)
516      OVERRIDE;
517
518  void CopyRef(FrameOffset dest, FrameOffset src, ManagedRegister scratch) OVERRIDE;
519
520  void Copy(FrameOffset dest, FrameOffset src, ManagedRegister scratch, size_t size) OVERRIDE;
521
522  void Copy(FrameOffset dest, ManagedRegister src_base, Offset src_offset, ManagedRegister scratch,
523            size_t size) OVERRIDE;
524
525  void Copy(ManagedRegister dest_base, Offset dest_offset, FrameOffset src, ManagedRegister scratch,
526            size_t size) OVERRIDE;
527
528  void Copy(FrameOffset dest, FrameOffset src_base, Offset src_offset, ManagedRegister scratch,
529            size_t size) OVERRIDE;
530
531  void Copy(ManagedRegister dest, Offset dest_offset, ManagedRegister src, Offset src_offset,
532            ManagedRegister scratch, size_t size) OVERRIDE;
533
534  void Copy(FrameOffset dest, Offset dest_offset, FrameOffset src, Offset src_offset,
535            ManagedRegister scratch, size_t size) OVERRIDE;
536
537  void MemoryBarrier(ManagedRegister) OVERRIDE;
538
539  // Sign extension
540  void SignExtend(ManagedRegister mreg, size_t size) OVERRIDE;
541
542  // Zero extension
543  void ZeroExtend(ManagedRegister mreg, size_t size) OVERRIDE;
544
545  // Exploit fast access in managed code to Thread::Current()
546  void GetCurrentThread(ManagedRegister tr) OVERRIDE;
547  void GetCurrentThread(FrameOffset dest_offset, ManagedRegister scratch) OVERRIDE;
548
549  // Set up out_reg to hold a Object** into the handle scope, or to be NULL if the
550  // value is null and null_allowed. in_reg holds a possibly stale reference
551  // that can be used to avoid loading the handle scope entry to see if the value is
552  // NULL.
553  void CreateHandleScopeEntry(ManagedRegister out_reg, FrameOffset handlescope_offset, ManagedRegister in_reg,
554                       bool null_allowed) OVERRIDE;
555
556  // Set up out_off to hold a Object** into the handle scope, or to be NULL if the
557  // value is null and null_allowed.
558  void CreateHandleScopeEntry(FrameOffset out_off, FrameOffset handlescope_offset, ManagedRegister scratch,
559                       bool null_allowed) OVERRIDE;
560
561  // src holds a handle scope entry (Object**) load this into dst
562  void LoadReferenceFromHandleScope(ManagedRegister dst, ManagedRegister src) OVERRIDE;
563
564  // Heap::VerifyObject on src. In some cases (such as a reference to this) we
565  // know that src may not be null.
566  void VerifyObject(ManagedRegister src, bool could_be_null) OVERRIDE;
567  void VerifyObject(FrameOffset src, bool could_be_null) OVERRIDE;
568
569  // Call to address held at [base+offset]
570  void Call(ManagedRegister base, Offset offset, ManagedRegister scratch) OVERRIDE;
571  void Call(FrameOffset base, Offset offset, ManagedRegister scratch) OVERRIDE;
572  void CallFromThread32(ThreadOffset<4> offset, ManagedRegister scratch) OVERRIDE;
573
574  // Generate code to check if Thread::Current()->exception_ is non-null
575  // and branch to a ExceptionSlowPath if it is.
576  void ExceptionPoll(ManagedRegister scratch, size_t stack_adjust) OVERRIDE;
577
578  void InitializeFrameDescriptionEntry() OVERRIDE;
579  void FinalizeFrameDescriptionEntry() OVERRIDE;
580  std::vector<uint8_t>* GetFrameDescriptionEntry() OVERRIDE {
581    return &cfi_info_;
582  }
583
584 private:
585  inline void EmitUint8(uint8_t value);
586  inline void EmitInt32(int32_t value);
587  inline void EmitRegisterOperand(int rm, int reg);
588  inline void EmitXmmRegisterOperand(int rm, XmmRegister reg);
589  inline void EmitFixup(AssemblerFixup* fixup);
590  inline void EmitOperandSizeOverride();
591
592  void EmitOperand(int rm, const Operand& operand);
593  void EmitImmediate(const Immediate& imm);
594  void EmitComplex(int rm, const Operand& operand, const Immediate& immediate);
595  void EmitLabel(Label* label, int instruction_size);
596  void EmitLabelLink(Label* label);
597  void EmitNearLabelLink(Label* label);
598
599  void EmitGenericShift(int rm, Register reg, const Immediate& imm);
600  void EmitGenericShift(int rm, Register operand, Register shifter);
601
602  std::vector<uint8_t> cfi_info_;
603  uint32_t cfi_cfa_offset_, cfi_pc_;
604
605  DISALLOW_COPY_AND_ASSIGN(X86Assembler);
606};
607
608inline void X86Assembler::EmitUint8(uint8_t value) {
609  buffer_.Emit<uint8_t>(value);
610}
611
612inline void X86Assembler::EmitInt32(int32_t value) {
613  buffer_.Emit<int32_t>(value);
614}
615
616inline void X86Assembler::EmitRegisterOperand(int rm, int reg) {
617  CHECK_GE(rm, 0);
618  CHECK_LT(rm, 8);
619  buffer_.Emit<uint8_t>(0xC0 + (rm << 3) + reg);
620}
621
622inline void X86Assembler::EmitXmmRegisterOperand(int rm, XmmRegister reg) {
623  EmitRegisterOperand(rm, static_cast<Register>(reg));
624}
625
626inline void X86Assembler::EmitFixup(AssemblerFixup* fixup) {
627  buffer_.EmitFixup(fixup);
628}
629
630inline void X86Assembler::EmitOperandSizeOverride() {
631  EmitUint8(0x66);
632}
633
634// Slowpath entered when Thread::Current()->_exception is non-null
635class X86ExceptionSlowPath FINAL : public SlowPath {
636 public:
637  explicit X86ExceptionSlowPath(size_t stack_adjust) : stack_adjust_(stack_adjust) {}
638  virtual void Emit(Assembler *sp_asm) OVERRIDE;
639 private:
640  const size_t stack_adjust_;
641};
642
643}  // namespace x86
644}  // namespace art
645
646#endif  // ART_COMPILER_UTILS_X86_ASSEMBLER_X86_H_
647