fbinop2addr.S revision 00b53b7f3f9ce5996b767b52c28dd846f47a723c
100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze%default {} 200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /*: 300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Generic 32-bit "/2addr" floating-point operation. 400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * For: add-float/2addr, sub-float/2addr, mul-float/2addr, div-float/2addr. 600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * form: <op> f0, f0, f1 700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* binop/2addr vA, vB */ 900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ext a2, rINST, 8, 4 # a2 <- A 1000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ext a3, rINST, 12, 4 # a3 <- B 1100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG_FLOAT f0, a2 # f0 <- vA 1200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG_FLOAT f1, a3 # f1 <- vB 1300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze $instr # f0 <- f0 op f1 1400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze FETCH_ADVANCE_INST 1 # advance rPC, load rINST 1500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_INST_OPCODE v0 # extract opcode from rINST 1600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze SET_VREG_FLOAT f0, a2 # vA <- f0 1700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GOTO_OPCODE v0 # jump to next instruction 18