100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * This file was generated automatically by gen-mterp.py for 'mips64'. 300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * --> DO NOT EDIT <-- 500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/header.S */ 800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Copyright (C) 2016 The Android Open Source Project 1000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 1100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Licensed under the Apache License, Version 2.0 (the "License"); 1200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * you may not use this file except in compliance with the License. 1300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * You may obtain a copy of the License at 1400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 1500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * http://www.apache.org/licenses/LICENSE-2.0 1600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 1700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Unless required by applicable law or agreed to in writing, software 1800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * distributed under the License is distributed on an "AS IS" BASIS, 1900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 2000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * See the License for the specific language governing permissions and 2100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * limitations under the License. 2200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 2300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 2400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze#include <machine/regdef.h> 2500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 2600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* TODO: add the missing file and use its FP register definitions. */ 2700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* #include <machine/fpregdef.h> */ 2800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* FP register definitions */ 2900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze#define f0 $f0 3000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze#define f1 $f1 3100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze#define f2 $f2 3200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze#define f3 $f3 3300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze#define f12 $f12 3400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze#define f13 $f13 3500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 3600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 3700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * It looks like the GNU assembler currently does not support the blec and bgtc 3800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * idioms, which should translate into bgec and bltc respectively with swapped 3900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * left and right register operands. 4000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * TODO: remove these macros when the assembler is fixed. 4100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 4200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.macro blec lreg, rreg, target 4300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze bgec \rreg, \lreg, \target 4400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.endm 4500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.macro bgtc lreg, rreg, target 4600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze bltc \rreg, \lreg, \target 4700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.endm 4800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 4900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 5000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey FrunzeMterp and MIPS64 notes: 5100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 5200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey FrunzeThe following registers have fixed assignments: 5300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 5400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze reg nick purpose 5500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze s0 rPC interpreted program counter, used for fetching instructions 5600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze s1 rFP interpreted frame pointer, used for accessing locals and args 5700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze s2 rSELF self (Thread) pointer 5800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze s3 rINST first 16-bit code unit of current instruction 5900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze s4 rIBASE interpreted instruction base pointer, used for computed goto 6000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze s5 rREFS base of object references in shadow frame (ideally, we'll get rid of this later). 6100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze*/ 6200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 6300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* During bringup, we'll use the shadow frame model instead of rFP */ 6400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* single-purpose registers, given names for clarity */ 6500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze#define rPC s0 6600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze#define rFP s1 6700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze#define rSELF s2 6800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze#define rINST s3 6900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze#define rIBASE s4 7000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze#define rREFS s5 7100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 7200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 7300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * This is a #include, not a %include, because we want the C pre-processor 7400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * to expand the macros into assembler assignment statements. 7500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 7600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze#include "asm_support.h" 7700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 7800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 7900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Instead of holding a pointer to the shadow frame, we keep rFP at the base of the vregs. So, 8000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * to access other shadow frame fields, we need to use a backwards offset. Define those here. 8100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 8200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze#define OFF_FP(a) (a - SHADOWFRAME_VREGS_OFFSET) 8300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze#define OFF_FP_NUMBER_OF_VREGS OFF_FP(SHADOWFRAME_NUMBER_OF_VREGS_OFFSET) 8400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze#define OFF_FP_DEX_PC OFF_FP(SHADOWFRAME_DEX_PC_OFFSET) 8500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze#define OFF_FP_LINK OFF_FP(SHADOWFRAME_LINK_OFFSET) 8600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze#define OFF_FP_METHOD OFF_FP(SHADOWFRAME_METHOD_OFFSET) 8700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze#define OFF_FP_RESULT_REGISTER OFF_FP(SHADOWFRAME_RESULT_REGISTER_OFFSET) 8800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze#define OFF_FP_DEX_PC_PTR OFF_FP(SHADOWFRAME_DEX_PC_PTR_OFFSET) 8900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze#define OFF_FP_CODE_ITEM OFF_FP(SHADOWFRAME_CODE_ITEM_OFFSET) 9000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze#define OFF_FP_SHADOWFRAME (-SHADOWFRAME_VREGS_OFFSET) 9100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 92db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze#define MTERP_PROFILE_BRANCHES 1 9300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze#define MTERP_LOGGING 0 9400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 9500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 9600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * "export" the PC to dex_pc field in the shadow frame, f/b/o future exception objects. Must 9700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * be done *before* something throws. 9800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 9900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * It's okay to do this more than once. 10000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 10100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * NOTE: the fast interpreter keeps track of dex pc as a direct pointer to the mapped 10200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * dex byte codes. However, the rest of the runtime expects dex pc to be an instruction 10300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * offset into the code_items_[] array. For effiency, we will "export" the 10400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * current dex pc as a direct pointer using the EXPORT_PC macro, and rely on GetDexPC 10500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * to convert to a dex pc when needed. 10600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 10700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.macro EXPORT_PC 10800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze sd rPC, OFF_FP_DEX_PC_PTR(rFP) 10900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.endm 11000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 11100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 11200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Refresh handler table. 11300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 11400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.macro REFRESH_IBASE 11500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ld rIBASE, THREAD_CURRENT_IBASE_OFFSET(rSELF) 11600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.endm 11700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 11800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 11900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Fetch the next instruction from rPC into rINST. Does not advance rPC. 12000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 12100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.macro FETCH_INST 12200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lhu rINST, 0(rPC) 12300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.endm 12400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 12500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* Advance rPC by some number of code units. */ 12600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.macro ADVANCE count 12700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu rPC, rPC, (\count) * 2 12800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.endm 12900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 13000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 13100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Fetch the next instruction from the specified offset. Advances rPC 13200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * to point to the next instruction. 13300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 13400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * This must come AFTER anything that can throw an exception, or the 13500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * exception catch may miss. (This also implies that it must come after 13600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * EXPORT_PC.) 13700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 13800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.macro FETCH_ADVANCE_INST count 13900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ADVANCE \count 14000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze FETCH_INST 14100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.endm 14200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 14300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 14400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Similar to FETCH_ADVANCE_INST, but does not update rPC. Used to load 14500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * rINST ahead of possible exception point. Be sure to manually advance rPC 14600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * later. 14700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 14800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.macro PREFETCH_INST count 14900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lhu rINST, ((\count) * 2)(rPC) 15000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.endm 15100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 15200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 15300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Put the instruction's opcode field into the specified register. 15400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 15500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.macro GET_INST_OPCODE reg 15600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze and \reg, rINST, 255 15700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.endm 15800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 15900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 16000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Begin executing the opcode in _reg. 16100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 16200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.macro GOTO_OPCODE reg 16300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .set noat 16400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze sll AT, \reg, 7 16500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu AT, rIBASE, AT 16600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jic AT, 0 16700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .set at 16800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.endm 16900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 17000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 17100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Get/set the 32-bit value from a Dalvik register. 17200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Note, GET_VREG does sign extension to 64 bits while 17300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * GET_VREG_U does zero extension to 64 bits. 17400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * One is useful for arithmetic while the other is 17500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * useful for storing the result value as 64-bit. 17600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 17700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.macro GET_VREG reg, vreg 17800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .set noat 17900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dlsa AT, \vreg, rFP, 2 18000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lw \reg, 0(AT) 18100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .set at 18200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.endm 18300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.macro GET_VREG_U reg, vreg 18400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .set noat 18500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dlsa AT, \vreg, rFP, 2 18600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lwu \reg, 0(AT) 18700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .set at 18800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.endm 18900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.macro GET_VREG_FLOAT reg, vreg 19000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .set noat 19100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dlsa AT, \vreg, rFP, 2 19200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lwc1 \reg, 0(AT) 19300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .set at 19400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.endm 19500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.macro SET_VREG reg, vreg 19600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .set noat 19700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dlsa AT, \vreg, rFP, 2 19800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze sw \reg, 0(AT) 19900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dlsa AT, \vreg, rREFS, 2 20000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze sw zero, 0(AT) 20100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .set at 20200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.endm 20300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.macro SET_VREG_OBJECT reg, vreg 20400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .set noat 20500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dlsa AT, \vreg, rFP, 2 20600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze sw \reg, 0(AT) 20700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dlsa AT, \vreg, rREFS, 2 20800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze sw \reg, 0(AT) 20900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .set at 21000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.endm 21100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.macro SET_VREG_FLOAT reg, vreg 21200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .set noat 21300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dlsa AT, \vreg, rFP, 2 21400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze swc1 \reg, 0(AT) 21500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dlsa AT, \vreg, rREFS, 2 21600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze sw zero, 0(AT) 21700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .set at 21800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.endm 21900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 22000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 22100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Get/set the 64-bit value from a Dalvik register. 22200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Avoid unaligned memory accesses. 22300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Note, SET_VREG_WIDE clobbers the register containing the value being stored. 22400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Note, SET_VREG_DOUBLE clobbers the register containing the Dalvik register number. 22500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 22600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.macro GET_VREG_WIDE reg, vreg 22700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .set noat 22800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dlsa AT, \vreg, rFP, 2 22900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lw \reg, 0(AT) 23000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lw AT, 4(AT) 23100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dinsu \reg, AT, 32, 32 23200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .set at 23300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.endm 23400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.macro GET_VREG_DOUBLE reg, vreg 23500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .set noat 23600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dlsa AT, \vreg, rFP, 2 23700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lwc1 \reg, 0(AT) 23800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lw AT, 4(AT) 23900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze mthc1 AT, \reg 24000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .set at 24100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.endm 24200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.macro SET_VREG_WIDE reg, vreg 24300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .set noat 24400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dlsa AT, \vreg, rFP, 2 24500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze sw \reg, 0(AT) 24600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze drotr32 \reg, \reg, 0 24700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze sw \reg, 4(AT) 24800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dlsa AT, \vreg, rREFS, 2 24900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze sw zero, 0(AT) 25000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze sw zero, 4(AT) 25100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .set at 25200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.endm 25300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.macro SET_VREG_DOUBLE reg, vreg 25400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .set noat 25500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dlsa AT, \vreg, rREFS, 2 25600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze sw zero, 0(AT) 25700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze sw zero, 4(AT) 25800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dlsa AT, \vreg, rFP, 2 25900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze swc1 \reg, 0(AT) 26000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze mfhc1 \vreg, \reg 26100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze sw \vreg, 4(AT) 26200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .set at 26300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.endm 26400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 26500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 26600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * On-stack offsets for spilling/unspilling callee-saved registers 26700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * and the frame size. 26800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 26900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze#define STACK_OFFSET_RA 0 27000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze#define STACK_OFFSET_GP 8 27100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze#define STACK_OFFSET_S0 16 27200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze#define STACK_OFFSET_S1 24 27300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze#define STACK_OFFSET_S2 32 27400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze#define STACK_OFFSET_S3 40 27500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze#define STACK_OFFSET_S4 48 27600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze#define STACK_OFFSET_S5 56 27700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze#define STACK_SIZE 64 27800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 27900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* Constants for float/double_to_int/long conversions */ 28000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze#define INT_MIN 0x80000000 28100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze#define INT_MIN_AS_FLOAT 0xCF000000 28200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze#define INT_MIN_AS_DOUBLE 0xC1E0000000000000 28300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze#define LONG_MIN 0x8000000000000000 28400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze#define LONG_MIN_AS_FLOAT 0xDF000000 28500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze#define LONG_MIN_AS_DOUBLE 0xC3E0000000000000 28600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 28700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/entry.S */ 28800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 28900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Copyright (C) 2016 The Android Open Source Project 29000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 29100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Licensed under the Apache License, Version 2.0 (the "License"); 29200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * you may not use this file except in compliance with the License. 29300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * You may obtain a copy of the License at 29400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 29500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * http://www.apache.org/licenses/LICENSE-2.0 29600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 29700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Unless required by applicable law or agreed to in writing, software 29800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * distributed under the License is distributed on an "AS IS" BASIS, 29900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 30000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * See the License for the specific language governing permissions and 30100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * limitations under the License. 30200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 30300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 30400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 30500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Interpreter entry point. 30600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 30700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 30800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .set reorder 30900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 31000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .text 31100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .global ExecuteMterpImpl 31200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .type ExecuteMterpImpl, %function 31300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 16 31400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 31500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * On entry: 31600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * a0 Thread* self 31700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * a1 code_item 31800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * a2 ShadowFrame 31900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * a3 JValue* result_register 32000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 32100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 32200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey FrunzeExecuteMterpImpl: 32300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .cfi_startproc 32400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .cpsetup t9, t8, ExecuteMterpImpl 32500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 32600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .cfi_def_cfa sp, 0 32700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu sp, sp, -STACK_SIZE 32800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .cfi_adjust_cfa_offset STACK_SIZE 32900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 33000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze sd t8, STACK_OFFSET_GP(sp) 33100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .cfi_rel_offset 28, STACK_OFFSET_GP 33200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze sd ra, STACK_OFFSET_RA(sp) 33300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .cfi_rel_offset 31, STACK_OFFSET_RA 33400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 33500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze sd s0, STACK_OFFSET_S0(sp) 33600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .cfi_rel_offset 16, STACK_OFFSET_S0 33700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze sd s1, STACK_OFFSET_S1(sp) 33800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .cfi_rel_offset 17, STACK_OFFSET_S1 33900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze sd s2, STACK_OFFSET_S2(sp) 34000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .cfi_rel_offset 18, STACK_OFFSET_S2 34100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze sd s3, STACK_OFFSET_S3(sp) 34200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .cfi_rel_offset 19, STACK_OFFSET_S3 34300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze sd s4, STACK_OFFSET_S4(sp) 34400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .cfi_rel_offset 20, STACK_OFFSET_S4 34500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze sd s5, STACK_OFFSET_S5(sp) 34600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .cfi_rel_offset 21, STACK_OFFSET_S5 34700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 34800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* Remember the return register */ 34900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze sd a3, SHADOWFRAME_RESULT_REGISTER_OFFSET(a2) 35000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 35100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* Remember the code_item */ 35200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze sd a1, SHADOWFRAME_CODE_ITEM_OFFSET(a2) 35300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 35400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* set up "named" registers */ 35500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move rSELF, a0 35600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu rFP, a2, SHADOWFRAME_VREGS_OFFSET 35700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lw v0, SHADOWFRAME_NUMBER_OF_VREGS_OFFSET(a2) 35800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dlsa rREFS, v0, rFP, 2 35900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu rPC, a1, CODEITEM_INSNS_OFFSET 36000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lw v0, SHADOWFRAME_DEX_PC_OFFSET(a2) 36100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dlsa rPC, v0, rPC, 1 36200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 36300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 36400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* Starting ibase */ 36500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 36600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 36700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* start executing the instruction at rPC */ 36800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze FETCH_INST 36900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_INST_OPCODE v0 37000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GOTO_OPCODE v0 37100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 37200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* NOTE: no fallthrough */ 37300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 37400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 37500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .global artMterpAsmInstructionStart 37600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .type artMterpAsmInstructionStart, %function 37700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey FrunzeartMterpAsmInstructionStart = .L_op_nop 37800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .text 37900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 38000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 38100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 38200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_nop: /* 0x00 */ 38300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_nop.S */ 38400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze FETCH_ADVANCE_INST 1 # advance rPC, load rINST 38500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_INST_OPCODE v0 # extract opcode from rINST 38600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GOTO_OPCODE v0 # jump to next instruction 38700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 38800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 38900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 39000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_move: /* 0x01 */ 39100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_move.S */ 39200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* for move, move-object, long-to-int */ 39300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* op vA, vB */ 39400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ext a2, rINST, 8, 4 # a2 <- A 39500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ext a3, rINST, 12, 4 # a3 <- B 39600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze FETCH_ADVANCE_INST 1 # advance rPC, load rINST 39700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG a0, a3 # a0 <- vB 39800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_INST_OPCODE v0 # extract opcode from rINST 39900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .if 0 40000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze SET_VREG_OBJECT a0, a2 # vA <- vB 40100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .else 40200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze SET_VREG a0, a2 # vA <- vB 40300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .endif 40400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GOTO_OPCODE v0 # jump to next instruction 40500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 40600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 40700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 40800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_move_from16: /* 0x02 */ 40900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_move_from16.S */ 41000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* for: move/from16, move-object/from16 */ 41100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* op vAA, vBBBB */ 41200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lhu a3, 2(rPC) # a3 <- BBBB 41300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze srl a2, rINST, 8 # a2 <- AA 41400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze FETCH_ADVANCE_INST 2 # advance rPC, load rINST 41500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG a0, a3 # a0 <- vBBBB 41600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_INST_OPCODE v0 # extract opcode from rINST 41700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .if 0 41800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze SET_VREG_OBJECT a0, a2 # vAA <- vBBBB 41900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .else 42000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze SET_VREG a0, a2 # vAA <- vBBBB 42100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .endif 42200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GOTO_OPCODE v0 # jump to next instruction 42300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 42400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 42500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 42600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_move_16: /* 0x03 */ 42700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_move_16.S */ 42800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* for: move/16, move-object/16 */ 42900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* op vAAAA, vBBBB */ 43000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lhu a3, 4(rPC) # a3 <- BBBB 43100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lhu a2, 2(rPC) # a2 <- AAAA 43200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze FETCH_ADVANCE_INST 3 # advance rPC, load rINST 43300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG a0, a3 # a0 <- vBBBB 43400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_INST_OPCODE v0 # extract opcode from rINST 43500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .if 0 43600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze SET_VREG_OBJECT a0, a2 # vAAAA <- vBBBB 43700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .else 43800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze SET_VREG a0, a2 # vAAAA <- vBBBB 43900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .endif 44000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GOTO_OPCODE v0 # jump to next instruction 44100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 44200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 44300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 44400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_move_wide: /* 0x04 */ 44500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_move_wide.S */ 44600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* move-wide vA, vB */ 44700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* NOTE: regs can overlap, e.g. "move v6,v7" or "move v7,v6" */ 44800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ext a3, rINST, 12, 4 # a3 <- B 44900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ext a2, rINST, 8, 4 # a2 <- A 45000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG_WIDE a0, a3 # a0 <- vB 45100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze FETCH_ADVANCE_INST 1 # advance rPC, load rINST 45200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_INST_OPCODE v0 # extract opcode from rINST 45300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze SET_VREG_WIDE a0, a2 # vA <- vB 45400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GOTO_OPCODE v0 # jump to next instruction 45500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 45600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 45700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 45800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_move_wide_from16: /* 0x05 */ 45900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_move_wide_from16.S */ 46000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* move-wide/from16 vAA, vBBBB */ 46100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* NOTE: regs can overlap, e.g. "move v6,v7" or "move v7,v6" */ 46200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lhu a3, 2(rPC) # a3 <- BBBB 46300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze srl a2, rINST, 8 # a2 <- AA 46400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG_WIDE a0, a3 # a0 <- vBBBB 46500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze FETCH_ADVANCE_INST 2 # advance rPC, load rINST 46600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_INST_OPCODE v0 # extract opcode from rINST 46700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze SET_VREG_WIDE a0, a2 # vAA <- vBBBB 46800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GOTO_OPCODE v0 # jump to next instruction 46900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 47000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 47100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 47200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_move_wide_16: /* 0x06 */ 47300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_move_wide_16.S */ 47400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* move-wide/16 vAAAA, vBBBB */ 47500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* NOTE: regs can overlap, e.g. "move v6,v7" or "move v7,v6" */ 47600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lhu a3, 4(rPC) # a3 <- BBBB 47700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lhu a2, 2(rPC) # a2 <- AAAA 47800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG_WIDE a0, a3 # a0 <- vBBBB 47900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze FETCH_ADVANCE_INST 3 # advance rPC, load rINST 48000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_INST_OPCODE v0 # extract opcode from rINST 48100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze SET_VREG_WIDE a0, a2 # vAAAA <- vBBBB 48200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GOTO_OPCODE v0 # jump to next instruction 48300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 48400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 48500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 48600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_move_object: /* 0x07 */ 48700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_move_object.S */ 48800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_move.S */ 48900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* for move, move-object, long-to-int */ 49000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* op vA, vB */ 49100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ext a2, rINST, 8, 4 # a2 <- A 49200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ext a3, rINST, 12, 4 # a3 <- B 49300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze FETCH_ADVANCE_INST 1 # advance rPC, load rINST 49400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG a0, a3 # a0 <- vB 49500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_INST_OPCODE v0 # extract opcode from rINST 49600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .if 1 49700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze SET_VREG_OBJECT a0, a2 # vA <- vB 49800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .else 49900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze SET_VREG a0, a2 # vA <- vB 50000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .endif 50100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GOTO_OPCODE v0 # jump to next instruction 50200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 50300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 50400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 50500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 50600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_move_object_from16: /* 0x08 */ 50700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_move_object_from16.S */ 50800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_move_from16.S */ 50900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* for: move/from16, move-object/from16 */ 51000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* op vAA, vBBBB */ 51100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lhu a3, 2(rPC) # a3 <- BBBB 51200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze srl a2, rINST, 8 # a2 <- AA 51300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze FETCH_ADVANCE_INST 2 # advance rPC, load rINST 51400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG a0, a3 # a0 <- vBBBB 51500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_INST_OPCODE v0 # extract opcode from rINST 51600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .if 1 51700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze SET_VREG_OBJECT a0, a2 # vAA <- vBBBB 51800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .else 51900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze SET_VREG a0, a2 # vAA <- vBBBB 52000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .endif 52100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GOTO_OPCODE v0 # jump to next instruction 52200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 52300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 52400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 52500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 52600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_move_object_16: /* 0x09 */ 52700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_move_object_16.S */ 52800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_move_16.S */ 52900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* for: move/16, move-object/16 */ 53000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* op vAAAA, vBBBB */ 53100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lhu a3, 4(rPC) # a3 <- BBBB 53200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lhu a2, 2(rPC) # a2 <- AAAA 53300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze FETCH_ADVANCE_INST 3 # advance rPC, load rINST 53400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG a0, a3 # a0 <- vBBBB 53500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_INST_OPCODE v0 # extract opcode from rINST 53600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .if 1 53700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze SET_VREG_OBJECT a0, a2 # vAAAA <- vBBBB 53800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .else 53900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze SET_VREG a0, a2 # vAAAA <- vBBBB 54000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .endif 54100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GOTO_OPCODE v0 # jump to next instruction 54200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 54300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 54400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 54500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 54600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_move_result: /* 0x0a */ 54700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_move_result.S */ 54800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* for: move-result, move-result-object */ 54900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* op vAA */ 55000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze srl a2, rINST, 8 # a2 <- AA 55100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze FETCH_ADVANCE_INST 1 # advance rPC, load rINST 55200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ld a0, OFF_FP_RESULT_REGISTER(rFP) # get pointer to result JType 55300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lw a0, 0(a0) # a0 <- result.i 55400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_INST_OPCODE v0 # extract opcode from rINST 55500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .if 0 55600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze SET_VREG_OBJECT a0, a2 # vAA <- result 55700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .else 55800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze SET_VREG a0, a2 # vAA <- result 55900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .endif 56000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GOTO_OPCODE v0 # jump to next instruction 56100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 56200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 56300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 56400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_move_result_wide: /* 0x0b */ 56500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_move_result_wide.S */ 56600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* for: move-result-wide */ 56700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* op vAA */ 56800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze srl a2, rINST, 8 # a2 <- AA 56900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze FETCH_ADVANCE_INST 1 # advance rPC, load rINST 57000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ld a0, OFF_FP_RESULT_REGISTER(rFP) # get pointer to result JType 57100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ld a0, 0(a0) # a0 <- result.j 57200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_INST_OPCODE v0 # extract opcode from rINST 57300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze SET_VREG_WIDE a0, a2 # vAA <- result 57400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GOTO_OPCODE v0 # jump to next instruction 57500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 57600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 57700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 57800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_move_result_object: /* 0x0c */ 57900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_move_result_object.S */ 58000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_move_result.S */ 58100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* for: move-result, move-result-object */ 58200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* op vAA */ 58300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze srl a2, rINST, 8 # a2 <- AA 58400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze FETCH_ADVANCE_INST 1 # advance rPC, load rINST 58500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ld a0, OFF_FP_RESULT_REGISTER(rFP) # get pointer to result JType 58600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lw a0, 0(a0) # a0 <- result.i 58700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_INST_OPCODE v0 # extract opcode from rINST 58800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .if 1 58900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze SET_VREG_OBJECT a0, a2 # vAA <- result 59000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .else 59100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze SET_VREG a0, a2 # vAA <- result 59200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .endif 59300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GOTO_OPCODE v0 # jump to next instruction 59400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 59500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 59600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 59700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 59800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_move_exception: /* 0x0d */ 59900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_move_exception.S */ 60000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* move-exception vAA */ 60100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze srl a2, rINST, 8 # a2 <- AA 60200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ld a0, THREAD_EXCEPTION_OFFSET(rSELF) # load exception obj 60300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze FETCH_ADVANCE_INST 1 # advance rPC, load rINST 60400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze SET_VREG_OBJECT a0, a2 # vAA <- exception obj 60500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_INST_OPCODE v0 # extract opcode from rINST 60600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze sd zero, THREAD_EXCEPTION_OFFSET(rSELF) # clear exception 60700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GOTO_OPCODE v0 # jump to next instruction 60800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 60900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 61000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 61100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_return_void: /* 0x0e */ 61200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_return_void.S */ 61300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpThreadFenceForConstructor 61400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpSuspendCheck 61500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jal MterpThreadFenceForConstructor 61600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lw ra, THREAD_FLAGS_OFFSET(rSELF) 61700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 61800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze and ra, ra, (THREAD_SUSPEND_REQUEST | THREAD_CHECKPOINT_REQUEST) 61900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze beqzc ra, 1f 62000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jal MterpSuspendCheck # (self) 62100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze1: 62200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze li a0, 0 62300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze b MterpReturn 62400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 62500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 62600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 62700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_return: /* 0x0f */ 62800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_return.S */ 62900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* 63000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Return a 32-bit value. 63100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 63200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * for: return, return-object 63300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 63400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* op vAA */ 63500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpThreadFenceForConstructor 63600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpSuspendCheck 63700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jal MterpThreadFenceForConstructor 63800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lw ra, THREAD_FLAGS_OFFSET(rSELF) 63900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 64000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze and ra, ra, (THREAD_SUSPEND_REQUEST | THREAD_CHECKPOINT_REQUEST) 64100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze beqzc ra, 1f 64200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jal MterpSuspendCheck # (self) 64300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze1: 64400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze srl a2, rINST, 8 # a2 <- AA 64500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG_U a0, a2 # a0 <- vAA 64600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze b MterpReturn 64700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 64800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 64900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 65000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_return_wide: /* 0x10 */ 65100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_return_wide.S */ 65200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* 65300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Return a 64-bit value. 65400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 65500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* return-wide vAA */ 65600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* op vAA */ 65700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpThreadFenceForConstructor 65800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpSuspendCheck 65900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jal MterpThreadFenceForConstructor 66000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lw ra, THREAD_FLAGS_OFFSET(rSELF) 66100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 66200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze and ra, ra, (THREAD_SUSPEND_REQUEST | THREAD_CHECKPOINT_REQUEST) 66300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze beqzc ra, 1f 66400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jal MterpSuspendCheck # (self) 66500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze1: 66600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze srl a2, rINST, 8 # a2 <- AA 66700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG_WIDE a0, a2 # a0 <- vAA 66800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze b MterpReturn 66900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 67000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 67100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 67200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_return_object: /* 0x11 */ 67300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_return_object.S */ 67400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_return.S */ 67500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* 67600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Return a 32-bit value. 67700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 67800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * for: return, return-object 67900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 68000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* op vAA */ 68100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpThreadFenceForConstructor 68200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpSuspendCheck 68300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jal MterpThreadFenceForConstructor 68400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lw ra, THREAD_FLAGS_OFFSET(rSELF) 68500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 68600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze and ra, ra, (THREAD_SUSPEND_REQUEST | THREAD_CHECKPOINT_REQUEST) 68700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze beqzc ra, 1f 68800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jal MterpSuspendCheck # (self) 68900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze1: 69000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze srl a2, rINST, 8 # a2 <- AA 69100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG_U a0, a2 # a0 <- vAA 69200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze b MterpReturn 69300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 69400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 69500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 69600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 69700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_const_4: /* 0x12 */ 69800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_const_4.S */ 69900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* const/4 vA, #+B */ 70000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ext a2, rINST, 8, 4 # a2 <- A 70100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze seh a0, rINST # sign extend B in rINST 70200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze FETCH_ADVANCE_INST 1 # advance rPC, load rINST 70300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze sra a0, a0, 12 # shift B into its final position 70400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_INST_OPCODE v0 # extract opcode from rINST 70500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze SET_VREG a0, a2 # vA <- +B 70600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GOTO_OPCODE v0 # jump to next instruction 70700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 70800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 70900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 71000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_const_16: /* 0x13 */ 71100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_const_16.S */ 71200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* const/16 vAA, #+BBBB */ 71300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze srl a2, rINST, 8 # a2 <- AA 71400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lh a0, 2(rPC) # a0 <- sign-extended BBBB 71500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze FETCH_ADVANCE_INST 2 # advance rPC, load rINST 71600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_INST_OPCODE v0 # extract opcode from rINST 71700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze SET_VREG a0, a2 # vAA <- +BBBB 71800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GOTO_OPCODE v0 # jump to next instruction 71900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 72000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 72100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 72200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_const: /* 0x14 */ 72300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_const.S */ 72400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* const vAA, #+BBBBbbbb */ 72500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze srl a2, rINST, 8 # a2 <- AA 72600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lh a0, 2(rPC) # a0 <- bbbb (low) 72700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lh a1, 4(rPC) # a1 <- BBBB (high) 72800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze FETCH_ADVANCE_INST 3 # advance rPC, load rINST 72900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ins a0, a1, 16, 16 # a0 = BBBBbbbb 73000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_INST_OPCODE v0 # extract opcode from rINST 73100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze SET_VREG a0, a2 # vAA <- +BBBBbbbb 73200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GOTO_OPCODE v0 # jump to next instruction 73300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 73400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 73500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 73600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_const_high16: /* 0x15 */ 73700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_const_high16.S */ 73800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* const/high16 vAA, #+BBBB0000 */ 73900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze srl a2, rINST, 8 # a2 <- AA 74000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lh a0, 2(rPC) # a0 <- BBBB 74100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze FETCH_ADVANCE_INST 2 # advance rPC, load rINST 74200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze sll a0, a0, 16 # a0 <- BBBB0000 74300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_INST_OPCODE v0 # extract opcode from rINST 74400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze SET_VREG a0, a2 # vAA <- +BBBB0000 74500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GOTO_OPCODE v0 # jump to next instruction 74600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 74700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 74800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 74900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_const_wide_16: /* 0x16 */ 75000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_const_wide_16.S */ 75100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* const-wide/16 vAA, #+BBBB */ 75200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze srl a2, rINST, 8 # a2 <- AA 75300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lh a0, 2(rPC) # a0 <- sign-extended BBBB 75400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze FETCH_ADVANCE_INST 2 # advance rPC, load rINST 75500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_INST_OPCODE v0 # extract opcode from rINST 75600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze SET_VREG_WIDE a0, a2 # vAA <- +BBBB 75700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GOTO_OPCODE v0 # jump to next instruction 75800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 75900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 76000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 76100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_const_wide_32: /* 0x17 */ 76200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_const_wide_32.S */ 76300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* const-wide/32 vAA, #+BBBBbbbb */ 76400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze srl a2, rINST, 8 # a2 <- AA 76500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lh a0, 2(rPC) # a0 <- bbbb (low) 76600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lh a1, 4(rPC) # a1 <- BBBB (high) 76700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze FETCH_ADVANCE_INST 3 # advance rPC, load rINST 76800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ins a0, a1, 16, 16 # a0 = BBBBbbbb 76900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_INST_OPCODE v0 # extract opcode from rINST 77000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze SET_VREG_WIDE a0, a2 # vAA <- +BBBBbbbb 77100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GOTO_OPCODE v0 # jump to next instruction 77200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 77300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 77400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 77500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_const_wide: /* 0x18 */ 77600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_const_wide.S */ 77700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* const-wide vAA, #+HHHHhhhhBBBBbbbb */ 77800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze srl a4, rINST, 8 # a4 <- AA 77900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lh a0, 2(rPC) # a0 <- bbbb (low) 78000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lh a1, 4(rPC) # a1 <- BBBB (low middle) 78100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lh a2, 6(rPC) # a2 <- hhhh (high middle) 78200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lh a3, 8(rPC) # a3 <- HHHH (high) 78300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze FETCH_ADVANCE_INST 5 # advance rPC, load rINST 78400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ins a0, a1, 16, 16 # a0 = BBBBbbbb 78500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ins a2, a3, 16, 16 # a2 = HHHHhhhh 78600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dinsu a0, a2, 32, 32 # a0 = HHHHhhhhBBBBbbbb 78700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_INST_OPCODE v0 # extract opcode from rINST 78800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze SET_VREG_WIDE a0, a4 # vAA <- +HHHHhhhhBBBBbbbb 78900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GOTO_OPCODE v0 # jump to next instruction 79000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 79100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 79200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 79300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_const_wide_high16: /* 0x19 */ 79400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_const_wide_high16.S */ 79500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* const-wide/high16 vAA, #+BBBB000000000000 */ 79600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze srl a2, rINST, 8 # a2 <- AA 79700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lh a0, 2(rPC) # a0 <- BBBB 79800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze FETCH_ADVANCE_INST 2 # advance rPC, load rINST 79900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dsll32 a0, a0, 16 # a0 <- BBBB000000000000 80000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_INST_OPCODE v0 # extract opcode from rINST 80100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze SET_VREG_WIDE a0, a2 # vAA <- +BBBB000000000000 80200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GOTO_OPCODE v0 # jump to next instruction 80300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 80400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 80500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 80600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_const_string: /* 0x1a */ 80700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_const_string.S */ 80800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* const/string vAA, String//BBBB */ 80900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpConstString 81000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 81100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lhu a0, 2(rPC) # a0 <- BBBB 81200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze srl a1, rINST, 8 # a1 <- AA 81300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a2, rFP, OFF_FP_SHADOWFRAME 81400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a3, rSELF 81500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jal MterpConstString # (index, tgt_reg, shadow_frame, self) 81600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze PREFETCH_INST 2 # load rINST 81700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze bnez v0, MterpPossibleException # let reference interpreter deal with it. 81800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ADVANCE 2 # advance rPC 81900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_INST_OPCODE v0 # extract opcode from rINST 82000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GOTO_OPCODE v0 # jump to next instruction 82100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 82200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 82300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 82400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_const_string_jumbo: /* 0x1b */ 82500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_const_string_jumbo.S */ 82600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* const/string vAA, String//BBBBBBBB */ 82700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpConstString 82800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 82900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lh a0, 2(rPC) # a0 <- bbbb (low) 83000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lh a4, 4(rPC) # a4 <- BBBB (high) 83100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze srl a1, rINST, 8 # a1 <- AA 83200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ins a0, a4, 16, 16 # a0 <- BBBBbbbb 83300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a2, rFP, OFF_FP_SHADOWFRAME 83400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a3, rSELF 83500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jal MterpConstString # (index, tgt_reg, shadow_frame, self) 83600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze PREFETCH_INST 3 # load rINST 83700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze bnez v0, MterpPossibleException # let reference interpreter deal with it. 83800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ADVANCE 3 # advance rPC 83900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_INST_OPCODE v0 # extract opcode from rINST 84000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GOTO_OPCODE v0 # jump to next instruction 84100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 84200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 84300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 84400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_const_class: /* 0x1c */ 84500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_const_class.S */ 84600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* const/class vAA, Class//BBBB */ 84700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpConstClass 84800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 84900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lhu a0, 2(rPC) # a0 <- BBBB 85000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze srl a1, rINST, 8 # a1 <- AA 85100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a2, rFP, OFF_FP_SHADOWFRAME 85200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a3, rSELF 85300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jal MterpConstClass # (index, tgt_reg, shadow_frame, self) 85400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze PREFETCH_INST 2 # load rINST 85500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze bnez v0, MterpPossibleException # let reference interpreter deal with it. 85600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ADVANCE 2 # advance rPC 85700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_INST_OPCODE v0 # extract opcode from rINST 85800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GOTO_OPCODE v0 # jump to next instruction 85900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 86000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 86100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 86200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_monitor_enter: /* 0x1d */ 86300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_monitor_enter.S */ 86400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* 86500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Synchronize on an object. 86600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 86700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* monitor-enter vAA */ 86800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern artLockObjectFromCode 86900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 87000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze srl a2, rINST, 8 # a2 <- AA 87100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG_U a0, a2 # a0 <- vAA (object) 87200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a1, rSELF # a1 <- self 87300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jal artLockObjectFromCode 87400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze bnezc v0, MterpException 87500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze FETCH_ADVANCE_INST 1 87600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_INST_OPCODE v0 # extract opcode from rINST 87700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GOTO_OPCODE v0 # jump to next instruction 87800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 87900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 88000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 88100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_monitor_exit: /* 0x1e */ 88200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_monitor_exit.S */ 88300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* 88400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Unlock an object. 88500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 88600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Exceptions that occur when unlocking a monitor need to appear as 88700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * if they happened at the following instruction. See the Dalvik 88800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * instruction spec. 88900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 89000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* monitor-exit vAA */ 89100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern artUnlockObjectFromCode 89200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 89300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze srl a2, rINST, 8 # a2 <- AA 89400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG_U a0, a2 # a0 <- vAA (object) 89500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a1, rSELF # a1 <- self 89600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jal artUnlockObjectFromCode # v0 <- success for unlock(self, obj) 89700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze bnezc v0, MterpException 89800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze FETCH_ADVANCE_INST 1 # before throw: advance rPC, load rINST 89900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_INST_OPCODE v0 # extract opcode from rINST 90000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GOTO_OPCODE v0 # jump to next instruction 90100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 90200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 90300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 90400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_check_cast: /* 0x1f */ 90500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_check_cast.S */ 90600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* 90700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Check to see if a cast from one class to another is allowed. 90800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 90900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* check-cast vAA, class//BBBB */ 91000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckCast 91100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 91200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lhu a0, 2(rPC) # a0 <- BBBB 91300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze srl a1, rINST, 8 # a1 <- AA 91400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dlsa a1, a1, rFP, 2 # a1 <- &object 91500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ld a2, OFF_FP_METHOD(rFP) # a2 <- method 91600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a3, rSELF # a3 <- self 91700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jal MterpCheckCast # (index, &obj, method, self) 91800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze PREFETCH_INST 2 91900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze bnez v0, MterpPossibleException 92000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ADVANCE 2 92100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_INST_OPCODE v0 # extract opcode from rINST 92200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GOTO_OPCODE v0 # jump to next instruction 92300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 92400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 92500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 92600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_instance_of: /* 0x20 */ 92700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_instance_of.S */ 92800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* 92900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Check to see if an object reference is an instance of a class. 93000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 93100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Most common situation is a non-null object, being compared against 93200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * an already-resolved class. 93300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 93400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* instance-of vA, vB, class//CCCC */ 93500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpInstanceOf 93600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 93700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lhu a0, 2(rPC) # a0 <- CCCC 93800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze srl a1, rINST, 12 # a1 <- B 93900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dlsa a1, a1, rFP, 2 # a1 <- &object 94000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ld a2, OFF_FP_METHOD(rFP) # a2 <- method 94100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a3, rSELF # a3 <- self 94200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jal MterpInstanceOf # (index, &obj, method, self) 94300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ld a1, THREAD_EXCEPTION_OFFSET(rSELF) 94400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ext a2, rINST, 8, 4 # a2 <- A 94500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze PREFETCH_INST 2 94600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze bnez a1, MterpException 94700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ADVANCE 2 # advance rPC 94800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze SET_VREG v0, a2 # vA <- v0 94900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_INST_OPCODE v0 # extract opcode from rINST 95000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GOTO_OPCODE v0 # jump to next instruction 95100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 95200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 95300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 95400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_array_length: /* 0x21 */ 95500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_array_length.S */ 95600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* 95700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Return the length of an array. 95800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 95900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze srl a1, rINST, 12 # a1 <- B 96000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG_U a0, a1 # a0 <- vB (object ref) 96100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ext a2, rINST, 8, 4 # a2 <- A 96200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze beqz a0, common_errNullObject # yup, fail 96300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze FETCH_ADVANCE_INST 1 # advance rPC, load rINST 96400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lw a3, MIRROR_ARRAY_LENGTH_OFFSET(a0) # a3 <- array length 96500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_INST_OPCODE v0 # extract opcode from rINST 96600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze SET_VREG a3, a2 # vB <- length 96700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GOTO_OPCODE v0 # jump to next instruction 96800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 96900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 97000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 97100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_new_instance: /* 0x22 */ 97200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_new_instance.S */ 97300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* 97400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Create a new instance of a class. 97500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 97600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* new-instance vAA, class//BBBB */ 97700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpNewInstance 97800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 97900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a0, rFP, OFF_FP_SHADOWFRAME 98000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a1, rSELF 98100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a2, rINST 98200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jal MterpNewInstance # (shadow_frame, self, inst_data) 98300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze beqzc v0, MterpPossibleException 98400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze FETCH_ADVANCE_INST 2 # advance rPC, load rINST 98500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_INST_OPCODE v0 # extract opcode from rINST 98600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GOTO_OPCODE v0 # jump to next instruction 98700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 98800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 98900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 99000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_new_array: /* 0x23 */ 99100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_new_array.S */ 99200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* 99300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Allocate an array of objects, specified with the array class 99400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * and a count. 99500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 99600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * The verifier guarantees that this is an array class, so we don't 99700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * check for it here. 99800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 99900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* new-array vA, vB, class//CCCC */ 100000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpNewArray 100100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 100200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a0, rFP, OFF_FP_SHADOWFRAME 100300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a1, rPC 100400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a2, rINST 100500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a3, rSELF 100600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jal MterpNewArray 100700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze beqzc v0, MterpPossibleException 100800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze FETCH_ADVANCE_INST 2 # advance rPC, load rINST 100900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_INST_OPCODE v0 # extract opcode from rINST 101000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GOTO_OPCODE v0 # jump to next instruction 101100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 101200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 101300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 101400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_filled_new_array: /* 0x24 */ 101500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_filled_new_array.S */ 101600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* 101700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Create a new array with elements filled from registers. 101800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 101900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * for: filled-new-array, filled-new-array/range 102000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 102100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* op vB, {vD, vE, vF, vG, vA}, class//CCCC */ 102200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* op {vCCCC..v(CCCC+AA-1)}, type//BBBB */ 102300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpFilledNewArray 102400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 102500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a0, rFP, OFF_FP_SHADOWFRAME 102600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a1, rPC 102700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a2, rSELF 102800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jal MterpFilledNewArray 102900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze beqzc v0, MterpPossibleException 103000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze FETCH_ADVANCE_INST 3 # advance rPC, load rINST 103100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_INST_OPCODE v0 # extract opcode from rINST 103200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GOTO_OPCODE v0 # jump to next instruction 103300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 103400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 103500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 103600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_filled_new_array_range: /* 0x25 */ 103700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_filled_new_array_range.S */ 103800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_filled_new_array.S */ 103900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* 104000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Create a new array with elements filled from registers. 104100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 104200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * for: filled-new-array, filled-new-array/range 104300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 104400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* op vB, {vD, vE, vF, vG, vA}, class//CCCC */ 104500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* op {vCCCC..v(CCCC+AA-1)}, type//BBBB */ 104600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpFilledNewArrayRange 104700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 104800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a0, rFP, OFF_FP_SHADOWFRAME 104900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a1, rPC 105000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a2, rSELF 105100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jal MterpFilledNewArrayRange 105200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze beqzc v0, MterpPossibleException 105300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze FETCH_ADVANCE_INST 3 # advance rPC, load rINST 105400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_INST_OPCODE v0 # extract opcode from rINST 105500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GOTO_OPCODE v0 # jump to next instruction 105600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 105700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 105800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 105900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 106000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_fill_array_data: /* 0x26 */ 106100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_fill_array_data.S */ 106200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* fill-array-data vAA, +BBBBBBBB */ 106300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpFillArrayData 106400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 106500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lh a1, 2(rPC) # a1 <- bbbb (lo) 106600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lh a0, 4(rPC) # a0 <- BBBB (hi) 106700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze srl a3, rINST, 8 # a3 <- AA 106800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ins a1, a0, 16, 16 # a1 <- BBBBbbbb 106900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG_U a0, a3 # a0 <- vAA (array object) 107000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dlsa a1, a1, rPC, 1 # a1 <- PC + BBBBbbbb*2 (array data off.) 107100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jal MterpFillArrayData # (obj, payload) 107200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze beqzc v0, MterpPossibleException # exception? 107300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze FETCH_ADVANCE_INST 3 # advance rPC, load rINST 107400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_INST_OPCODE v0 # extract opcode from rINST 107500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GOTO_OPCODE v0 # jump to next instruction 107600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 107700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 107800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 107900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_throw: /* 0x27 */ 108000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_throw.S */ 108100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* 108200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Throw an exception object in the current thread. 108300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 108400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* throw vAA */ 108500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 108600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze srl a2, rINST, 8 # a2 <- AA 108700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG_U a0, a2 # a0 <- vAA (exception object) 108800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze beqzc a0, common_errNullObject 108900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze sd a0, THREAD_EXCEPTION_OFFSET(rSELF) # thread->exception <- obj 109000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze b MterpException 109100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 109200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 109300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 109400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_goto: /* 0x28 */ 109500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_goto.S */ 109600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* 109700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Unconditional branch, 8-bit offset. 109800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 109900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * The branch distance is a signed code-unit offset, which we need to 110000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * double to get a byte offset. 110100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 110200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* goto +AA */ 1103db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze .extern MterpProfileBranch 1104db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze srl rINST, rINST, 8 1105db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze seb rINST, rINST # rINST <- offset (sign-extended AA) 1106db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze#if MTERP_PROFILE_BRANCHES 1107db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze EXPORT_PC 1108db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze move a0, rSELF 1109db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 1110db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze move a2, rINST 1111db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze jal MterpProfileBranch # (self, shadow_frame, offset) 1112db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze bnezc v0, MterpOnStackReplacement # Note: offset must be in rINST 111300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze#endif 1114db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze dlsa rPC, rINST, rPC, 1 # rPC <- rPC + offset * 2 1115db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze lw ra, THREAD_FLAGS_OFFSET(rSELF) # Preload flags for MterpCheckSuspendAndContinue 1116db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze move a0, rINST # a0 <- offset 1117db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze FETCH_INST # load rINST 1118db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze bltz a0, MterpCheckSuspendAndContinue # suspend check if backwards branch 111900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_INST_OPCODE v0 # extract opcode from rINST 112000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GOTO_OPCODE v0 # jump to next instruction 112100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 112200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 112300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 112400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_goto_16: /* 0x29 */ 112500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_goto_16.S */ 112600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* 112700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Unconditional branch, 16-bit offset. 112800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 112900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * The branch distance is a signed code-unit offset, which we need to 113000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * double to get a byte offset. 113100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 113200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* goto/16 +AAAA */ 1133db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze .extern MterpProfileBranch 1134db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze lh rINST, 2(rPC) # rINST <- offset (sign-extended AAAA) 1135db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze#if MTERP_PROFILE_BRANCHES 1136db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze EXPORT_PC 1137db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze move a0, rSELF 1138db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 1139db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze move a2, rINST 1140db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze jal MterpProfileBranch # (self, shadow_frame, offset) 1141db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze bnezc v0, MterpOnStackReplacement # Note: offset must be in rINST 114200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze#endif 1143db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze dlsa rPC, rINST, rPC, 1 # rPC <- rPC + offset * 2 1144db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze lw ra, THREAD_FLAGS_OFFSET(rSELF) # Preload flags for MterpCheckSuspendAndContinue 1145db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze move a0, rINST # a0 <- offset 1146db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze FETCH_INST # load rINST 1147db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze bltz a0, MterpCheckSuspendAndContinue # suspend check if backwards branch 114800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_INST_OPCODE v0 # extract opcode from rINST 114900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GOTO_OPCODE v0 # jump to next instruction 115000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 115100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 115200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 115300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_goto_32: /* 0x2a */ 115400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_goto_32.S */ 115500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* 115600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Unconditional branch, 32-bit offset. 115700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 115800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * The branch distance is a signed code-unit offset, which we need to 115900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * double to get a byte offset. 116000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 116100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Unlike most opcodes, this one is allowed to branch to itself, so 116200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * our "backward branch" test must be "<=0" instead of "<0". 116300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 116400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* goto/32 +AAAAAAAA */ 1165db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze .extern MterpProfileBranch 1166db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze lh rINST, 2(rPC) # rINST <- aaaa (low) 116700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lh a1, 4(rPC) # a1 <- AAAA (high) 1168db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze ins rINST, a1, 16, 16 # rINST <- offset (sign-extended AAAAaaaa) 1169db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze#if MTERP_PROFILE_BRANCHES 1170db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze EXPORT_PC 1171db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze move a0, rSELF 1172db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 1173db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze move a2, rINST 1174db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze jal MterpProfileBranch # (self, shadow_frame, offset) 1175db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze bnezc v0, MterpOnStackReplacement # Note: offset must be in rINST 117600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze#endif 1177db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze dlsa rPC, rINST, rPC, 1 # rPC <- rPC + offset * 2 1178db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze lw ra, THREAD_FLAGS_OFFSET(rSELF) # Preload flags for MterpCheckSuspendAndContinue 1179db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze move a0, rINST # a0 <- offset 1180db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze FETCH_INST # load rINST 1181db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze blez a0, MterpCheckSuspendAndContinue # suspend check if backwards branch 118200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_INST_OPCODE v0 # extract opcode from rINST 118300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GOTO_OPCODE v0 # jump to next instruction 118400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 118500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 118600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 118700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_packed_switch: /* 0x2b */ 118800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_packed_switch.S */ 118900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* 119000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Handle a packed-switch or sparse-switch instruction. In both cases 119100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * we decode it and hand it off to a helper function. 119200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 119300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * We don't really expect backward branches in a switch statement, but 119400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * they're perfectly legal, so we check for them here. 119500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 119600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * for: packed-switch, sparse-switch 119700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 119800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* op vAA, +BBBBBBBB */ 119900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpDoPackedSwitch 1200db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze .extern MterpProfileBranch 120100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lh a0, 2(rPC) # a0 <- bbbb (lo) 120200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lh a1, 4(rPC) # a1 <- BBBB (hi) 120300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze srl a3, rINST, 8 # a3 <- AA 120400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ins a0, a1, 16, 16 # a0 <- BBBBbbbb 120500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG a1, a3 # a1 <- vAA 120600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dlsa a0, a0, rPC, 1 # a0 <- PC + BBBBbbbb*2 120700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jal MterpDoPackedSwitch # v0 <- code-unit branch offset 1208db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze move rINST, v0 1209db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze#if MTERP_PROFILE_BRANCHES 1210db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze EXPORT_PC 1211db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze move a0, rSELF 1212db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 1213db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze move a2, rINST 1214db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze jal MterpProfileBranch # (self, shadow_frame, offset) 1215db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze bnezc v0, MterpOnStackReplacement # Note: offset must be in rINST 121600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze#endif 1217db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze dlsa rPC, rINST, rPC, 1 # rPC <- rPC + offset * 2 1218db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze lw ra, THREAD_FLAGS_OFFSET(rSELF) # Preload flags for MterpCheckSuspendAndContinue 1219db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze move a0, rINST # a0 <- offset 1220db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze FETCH_INST # load rINST 1221db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze blez a0, MterpCheckSuspendAndContinue # suspend check if backwards branch 122200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_INST_OPCODE v0 # extract opcode from rINST 122300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GOTO_OPCODE v0 # jump to next instruction 122400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 122500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 122600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 122700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_sparse_switch: /* 0x2c */ 122800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_sparse_switch.S */ 122900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_packed_switch.S */ 123000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* 123100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Handle a packed-switch or sparse-switch instruction. In both cases 123200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * we decode it and hand it off to a helper function. 123300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 123400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * We don't really expect backward branches in a switch statement, but 123500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * they're perfectly legal, so we check for them here. 123600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 123700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * for: packed-switch, sparse-switch 123800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 123900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* op vAA, +BBBBBBBB */ 124000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpDoSparseSwitch 1241db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze .extern MterpProfileBranch 124200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lh a0, 2(rPC) # a0 <- bbbb (lo) 124300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lh a1, 4(rPC) # a1 <- BBBB (hi) 124400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze srl a3, rINST, 8 # a3 <- AA 124500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ins a0, a1, 16, 16 # a0 <- BBBBbbbb 124600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG a1, a3 # a1 <- vAA 124700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dlsa a0, a0, rPC, 1 # a0 <- PC + BBBBbbbb*2 124800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jal MterpDoSparseSwitch # v0 <- code-unit branch offset 1249db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze move rINST, v0 1250db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze#if MTERP_PROFILE_BRANCHES 1251db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze EXPORT_PC 1252db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze move a0, rSELF 1253db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 1254db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze move a2, rINST 1255db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze jal MterpProfileBranch # (self, shadow_frame, offset) 1256db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze bnezc v0, MterpOnStackReplacement # Note: offset must be in rINST 125700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze#endif 1258db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze dlsa rPC, rINST, rPC, 1 # rPC <- rPC + offset * 2 1259db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze lw ra, THREAD_FLAGS_OFFSET(rSELF) # Preload flags for MterpCheckSuspendAndContinue 1260db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze move a0, rINST # a0 <- offset 1261db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze FETCH_INST # load rINST 1262db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze blez a0, MterpCheckSuspendAndContinue # suspend check if backwards branch 126300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_INST_OPCODE v0 # extract opcode from rINST 126400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GOTO_OPCODE v0 # jump to next instruction 126500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 126600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 126700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 126800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 126900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_cmpl_float: /* 0x2d */ 127000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_cmpl_float.S */ 127100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/fcmp.S */ 127200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* 127300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Compare two floating-point values. Puts 0, 1, or -1 into the 127400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * destination register based on the results of the comparison. 127500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 127600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * For: cmpl-float, cmpg-float 127700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 127800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* op vAA, vBB, vCC */ 127900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze srl a4, rINST, 8 # a4 <- AA 128000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lbu a2, 2(rPC) # a2 <- BB 128100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lbu a3, 3(rPC) # a3 <- CC 128200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG_FLOAT f0, a2 # f0 <- vBB 128300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG_FLOAT f1, a3 # f1 <- vCC 128400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze cmp.eq.s f2, f0, f1 128500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze li a0, 0 128600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze bc1nez f2, 1f # done if vBB == vCC (ordered) 128700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .if 0 128800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze cmp.lt.s f2, f0, f1 128900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze li a0, -1 129000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze bc1nez f2, 1f # done if vBB < vCC (ordered) 129100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze li a0, 1 # vBB > vCC or unordered 129200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .else 129300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze cmp.lt.s f2, f1, f0 129400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze li a0, 1 129500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze bc1nez f2, 1f # done if vBB > vCC (ordered) 129600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze li a0, -1 # vBB < vCC or unordered 129700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .endif 129800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze1: 129900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze FETCH_ADVANCE_INST 2 # advance rPC, load rINST 130000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_INST_OPCODE v0 # extract opcode from rINST 130100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze SET_VREG a0, a4 # vAA <- a0 130200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GOTO_OPCODE v0 # jump to next instruction 130300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 130400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 130500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 130600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 130700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_cmpg_float: /* 0x2e */ 130800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_cmpg_float.S */ 130900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/fcmp.S */ 131000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* 131100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Compare two floating-point values. Puts 0, 1, or -1 into the 131200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * destination register based on the results of the comparison. 131300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 131400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * For: cmpl-float, cmpg-float 131500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 131600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* op vAA, vBB, vCC */ 131700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze srl a4, rINST, 8 # a4 <- AA 131800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lbu a2, 2(rPC) # a2 <- BB 131900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lbu a3, 3(rPC) # a3 <- CC 132000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG_FLOAT f0, a2 # f0 <- vBB 132100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG_FLOAT f1, a3 # f1 <- vCC 132200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze cmp.eq.s f2, f0, f1 132300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze li a0, 0 132400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze bc1nez f2, 1f # done if vBB == vCC (ordered) 132500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .if 1 132600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze cmp.lt.s f2, f0, f1 132700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze li a0, -1 132800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze bc1nez f2, 1f # done if vBB < vCC (ordered) 132900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze li a0, 1 # vBB > vCC or unordered 133000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .else 133100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze cmp.lt.s f2, f1, f0 133200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze li a0, 1 133300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze bc1nez f2, 1f # done if vBB > vCC (ordered) 133400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze li a0, -1 # vBB < vCC or unordered 133500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .endif 133600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze1: 133700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze FETCH_ADVANCE_INST 2 # advance rPC, load rINST 133800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_INST_OPCODE v0 # extract opcode from rINST 133900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze SET_VREG a0, a4 # vAA <- a0 134000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GOTO_OPCODE v0 # jump to next instruction 134100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 134200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 134300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 134400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 134500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_cmpl_double: /* 0x2f */ 134600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_cmpl_double.S */ 134700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/fcmpWide.S */ 134800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* 134900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Compare two floating-point values. Puts 0, 1, or -1 into the 135000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * destination register based on the results of the comparison. 135100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 135200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * For: cmpl-double, cmpg-double 135300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 135400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* op vAA, vBB, vCC */ 135500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze srl a4, rINST, 8 # a4 <- AA 135600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lbu a2, 2(rPC) # a2 <- BB 135700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lbu a3, 3(rPC) # a3 <- CC 135800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG_DOUBLE f0, a2 # f0 <- vBB 135900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG_DOUBLE f1, a3 # f1 <- vCC 136000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze cmp.eq.d f2, f0, f1 136100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze li a0, 0 136200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze bc1nez f2, 1f # done if vBB == vCC (ordered) 136300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .if 0 136400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze cmp.lt.d f2, f0, f1 136500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze li a0, -1 136600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze bc1nez f2, 1f # done if vBB < vCC (ordered) 136700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze li a0, 1 # vBB > vCC or unordered 136800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .else 136900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze cmp.lt.d f2, f1, f0 137000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze li a0, 1 137100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze bc1nez f2, 1f # done if vBB > vCC (ordered) 137200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze li a0, -1 # vBB < vCC or unordered 137300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .endif 137400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze1: 137500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze FETCH_ADVANCE_INST 2 # advance rPC, load rINST 137600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_INST_OPCODE v0 # extract opcode from rINST 137700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze SET_VREG a0, a4 # vAA <- a0 137800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GOTO_OPCODE v0 # jump to next instruction 137900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 138000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 138100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 138200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 138300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_cmpg_double: /* 0x30 */ 138400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_cmpg_double.S */ 138500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/fcmpWide.S */ 138600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* 138700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Compare two floating-point values. Puts 0, 1, or -1 into the 138800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * destination register based on the results of the comparison. 138900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 139000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * For: cmpl-double, cmpg-double 139100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 139200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* op vAA, vBB, vCC */ 139300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze srl a4, rINST, 8 # a4 <- AA 139400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lbu a2, 2(rPC) # a2 <- BB 139500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lbu a3, 3(rPC) # a3 <- CC 139600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG_DOUBLE f0, a2 # f0 <- vBB 139700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG_DOUBLE f1, a3 # f1 <- vCC 139800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze cmp.eq.d f2, f0, f1 139900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze li a0, 0 140000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze bc1nez f2, 1f # done if vBB == vCC (ordered) 140100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .if 1 140200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze cmp.lt.d f2, f0, f1 140300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze li a0, -1 140400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze bc1nez f2, 1f # done if vBB < vCC (ordered) 140500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze li a0, 1 # vBB > vCC or unordered 140600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .else 140700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze cmp.lt.d f2, f1, f0 140800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze li a0, 1 140900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze bc1nez f2, 1f # done if vBB > vCC (ordered) 141000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze li a0, -1 # vBB < vCC or unordered 141100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .endif 141200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze1: 141300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze FETCH_ADVANCE_INST 2 # advance rPC, load rINST 141400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_INST_OPCODE v0 # extract opcode from rINST 141500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze SET_VREG a0, a4 # vAA <- a0 141600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GOTO_OPCODE v0 # jump to next instruction 141700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 141800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 141900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 142000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 142100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_cmp_long: /* 0x31 */ 142200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_cmp_long.S */ 142300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* cmp-long vAA, vBB, vCC */ 142400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lbu a2, 2(rPC) # a2 <- BB 142500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lbu a3, 3(rPC) # a3 <- CC 142600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze srl a4, rINST, 8 # a4 <- AA 142700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG_WIDE a0, a2 # a0 <- vBB 142800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG_WIDE a1, a3 # a1 <- vCC 142900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze FETCH_ADVANCE_INST 2 # advance rPC, load rINST 143000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze slt a2, a0, a1 143100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze slt a0, a1, a0 143200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze subu a0, a0, a2 143300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_INST_OPCODE v0 # extract opcode from rINST 143400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze SET_VREG a0, a4 # vAA <- result 143500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GOTO_OPCODE v0 # jump to next instruction 143600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 143700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 143800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 143900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_if_eq: /* 0x32 */ 144000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_if_eq.S */ 144100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/bincmp.S */ 144200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* 144300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Generic two-operand compare-and-branch operation. Provide a "condition" 144400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * fragment that specifies the comparison to perform, e.g. for 144500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * "if-le" you would use "le". 144600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 144700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * For: if-eq, if-ne, if-lt, if-ge, if-gt, if-le 144800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 144900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* if-cmp vA, vB, +CCCC */ 1450db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze .extern MterpProfileBranch 145100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ext a2, rINST, 8, 4 # a2 <- A 145200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ext a3, rINST, 12, 4 # a3 <- B 1453db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze lh rINST, 2(rPC) # rINST <- offset (sign-extended CCCC) 145400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG a0, a2 # a0 <- vA 145500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG a1, a3 # a1 <- vB 145600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze beqc a0, a1, 1f 1457db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze li rINST, 2 # offset if branch not taken 145800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze1: 1459db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze#if MTERP_PROFILE_BRANCHES 1460db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze EXPORT_PC 1461db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze move a0, rSELF 1462db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 1463db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze move a2, rINST 1464db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze jal MterpProfileBranch # (self, shadow_frame, offset) 1465db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze bnezc v0, MterpOnStackReplacement # Note: offset must be in rINST 146600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze#endif 1467db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze dlsa rPC, rINST, rPC, 1 # rPC <- rPC + offset * 2 1468db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze lw ra, THREAD_FLAGS_OFFSET(rSELF) # Preload flags for MterpCheckSuspendAndContinue 1469db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze move a0, rINST # a0 <- offset 1470db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze FETCH_INST # load rINST 1471db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze bltz a0, MterpCheckSuspendAndContinue # suspend check if backwards branch 147200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_INST_OPCODE v0 # extract opcode from rINST 147300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GOTO_OPCODE v0 # jump to next instruction 147400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 147500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 147600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 147700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 147800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_if_ne: /* 0x33 */ 147900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_if_ne.S */ 148000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/bincmp.S */ 148100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* 148200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Generic two-operand compare-and-branch operation. Provide a "condition" 148300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * fragment that specifies the comparison to perform, e.g. for 148400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * "if-le" you would use "le". 148500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 148600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * For: if-eq, if-ne, if-lt, if-ge, if-gt, if-le 148700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 148800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* if-cmp vA, vB, +CCCC */ 1489db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze .extern MterpProfileBranch 149000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ext a2, rINST, 8, 4 # a2 <- A 149100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ext a3, rINST, 12, 4 # a3 <- B 1492db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze lh rINST, 2(rPC) # rINST <- offset (sign-extended CCCC) 149300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG a0, a2 # a0 <- vA 149400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG a1, a3 # a1 <- vB 149500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze bnec a0, a1, 1f 1496db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze li rINST, 2 # offset if branch not taken 149700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze1: 1498db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze#if MTERP_PROFILE_BRANCHES 1499db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze EXPORT_PC 1500db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze move a0, rSELF 1501db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 1502db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze move a2, rINST 1503db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze jal MterpProfileBranch # (self, shadow_frame, offset) 1504db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze bnezc v0, MterpOnStackReplacement # Note: offset must be in rINST 150500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze#endif 1506db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze dlsa rPC, rINST, rPC, 1 # rPC <- rPC + offset * 2 1507db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze lw ra, THREAD_FLAGS_OFFSET(rSELF) # Preload flags for MterpCheckSuspendAndContinue 1508db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze move a0, rINST # a0 <- offset 1509db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze FETCH_INST # load rINST 1510db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze bltz a0, MterpCheckSuspendAndContinue # suspend check if backwards branch 151100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_INST_OPCODE v0 # extract opcode from rINST 151200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GOTO_OPCODE v0 # jump to next instruction 151300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 151400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 151500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 151600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 151700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_if_lt: /* 0x34 */ 151800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_if_lt.S */ 151900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/bincmp.S */ 152000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* 152100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Generic two-operand compare-and-branch operation. Provide a "condition" 152200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * fragment that specifies the comparison to perform, e.g. for 152300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * "if-le" you would use "le". 152400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 152500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * For: if-eq, if-ne, if-lt, if-ge, if-gt, if-le 152600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 152700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* if-cmp vA, vB, +CCCC */ 1528db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze .extern MterpProfileBranch 152900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ext a2, rINST, 8, 4 # a2 <- A 153000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ext a3, rINST, 12, 4 # a3 <- B 1531db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze lh rINST, 2(rPC) # rINST <- offset (sign-extended CCCC) 153200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG a0, a2 # a0 <- vA 153300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG a1, a3 # a1 <- vB 153400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze bltc a0, a1, 1f 1535db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze li rINST, 2 # offset if branch not taken 153600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze1: 1537db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze#if MTERP_PROFILE_BRANCHES 1538db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze EXPORT_PC 1539db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze move a0, rSELF 1540db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 1541db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze move a2, rINST 1542db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze jal MterpProfileBranch # (self, shadow_frame, offset) 1543db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze bnezc v0, MterpOnStackReplacement # Note: offset must be in rINST 154400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze#endif 1545db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze dlsa rPC, rINST, rPC, 1 # rPC <- rPC + offset * 2 1546db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze lw ra, THREAD_FLAGS_OFFSET(rSELF) # Preload flags for MterpCheckSuspendAndContinue 1547db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze move a0, rINST # a0 <- offset 1548db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze FETCH_INST # load rINST 1549db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze bltz a0, MterpCheckSuspendAndContinue # suspend check if backwards branch 155000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_INST_OPCODE v0 # extract opcode from rINST 155100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GOTO_OPCODE v0 # jump to next instruction 155200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 155300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 155400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 155500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 155600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_if_ge: /* 0x35 */ 155700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_if_ge.S */ 155800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/bincmp.S */ 155900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* 156000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Generic two-operand compare-and-branch operation. Provide a "condition" 156100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * fragment that specifies the comparison to perform, e.g. for 156200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * "if-le" you would use "le". 156300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 156400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * For: if-eq, if-ne, if-lt, if-ge, if-gt, if-le 156500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 156600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* if-cmp vA, vB, +CCCC */ 1567db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze .extern MterpProfileBranch 156800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ext a2, rINST, 8, 4 # a2 <- A 156900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ext a3, rINST, 12, 4 # a3 <- B 1570db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze lh rINST, 2(rPC) # rINST <- offset (sign-extended CCCC) 157100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG a0, a2 # a0 <- vA 157200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG a1, a3 # a1 <- vB 157300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze bgec a0, a1, 1f 1574db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze li rINST, 2 # offset if branch not taken 157500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze1: 1576db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze#if MTERP_PROFILE_BRANCHES 1577db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze EXPORT_PC 1578db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze move a0, rSELF 1579db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 1580db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze move a2, rINST 1581db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze jal MterpProfileBranch # (self, shadow_frame, offset) 1582db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze bnezc v0, MterpOnStackReplacement # Note: offset must be in rINST 158300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze#endif 1584db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze dlsa rPC, rINST, rPC, 1 # rPC <- rPC + offset * 2 1585db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze lw ra, THREAD_FLAGS_OFFSET(rSELF) # Preload flags for MterpCheckSuspendAndContinue 1586db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze move a0, rINST # a0 <- offset 1587db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze FETCH_INST # load rINST 1588db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze bltz a0, MterpCheckSuspendAndContinue # suspend check if backwards branch 158900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_INST_OPCODE v0 # extract opcode from rINST 159000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GOTO_OPCODE v0 # jump to next instruction 159100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 159200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 159300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 159400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 159500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_if_gt: /* 0x36 */ 159600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_if_gt.S */ 159700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/bincmp.S */ 159800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* 159900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Generic two-operand compare-and-branch operation. Provide a "condition" 160000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * fragment that specifies the comparison to perform, e.g. for 160100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * "if-le" you would use "le". 160200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 160300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * For: if-eq, if-ne, if-lt, if-ge, if-gt, if-le 160400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 160500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* if-cmp vA, vB, +CCCC */ 1606db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze .extern MterpProfileBranch 160700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ext a2, rINST, 8, 4 # a2 <- A 160800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ext a3, rINST, 12, 4 # a3 <- B 1609db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze lh rINST, 2(rPC) # rINST <- offset (sign-extended CCCC) 161000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG a0, a2 # a0 <- vA 161100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG a1, a3 # a1 <- vB 161200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze bgtc a0, a1, 1f 1613db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze li rINST, 2 # offset if branch not taken 161400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze1: 1615db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze#if MTERP_PROFILE_BRANCHES 1616db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze EXPORT_PC 1617db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze move a0, rSELF 1618db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 1619db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze move a2, rINST 1620db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze jal MterpProfileBranch # (self, shadow_frame, offset) 1621db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze bnezc v0, MterpOnStackReplacement # Note: offset must be in rINST 162200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze#endif 1623db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze dlsa rPC, rINST, rPC, 1 # rPC <- rPC + offset * 2 1624db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze lw ra, THREAD_FLAGS_OFFSET(rSELF) # Preload flags for MterpCheckSuspendAndContinue 1625db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze move a0, rINST # a0 <- offset 1626db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze FETCH_INST # load rINST 1627db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze bltz a0, MterpCheckSuspendAndContinue # suspend check if backwards branch 162800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_INST_OPCODE v0 # extract opcode from rINST 162900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GOTO_OPCODE v0 # jump to next instruction 163000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 163100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 163200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 163300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 163400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_if_le: /* 0x37 */ 163500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_if_le.S */ 163600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/bincmp.S */ 163700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* 163800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Generic two-operand compare-and-branch operation. Provide a "condition" 163900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * fragment that specifies the comparison to perform, e.g. for 164000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * "if-le" you would use "le". 164100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 164200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * For: if-eq, if-ne, if-lt, if-ge, if-gt, if-le 164300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 164400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* if-cmp vA, vB, +CCCC */ 1645db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze .extern MterpProfileBranch 164600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ext a2, rINST, 8, 4 # a2 <- A 164700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ext a3, rINST, 12, 4 # a3 <- B 1648db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze lh rINST, 2(rPC) # rINST <- offset (sign-extended CCCC) 164900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG a0, a2 # a0 <- vA 165000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG a1, a3 # a1 <- vB 165100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze blec a0, a1, 1f 1652db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze li rINST, 2 # offset if branch not taken 165300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze1: 1654db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze#if MTERP_PROFILE_BRANCHES 1655db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze EXPORT_PC 1656db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze move a0, rSELF 1657db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 1658db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze move a2, rINST 1659db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze jal MterpProfileBranch # (self, shadow_frame, offset) 1660db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze bnezc v0, MterpOnStackReplacement # Note: offset must be in rINST 166100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze#endif 1662db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze dlsa rPC, rINST, rPC, 1 # rPC <- rPC + offset * 2 1663db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze lw ra, THREAD_FLAGS_OFFSET(rSELF) # Preload flags for MterpCheckSuspendAndContinue 1664db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze move a0, rINST # a0 <- offset 1665db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze FETCH_INST # load rINST 1666db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze bltz a0, MterpCheckSuspendAndContinue # suspend check if backwards branch 166700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_INST_OPCODE v0 # extract opcode from rINST 166800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GOTO_OPCODE v0 # jump to next instruction 166900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 167000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 167100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 167200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 167300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_if_eqz: /* 0x38 */ 167400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_if_eqz.S */ 167500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/zcmp.S */ 167600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* 167700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Generic one-operand compare-and-branch operation. Provide a "condition" 167800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * fragment that specifies the comparison to perform, e.g. for 167900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * "if-lez" you would use "le". 168000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 168100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * For: if-eqz, if-nez, if-ltz, if-gez, if-gtz, if-lez 168200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 168300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* if-cmp vAA, +BBBB */ 1684db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze .extern MterpProfileBranch 168500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze srl a2, rINST, 8 # a2 <- AA 1686db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze lh rINST, 2(rPC) # rINST <- offset (sign-extended BBBB) 168700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG a0, a2 # a0 <- vAA 168800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze beqzc a0, 1f 1689db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze li rINST, 2 # offset if branch not taken 169000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze1: 1691db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze#if MTERP_PROFILE_BRANCHES 1692db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze EXPORT_PC 1693db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze move a0, rSELF 1694db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 1695db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze move a2, rINST 1696db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze jal MterpProfileBranch # (self, shadow_frame, offset) 1697db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze bnezc v0, MterpOnStackReplacement # Note: offset must be in rINST 169800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze#endif 1699db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze dlsa rPC, rINST, rPC, 1 # rPC <- rPC + offset * 2 1700db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze lw ra, THREAD_FLAGS_OFFSET(rSELF) # Preload flags for MterpCheckSuspendAndContinue 1701db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze move a0, rINST # a0 <- offset 1702db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze FETCH_INST # load rINST 1703db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze bltz a0, MterpCheckSuspendAndContinue # suspend check if backwards branch 170400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_INST_OPCODE v0 # extract opcode from rINST 170500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GOTO_OPCODE v0 # jump to next instruction 170600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 170700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 170800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 170900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 171000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_if_nez: /* 0x39 */ 171100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_if_nez.S */ 171200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/zcmp.S */ 171300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* 171400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Generic one-operand compare-and-branch operation. Provide a "condition" 171500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * fragment that specifies the comparison to perform, e.g. for 171600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * "if-lez" you would use "le". 171700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 171800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * For: if-eqz, if-nez, if-ltz, if-gez, if-gtz, if-lez 171900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 172000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* if-cmp vAA, +BBBB */ 1721db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze .extern MterpProfileBranch 172200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze srl a2, rINST, 8 # a2 <- AA 1723db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze lh rINST, 2(rPC) # rINST <- offset (sign-extended BBBB) 172400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG a0, a2 # a0 <- vAA 172500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze bnezc a0, 1f 1726db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze li rINST, 2 # offset if branch not taken 172700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze1: 1728db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze#if MTERP_PROFILE_BRANCHES 1729db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze EXPORT_PC 1730db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze move a0, rSELF 1731db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 1732db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze move a2, rINST 1733db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze jal MterpProfileBranch # (self, shadow_frame, offset) 1734db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze bnezc v0, MterpOnStackReplacement # Note: offset must be in rINST 173500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze#endif 1736db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze dlsa rPC, rINST, rPC, 1 # rPC <- rPC + offset * 2 1737db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze lw ra, THREAD_FLAGS_OFFSET(rSELF) # Preload flags for MterpCheckSuspendAndContinue 1738db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze move a0, rINST # a0 <- offset 1739db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze FETCH_INST # load rINST 1740db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze bltz a0, MterpCheckSuspendAndContinue # suspend check if backwards branch 174100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_INST_OPCODE v0 # extract opcode from rINST 174200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GOTO_OPCODE v0 # jump to next instruction 174300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 174400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 174500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 174600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 174700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_if_ltz: /* 0x3a */ 174800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_if_ltz.S */ 174900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/zcmp.S */ 175000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* 175100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Generic one-operand compare-and-branch operation. Provide a "condition" 175200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * fragment that specifies the comparison to perform, e.g. for 175300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * "if-lez" you would use "le". 175400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 175500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * For: if-eqz, if-nez, if-ltz, if-gez, if-gtz, if-lez 175600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 175700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* if-cmp vAA, +BBBB */ 1758db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze .extern MterpProfileBranch 175900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze srl a2, rINST, 8 # a2 <- AA 1760db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze lh rINST, 2(rPC) # rINST <- offset (sign-extended BBBB) 176100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG a0, a2 # a0 <- vAA 176200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze bltzc a0, 1f 1763db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze li rINST, 2 # offset if branch not taken 176400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze1: 1765db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze#if MTERP_PROFILE_BRANCHES 1766db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze EXPORT_PC 1767db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze move a0, rSELF 1768db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 1769db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze move a2, rINST 1770db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze jal MterpProfileBranch # (self, shadow_frame, offset) 1771db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze bnezc v0, MterpOnStackReplacement # Note: offset must be in rINST 177200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze#endif 1773db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze dlsa rPC, rINST, rPC, 1 # rPC <- rPC + offset * 2 1774db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze lw ra, THREAD_FLAGS_OFFSET(rSELF) # Preload flags for MterpCheckSuspendAndContinue 1775db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze move a0, rINST # a0 <- offset 1776db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze FETCH_INST # load rINST 1777db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze bltz a0, MterpCheckSuspendAndContinue # suspend check if backwards branch 177800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_INST_OPCODE v0 # extract opcode from rINST 177900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GOTO_OPCODE v0 # jump to next instruction 178000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 178100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 178200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 178300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 178400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_if_gez: /* 0x3b */ 178500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_if_gez.S */ 178600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/zcmp.S */ 178700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* 178800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Generic one-operand compare-and-branch operation. Provide a "condition" 178900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * fragment that specifies the comparison to perform, e.g. for 179000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * "if-lez" you would use "le". 179100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 179200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * For: if-eqz, if-nez, if-ltz, if-gez, if-gtz, if-lez 179300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 179400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* if-cmp vAA, +BBBB */ 1795db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze .extern MterpProfileBranch 179600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze srl a2, rINST, 8 # a2 <- AA 1797db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze lh rINST, 2(rPC) # rINST <- offset (sign-extended BBBB) 179800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG a0, a2 # a0 <- vAA 179900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze bgezc a0, 1f 1800db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze li rINST, 2 # offset if branch not taken 180100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze1: 1802db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze#if MTERP_PROFILE_BRANCHES 1803db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze EXPORT_PC 1804db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze move a0, rSELF 1805db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 1806db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze move a2, rINST 1807db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze jal MterpProfileBranch # (self, shadow_frame, offset) 1808db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze bnezc v0, MterpOnStackReplacement # Note: offset must be in rINST 180900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze#endif 1810db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze dlsa rPC, rINST, rPC, 1 # rPC <- rPC + offset * 2 1811db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze lw ra, THREAD_FLAGS_OFFSET(rSELF) # Preload flags for MterpCheckSuspendAndContinue 1812db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze move a0, rINST # a0 <- offset 1813db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze FETCH_INST # load rINST 1814db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze bltz a0, MterpCheckSuspendAndContinue # suspend check if backwards branch 181500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_INST_OPCODE v0 # extract opcode from rINST 181600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GOTO_OPCODE v0 # jump to next instruction 181700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 181800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 181900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 182000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 182100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_if_gtz: /* 0x3c */ 182200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_if_gtz.S */ 182300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/zcmp.S */ 182400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* 182500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Generic one-operand compare-and-branch operation. Provide a "condition" 182600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * fragment that specifies the comparison to perform, e.g. for 182700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * "if-lez" you would use "le". 182800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 182900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * For: if-eqz, if-nez, if-ltz, if-gez, if-gtz, if-lez 183000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 183100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* if-cmp vAA, +BBBB */ 1832db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze .extern MterpProfileBranch 183300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze srl a2, rINST, 8 # a2 <- AA 1834db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze lh rINST, 2(rPC) # rINST <- offset (sign-extended BBBB) 183500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG a0, a2 # a0 <- vAA 183600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze bgtzc a0, 1f 1837db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze li rINST, 2 # offset if branch not taken 183800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze1: 1839db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze#if MTERP_PROFILE_BRANCHES 1840db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze EXPORT_PC 1841db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze move a0, rSELF 1842db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 1843db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze move a2, rINST 1844db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze jal MterpProfileBranch # (self, shadow_frame, offset) 1845db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze bnezc v0, MterpOnStackReplacement # Note: offset must be in rINST 184600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze#endif 1847db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze dlsa rPC, rINST, rPC, 1 # rPC <- rPC + offset * 2 1848db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze lw ra, THREAD_FLAGS_OFFSET(rSELF) # Preload flags for MterpCheckSuspendAndContinue 1849db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze move a0, rINST # a0 <- offset 1850db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze FETCH_INST # load rINST 1851db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze bltz a0, MterpCheckSuspendAndContinue # suspend check if backwards branch 185200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_INST_OPCODE v0 # extract opcode from rINST 185300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GOTO_OPCODE v0 # jump to next instruction 185400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 185500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 185600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 185700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 185800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_if_lez: /* 0x3d */ 185900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_if_lez.S */ 186000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/zcmp.S */ 186100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* 186200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Generic one-operand compare-and-branch operation. Provide a "condition" 186300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * fragment that specifies the comparison to perform, e.g. for 186400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * "if-lez" you would use "le". 186500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 186600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * For: if-eqz, if-nez, if-ltz, if-gez, if-gtz, if-lez 186700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 186800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* if-cmp vAA, +BBBB */ 1869db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze .extern MterpProfileBranch 187000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze srl a2, rINST, 8 # a2 <- AA 1871db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze lh rINST, 2(rPC) # rINST <- offset (sign-extended BBBB) 187200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG a0, a2 # a0 <- vAA 187300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze blezc a0, 1f 1874db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze li rINST, 2 # offset if branch not taken 187500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze1: 1876db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze#if MTERP_PROFILE_BRANCHES 1877db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze EXPORT_PC 1878db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze move a0, rSELF 1879db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 1880db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze move a2, rINST 1881db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze jal MterpProfileBranch # (self, shadow_frame, offset) 1882db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze bnezc v0, MterpOnStackReplacement # Note: offset must be in rINST 188300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze#endif 1884db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze dlsa rPC, rINST, rPC, 1 # rPC <- rPC + offset * 2 1885db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze lw ra, THREAD_FLAGS_OFFSET(rSELF) # Preload flags for MterpCheckSuspendAndContinue 1886db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze move a0, rINST # a0 <- offset 1887db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze FETCH_INST # load rINST 1888db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze bltz a0, MterpCheckSuspendAndContinue # suspend check if backwards branch 188900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_INST_OPCODE v0 # extract opcode from rINST 189000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GOTO_OPCODE v0 # jump to next instruction 189100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 189200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 189300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 189400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 189500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_unused_3e: /* 0x3e */ 189600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_unused_3e.S */ 189700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/unused.S */ 189800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 189900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Bail to reference interpreter to throw. 190000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 190100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze b MterpFallback 190200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 190300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 190400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 190500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 190600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_unused_3f: /* 0x3f */ 190700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_unused_3f.S */ 190800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/unused.S */ 190900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 191000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Bail to reference interpreter to throw. 191100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 191200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze b MterpFallback 191300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 191400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 191500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 191600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 191700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_unused_40: /* 0x40 */ 191800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_unused_40.S */ 191900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/unused.S */ 192000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 192100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Bail to reference interpreter to throw. 192200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 192300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze b MterpFallback 192400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 192500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 192600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 192700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 192800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_unused_41: /* 0x41 */ 192900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_unused_41.S */ 193000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/unused.S */ 193100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 193200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Bail to reference interpreter to throw. 193300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 193400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze b MterpFallback 193500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 193600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 193700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 193800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 193900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_unused_42: /* 0x42 */ 194000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_unused_42.S */ 194100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/unused.S */ 194200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 194300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Bail to reference interpreter to throw. 194400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 194500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze b MterpFallback 194600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 194700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 194800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 194900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 195000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_unused_43: /* 0x43 */ 195100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_unused_43.S */ 195200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/unused.S */ 195300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 195400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Bail to reference interpreter to throw. 195500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 195600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze b MterpFallback 195700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 195800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 195900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 196000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 196100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_aget: /* 0x44 */ 196200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_aget.S */ 196300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* 196400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Array get, 32 bits or less. vAA <- vBB[vCC]. 196500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 196600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * for: aget, aget-boolean, aget-byte, aget-char, aget-short 196700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 196800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * NOTE: assumes data offset for arrays is the same for all non-wide types. 196900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * If this changes, specialize. 197000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 197100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* op vAA, vBB, vCC */ 197200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lbu a2, 2(rPC) # a2 <- BB 197300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lbu a3, 3(rPC) # a3 <- CC 197400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze srl a4, rINST, 8 # a4 <- AA 197500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG_U a0, a2 # a0 <- vBB (array object) 197600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG a1, a3 # a1 <- vCC (requested index) 197700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze beqz a0, common_errNullObject # bail if null array object 197800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lw a3, MIRROR_ARRAY_LENGTH_OFFSET(a0) # a3 <- arrayObj->length 197900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .if 2 198000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze # [d]lsa does not support shift count of 0. 198100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dlsa a0, a1, a0, 2 # a0 <- arrayObj + index*width 198200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .else 198300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a0, a1, a0 # a0 <- arrayObj + index*width 198400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .endif 198500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze bgeu a1, a3, common_errArrayIndex # unsigned compare: index >= length, bail 198600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze FETCH_ADVANCE_INST 2 # advance rPC, load rINST 198700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lw a2, MIRROR_INT_ARRAY_DATA_OFFSET(a0) # a2 <- vBB[vCC] 198800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_INST_OPCODE v0 # extract opcode from rINST 198900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze SET_VREG a2, a4 # vAA <- a2 199000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GOTO_OPCODE v0 # jump to next instruction 199100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 199200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 199300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 199400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_aget_wide: /* 0x45 */ 199500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_aget_wide.S */ 199600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* 199700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Array get, 64 bits. vAA <- vBB[vCC]. 199800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 199900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 200000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* aget-wide vAA, vBB, vCC */ 200100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lbu a2, 2(rPC) # a2 <- BB 200200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lbu a3, 3(rPC) # a3 <- CC 200300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze srl a4, rINST, 8 # a4 <- AA 200400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG_U a0, a2 # a0 <- vBB (array object) 200500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG a1, a3 # a1 <- vCC (requested index) 200600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze beqz a0, common_errNullObject # bail if null array object 200700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lw a3, MIRROR_ARRAY_LENGTH_OFFSET(a0) # a3 <- arrayObj->length 200800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dlsa a0, a1, a0, 3 # a0 <- arrayObj + index*width 200900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze bgeu a1, a3, common_errArrayIndex # unsigned compare: index >= length, bail 201000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze FETCH_ADVANCE_INST 2 # advance rPC, load rINST 201100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lw a2, MIRROR_WIDE_ARRAY_DATA_OFFSET(a0) 201200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lw a3, (MIRROR_WIDE_ARRAY_DATA_OFFSET+4)(a0) 201300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dinsu a2, a3, 32, 32 # a2 <- vBB[vCC] 201400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_INST_OPCODE v0 # extract opcode from rINST 201500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze SET_VREG_WIDE a2, a4 # vAA <- a2 201600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GOTO_OPCODE v0 # jump to next instruction 201700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 201800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 201900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 202000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_aget_object: /* 0x46 */ 202100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_aget_object.S */ 202200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* 202300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Array object get. vAA <- vBB[vCC]. 202400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 202500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * for: aget-object 202600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 202700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* op vAA, vBB, vCC */ 202800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern artAGetObjectFromMterp 202900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lbu a2, 2(rPC) # a2 <- BB 203000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lbu a3, 3(rPC) # a3 <- CC 203100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 203200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG_U a0, a2 # a0 <- vBB (array object) 203300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG a1, a3 # a1 <- vCC (requested index) 203400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jal artAGetObjectFromMterp # (array, index) 203500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ld a1, THREAD_EXCEPTION_OFFSET(rSELF) 203600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze srl a4, rINST, 8 # a4 <- AA 203700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze PREFETCH_INST 2 203800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze bnez a1, MterpException 203900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze SET_VREG_OBJECT v0, a4 # vAA <- v0 204000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ADVANCE 2 204100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_INST_OPCODE v0 # extract opcode from rINST 204200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GOTO_OPCODE v0 # jump to next instruction 204300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 204400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 204500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 204600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_aget_boolean: /* 0x47 */ 204700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_aget_boolean.S */ 204800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_aget.S */ 204900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* 205000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Array get, 32 bits or less. vAA <- vBB[vCC]. 205100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 205200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * for: aget, aget-boolean, aget-byte, aget-char, aget-short 205300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 205400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * NOTE: assumes data offset for arrays is the same for all non-wide types. 205500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * If this changes, specialize. 205600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 205700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* op vAA, vBB, vCC */ 205800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lbu a2, 2(rPC) # a2 <- BB 205900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lbu a3, 3(rPC) # a3 <- CC 206000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze srl a4, rINST, 8 # a4 <- AA 206100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG_U a0, a2 # a0 <- vBB (array object) 206200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG a1, a3 # a1 <- vCC (requested index) 206300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze beqz a0, common_errNullObject # bail if null array object 206400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lw a3, MIRROR_ARRAY_LENGTH_OFFSET(a0) # a3 <- arrayObj->length 206500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .if 0 206600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze # [d]lsa does not support shift count of 0. 206700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dlsa a0, a1, a0, 0 # a0 <- arrayObj + index*width 206800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .else 206900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a0, a1, a0 # a0 <- arrayObj + index*width 207000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .endif 207100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze bgeu a1, a3, common_errArrayIndex # unsigned compare: index >= length, bail 207200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze FETCH_ADVANCE_INST 2 # advance rPC, load rINST 207300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lbu a2, MIRROR_BOOLEAN_ARRAY_DATA_OFFSET(a0) # a2 <- vBB[vCC] 207400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_INST_OPCODE v0 # extract opcode from rINST 207500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze SET_VREG a2, a4 # vAA <- a2 207600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GOTO_OPCODE v0 # jump to next instruction 207700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 207800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 207900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 208000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 208100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_aget_byte: /* 0x48 */ 208200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_aget_byte.S */ 208300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_aget.S */ 208400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* 208500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Array get, 32 bits or less. vAA <- vBB[vCC]. 208600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 208700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * for: aget, aget-boolean, aget-byte, aget-char, aget-short 208800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 208900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * NOTE: assumes data offset for arrays is the same for all non-wide types. 209000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * If this changes, specialize. 209100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 209200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* op vAA, vBB, vCC */ 209300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lbu a2, 2(rPC) # a2 <- BB 209400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lbu a3, 3(rPC) # a3 <- CC 209500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze srl a4, rINST, 8 # a4 <- AA 209600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG_U a0, a2 # a0 <- vBB (array object) 209700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG a1, a3 # a1 <- vCC (requested index) 209800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze beqz a0, common_errNullObject # bail if null array object 209900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lw a3, MIRROR_ARRAY_LENGTH_OFFSET(a0) # a3 <- arrayObj->length 210000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .if 0 210100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze # [d]lsa does not support shift count of 0. 210200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dlsa a0, a1, a0, 0 # a0 <- arrayObj + index*width 210300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .else 210400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a0, a1, a0 # a0 <- arrayObj + index*width 210500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .endif 210600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze bgeu a1, a3, common_errArrayIndex # unsigned compare: index >= length, bail 210700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze FETCH_ADVANCE_INST 2 # advance rPC, load rINST 210800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lb a2, MIRROR_BYTE_ARRAY_DATA_OFFSET(a0) # a2 <- vBB[vCC] 210900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_INST_OPCODE v0 # extract opcode from rINST 211000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze SET_VREG a2, a4 # vAA <- a2 211100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GOTO_OPCODE v0 # jump to next instruction 211200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 211300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 211400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 211500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 211600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_aget_char: /* 0x49 */ 211700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_aget_char.S */ 211800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_aget.S */ 211900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* 212000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Array get, 32 bits or less. vAA <- vBB[vCC]. 212100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 212200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * for: aget, aget-boolean, aget-byte, aget-char, aget-short 212300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 212400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * NOTE: assumes data offset for arrays is the same for all non-wide types. 212500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * If this changes, specialize. 212600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 212700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* op vAA, vBB, vCC */ 212800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lbu a2, 2(rPC) # a2 <- BB 212900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lbu a3, 3(rPC) # a3 <- CC 213000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze srl a4, rINST, 8 # a4 <- AA 213100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG_U a0, a2 # a0 <- vBB (array object) 213200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG a1, a3 # a1 <- vCC (requested index) 213300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze beqz a0, common_errNullObject # bail if null array object 213400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lw a3, MIRROR_ARRAY_LENGTH_OFFSET(a0) # a3 <- arrayObj->length 213500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .if 1 213600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze # [d]lsa does not support shift count of 0. 213700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dlsa a0, a1, a0, 1 # a0 <- arrayObj + index*width 213800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .else 213900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a0, a1, a0 # a0 <- arrayObj + index*width 214000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .endif 214100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze bgeu a1, a3, common_errArrayIndex # unsigned compare: index >= length, bail 214200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze FETCH_ADVANCE_INST 2 # advance rPC, load rINST 214300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lhu a2, MIRROR_CHAR_ARRAY_DATA_OFFSET(a0) # a2 <- vBB[vCC] 214400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_INST_OPCODE v0 # extract opcode from rINST 214500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze SET_VREG a2, a4 # vAA <- a2 214600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GOTO_OPCODE v0 # jump to next instruction 214700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 214800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 214900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 215000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 215100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_aget_short: /* 0x4a */ 215200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_aget_short.S */ 215300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_aget.S */ 215400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* 215500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Array get, 32 bits or less. vAA <- vBB[vCC]. 215600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 215700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * for: aget, aget-boolean, aget-byte, aget-char, aget-short 215800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 215900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * NOTE: assumes data offset for arrays is the same for all non-wide types. 216000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * If this changes, specialize. 216100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 216200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* op vAA, vBB, vCC */ 216300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lbu a2, 2(rPC) # a2 <- BB 216400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lbu a3, 3(rPC) # a3 <- CC 216500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze srl a4, rINST, 8 # a4 <- AA 216600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG_U a0, a2 # a0 <- vBB (array object) 216700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG a1, a3 # a1 <- vCC (requested index) 216800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze beqz a0, common_errNullObject # bail if null array object 216900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lw a3, MIRROR_ARRAY_LENGTH_OFFSET(a0) # a3 <- arrayObj->length 217000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .if 1 217100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze # [d]lsa does not support shift count of 0. 217200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dlsa a0, a1, a0, 1 # a0 <- arrayObj + index*width 217300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .else 217400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a0, a1, a0 # a0 <- arrayObj + index*width 217500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .endif 217600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze bgeu a1, a3, common_errArrayIndex # unsigned compare: index >= length, bail 217700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze FETCH_ADVANCE_INST 2 # advance rPC, load rINST 217800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lh a2, MIRROR_SHORT_ARRAY_DATA_OFFSET(a0) # a2 <- vBB[vCC] 217900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_INST_OPCODE v0 # extract opcode from rINST 218000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze SET_VREG a2, a4 # vAA <- a2 218100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GOTO_OPCODE v0 # jump to next instruction 218200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 218300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 218400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 218500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 218600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_aput: /* 0x4b */ 218700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_aput.S */ 218800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* 218900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Array put, 32 bits or less. vBB[vCC] <- vAA. 219000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 219100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * for: aput, aput-boolean, aput-byte, aput-char, aput-short 219200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 219300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * NOTE: this assumes data offset for arrays is the same for all non-wide types. 219400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * If this changes, specialize. 219500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 219600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* op vAA, vBB, vCC */ 219700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lbu a2, 2(rPC) # a2 <- BB 219800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lbu a3, 3(rPC) # a3 <- CC 219900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze srl a4, rINST, 8 # a4 <- AA 220000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG_U a0, a2 # a0 <- vBB (array object) 220100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG a1, a3 # a1 <- vCC (requested index) 220200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze beqz a0, common_errNullObject # bail if null array object 220300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lw a3, MIRROR_ARRAY_LENGTH_OFFSET(a0) # a3 <- arrayObj->length 220400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .if 2 220500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze # [d]lsa does not support shift count of 0. 220600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dlsa a0, a1, a0, 2 # a0 <- arrayObj + index*width 220700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .else 220800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a0, a1, a0 # a0 <- arrayObj + index*width 220900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .endif 221000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze bgeu a1, a3, common_errArrayIndex # unsigned compare: index >= length, bail 221100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze FETCH_ADVANCE_INST 2 # advance rPC, load rINST 221200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG a2, a4 # a2 <- vAA 221300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_INST_OPCODE v0 # extract opcode from rINST 221400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze sw a2, MIRROR_INT_ARRAY_DATA_OFFSET(a0) # vBB[vCC] <- a2 221500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GOTO_OPCODE v0 # jump to next instruction 221600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 221700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 221800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 221900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_aput_wide: /* 0x4c */ 222000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_aput_wide.S */ 222100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* 222200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Array put, 64 bits. vBB[vCC] <- vAA. 222300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 222400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 222500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* aput-wide vAA, vBB, vCC */ 222600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lbu a2, 2(rPC) # a2 <- BB 222700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lbu a3, 3(rPC) # a3 <- CC 222800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze srl a4, rINST, 8 # a4 <- AA 222900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG_U a0, a2 # a0 <- vBB (array object) 223000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG a1, a3 # a1 <- vCC (requested index) 223100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze beqz a0, common_errNullObject # bail if null array object 223200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lw a3, MIRROR_ARRAY_LENGTH_OFFSET(a0) # a3 <- arrayObj->length 223300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dlsa a0, a1, a0, 3 # a0 <- arrayObj + index*width 223400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze bgeu a1, a3, common_errArrayIndex # unsigned compare: index >= length, bail 223500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG_WIDE a2, a4 # a2 <- vAA 223600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze FETCH_ADVANCE_INST 2 # advance rPC, load rINST 223700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_INST_OPCODE v0 # extract opcode from rINST 223800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze sw a2, MIRROR_WIDE_ARRAY_DATA_OFFSET(a0) 223900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dsrl32 a2, a2, 0 224000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze sw a2, (MIRROR_WIDE_ARRAY_DATA_OFFSET+4)(a0) # vBB[vCC] <- a2 224100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GOTO_OPCODE v0 # jump to next instruction 224200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 224300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 224400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 224500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_aput_object: /* 0x4d */ 224600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_aput_object.S */ 224700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* 224800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Store an object into an array. vBB[vCC] <- vAA. 224900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 225000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* op vAA, vBB, vCC */ 225100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpAputObject 225200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 225300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a0, rFP, OFF_FP_SHADOWFRAME 225400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a1, rPC 225500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a2, rINST 225600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jal MterpAputObject 225700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze beqzc v0, MterpPossibleException 225800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze FETCH_ADVANCE_INST 2 # advance rPC, load rINST 225900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_INST_OPCODE v0 # extract opcode from rINST 226000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GOTO_OPCODE v0 # jump to next instruction 226100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 226200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 226300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 226400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_aput_boolean: /* 0x4e */ 226500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_aput_boolean.S */ 226600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_aput.S */ 226700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* 226800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Array put, 32 bits or less. vBB[vCC] <- vAA. 226900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 227000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * for: aput, aput-boolean, aput-byte, aput-char, aput-short 227100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 227200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * NOTE: this assumes data offset for arrays is the same for all non-wide types. 227300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * If this changes, specialize. 227400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 227500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* op vAA, vBB, vCC */ 227600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lbu a2, 2(rPC) # a2 <- BB 227700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lbu a3, 3(rPC) # a3 <- CC 227800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze srl a4, rINST, 8 # a4 <- AA 227900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG_U a0, a2 # a0 <- vBB (array object) 228000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG a1, a3 # a1 <- vCC (requested index) 228100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze beqz a0, common_errNullObject # bail if null array object 228200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lw a3, MIRROR_ARRAY_LENGTH_OFFSET(a0) # a3 <- arrayObj->length 228300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .if 0 228400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze # [d]lsa does not support shift count of 0. 228500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dlsa a0, a1, a0, 0 # a0 <- arrayObj + index*width 228600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .else 228700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a0, a1, a0 # a0 <- arrayObj + index*width 228800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .endif 228900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze bgeu a1, a3, common_errArrayIndex # unsigned compare: index >= length, bail 229000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze FETCH_ADVANCE_INST 2 # advance rPC, load rINST 229100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG a2, a4 # a2 <- vAA 229200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_INST_OPCODE v0 # extract opcode from rINST 229300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze sb a2, MIRROR_BOOLEAN_ARRAY_DATA_OFFSET(a0) # vBB[vCC] <- a2 229400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GOTO_OPCODE v0 # jump to next instruction 229500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 229600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 229700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 229800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 229900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_aput_byte: /* 0x4f */ 230000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_aput_byte.S */ 230100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_aput.S */ 230200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* 230300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Array put, 32 bits or less. vBB[vCC] <- vAA. 230400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 230500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * for: aput, aput-boolean, aput-byte, aput-char, aput-short 230600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 230700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * NOTE: this assumes data offset for arrays is the same for all non-wide types. 230800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * If this changes, specialize. 230900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 231000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* op vAA, vBB, vCC */ 231100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lbu a2, 2(rPC) # a2 <- BB 231200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lbu a3, 3(rPC) # a3 <- CC 231300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze srl a4, rINST, 8 # a4 <- AA 231400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG_U a0, a2 # a0 <- vBB (array object) 231500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG a1, a3 # a1 <- vCC (requested index) 231600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze beqz a0, common_errNullObject # bail if null array object 231700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lw a3, MIRROR_ARRAY_LENGTH_OFFSET(a0) # a3 <- arrayObj->length 231800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .if 0 231900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze # [d]lsa does not support shift count of 0. 232000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dlsa a0, a1, a0, 0 # a0 <- arrayObj + index*width 232100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .else 232200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a0, a1, a0 # a0 <- arrayObj + index*width 232300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .endif 232400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze bgeu a1, a3, common_errArrayIndex # unsigned compare: index >= length, bail 232500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze FETCH_ADVANCE_INST 2 # advance rPC, load rINST 232600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG a2, a4 # a2 <- vAA 232700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_INST_OPCODE v0 # extract opcode from rINST 232800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze sb a2, MIRROR_BYTE_ARRAY_DATA_OFFSET(a0) # vBB[vCC] <- a2 232900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GOTO_OPCODE v0 # jump to next instruction 233000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 233100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 233200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 233300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 233400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_aput_char: /* 0x50 */ 233500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_aput_char.S */ 233600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_aput.S */ 233700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* 233800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Array put, 32 bits or less. vBB[vCC] <- vAA. 233900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 234000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * for: aput, aput-boolean, aput-byte, aput-char, aput-short 234100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 234200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * NOTE: this assumes data offset for arrays is the same for all non-wide types. 234300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * If this changes, specialize. 234400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 234500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* op vAA, vBB, vCC */ 234600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lbu a2, 2(rPC) # a2 <- BB 234700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lbu a3, 3(rPC) # a3 <- CC 234800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze srl a4, rINST, 8 # a4 <- AA 234900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG_U a0, a2 # a0 <- vBB (array object) 235000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG a1, a3 # a1 <- vCC (requested index) 235100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze beqz a0, common_errNullObject # bail if null array object 235200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lw a3, MIRROR_ARRAY_LENGTH_OFFSET(a0) # a3 <- arrayObj->length 235300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .if 1 235400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze # [d]lsa does not support shift count of 0. 235500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dlsa a0, a1, a0, 1 # a0 <- arrayObj + index*width 235600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .else 235700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a0, a1, a0 # a0 <- arrayObj + index*width 235800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .endif 235900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze bgeu a1, a3, common_errArrayIndex # unsigned compare: index >= length, bail 236000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze FETCH_ADVANCE_INST 2 # advance rPC, load rINST 236100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG a2, a4 # a2 <- vAA 236200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_INST_OPCODE v0 # extract opcode from rINST 236300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze sh a2, MIRROR_CHAR_ARRAY_DATA_OFFSET(a0) # vBB[vCC] <- a2 236400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GOTO_OPCODE v0 # jump to next instruction 236500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 236600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 236700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 236800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 236900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_aput_short: /* 0x51 */ 237000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_aput_short.S */ 237100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_aput.S */ 237200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* 237300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Array put, 32 bits or less. vBB[vCC] <- vAA. 237400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 237500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * for: aput, aput-boolean, aput-byte, aput-char, aput-short 237600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 237700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * NOTE: this assumes data offset for arrays is the same for all non-wide types. 237800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * If this changes, specialize. 237900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 238000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* op vAA, vBB, vCC */ 238100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lbu a2, 2(rPC) # a2 <- BB 238200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lbu a3, 3(rPC) # a3 <- CC 238300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze srl a4, rINST, 8 # a4 <- AA 238400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG_U a0, a2 # a0 <- vBB (array object) 238500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG a1, a3 # a1 <- vCC (requested index) 238600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze beqz a0, common_errNullObject # bail if null array object 238700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lw a3, MIRROR_ARRAY_LENGTH_OFFSET(a0) # a3 <- arrayObj->length 238800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .if 1 238900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze # [d]lsa does not support shift count of 0. 239000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dlsa a0, a1, a0, 1 # a0 <- arrayObj + index*width 239100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .else 239200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a0, a1, a0 # a0 <- arrayObj + index*width 239300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .endif 239400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze bgeu a1, a3, common_errArrayIndex # unsigned compare: index >= length, bail 239500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze FETCH_ADVANCE_INST 2 # advance rPC, load rINST 239600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG a2, a4 # a2 <- vAA 239700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_INST_OPCODE v0 # extract opcode from rINST 239800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze sh a2, MIRROR_SHORT_ARRAY_DATA_OFFSET(a0) # vBB[vCC] <- a2 239900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GOTO_OPCODE v0 # jump to next instruction 240000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 240100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 240200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 240300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 240400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_iget: /* 0x52 */ 240500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_iget.S */ 240600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* 240700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * General instance field get. 240800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 240900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * for: iget, iget-object, iget-boolean, iget-byte, iget-char, iget-short 241000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 241100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern artGet32InstanceFromCode 241200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 241300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lhu a0, 2(rPC) # a0 <- field ref CCCC 241400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze srl a1, rINST, 12 # a1 <- B 241500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG_U a1, a1 # a1 <- fp[B], the object pointer 241600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ld a2, OFF_FP_METHOD(rFP) # a2 <- referrer 241700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a3, rSELF # a3 <- self 241800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jal artGet32InstanceFromCode 241900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ld a3, THREAD_EXCEPTION_OFFSET(rSELF) 242000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ext a2, rINST, 8, 4 # a2 <- A 242100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze PREFETCH_INST 2 242200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze bnez a3, MterpPossibleException # bail out 242300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .if 0 242400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze SET_VREG_OBJECT v0, a2 # fp[A] <- v0 242500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .else 242600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze SET_VREG v0, a2 # fp[A] <- v0 242700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .endif 242800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ADVANCE 2 242900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_INST_OPCODE v0 # extract opcode from rINST 243000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GOTO_OPCODE v0 # jump to next instruction 243100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 243200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 243300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 243400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_iget_wide: /* 0x53 */ 243500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_iget_wide.S */ 243600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* 243700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 64-bit instance field get. 243800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 243900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * for: iget-wide 244000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 244100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern artGet64InstanceFromCode 244200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 244300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lhu a0, 2(rPC) # a0 <- field ref CCCC 244400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze srl a1, rINST, 12 # a1 <- B 244500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG_U a1, a1 # a1 <- fp[B], the object pointer 244600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ld a2, OFF_FP_METHOD(rFP) # a2 <- referrer 244700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a3, rSELF # a3 <- self 244800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jal artGet64InstanceFromCode 244900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ld a3, THREAD_EXCEPTION_OFFSET(rSELF) 245000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ext a2, rINST, 8, 4 # a2 <- A 245100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze PREFETCH_INST 2 245200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze bnez a3, MterpPossibleException # bail out 245300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze SET_VREG_WIDE v0, a2 # fp[A] <- v0 245400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ADVANCE 2 245500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_INST_OPCODE v0 # extract opcode from rINST 245600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GOTO_OPCODE v0 # jump to next instruction 245700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 245800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 245900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 246000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_iget_object: /* 0x54 */ 246100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_iget_object.S */ 246200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_iget.S */ 246300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* 246400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * General instance field get. 246500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 246600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * for: iget, iget-object, iget-boolean, iget-byte, iget-char, iget-short 246700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 246800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern artGetObjInstanceFromCode 246900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 247000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lhu a0, 2(rPC) # a0 <- field ref CCCC 247100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze srl a1, rINST, 12 # a1 <- B 247200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG_U a1, a1 # a1 <- fp[B], the object pointer 247300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ld a2, OFF_FP_METHOD(rFP) # a2 <- referrer 247400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a3, rSELF # a3 <- self 247500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jal artGetObjInstanceFromCode 247600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ld a3, THREAD_EXCEPTION_OFFSET(rSELF) 247700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ext a2, rINST, 8, 4 # a2 <- A 247800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze PREFETCH_INST 2 247900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze bnez a3, MterpPossibleException # bail out 248000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .if 1 248100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze SET_VREG_OBJECT v0, a2 # fp[A] <- v0 248200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .else 248300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze SET_VREG v0, a2 # fp[A] <- v0 248400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .endif 248500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ADVANCE 2 248600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_INST_OPCODE v0 # extract opcode from rINST 248700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GOTO_OPCODE v0 # jump to next instruction 248800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 248900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 249000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 249100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 249200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_iget_boolean: /* 0x55 */ 249300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_iget_boolean.S */ 249400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_iget.S */ 249500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* 249600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * General instance field get. 249700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 249800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * for: iget, iget-object, iget-boolean, iget-byte, iget-char, iget-short 249900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 250000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern artGetBooleanInstanceFromCode 250100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 250200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lhu a0, 2(rPC) # a0 <- field ref CCCC 250300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze srl a1, rINST, 12 # a1 <- B 250400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG_U a1, a1 # a1 <- fp[B], the object pointer 250500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ld a2, OFF_FP_METHOD(rFP) # a2 <- referrer 250600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a3, rSELF # a3 <- self 250700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jal artGetBooleanInstanceFromCode 250800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ld a3, THREAD_EXCEPTION_OFFSET(rSELF) 250900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ext a2, rINST, 8, 4 # a2 <- A 251000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze PREFETCH_INST 2 251100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze bnez a3, MterpPossibleException # bail out 251200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .if 0 251300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze SET_VREG_OBJECT v0, a2 # fp[A] <- v0 251400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .else 251500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze SET_VREG v0, a2 # fp[A] <- v0 251600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .endif 251700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ADVANCE 2 251800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_INST_OPCODE v0 # extract opcode from rINST 251900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GOTO_OPCODE v0 # jump to next instruction 252000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 252100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 252200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 252300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 252400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_iget_byte: /* 0x56 */ 252500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_iget_byte.S */ 252600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_iget.S */ 252700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* 252800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * General instance field get. 252900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 253000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * for: iget, iget-object, iget-boolean, iget-byte, iget-char, iget-short 253100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 253200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern artGetByteInstanceFromCode 253300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 253400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lhu a0, 2(rPC) # a0 <- field ref CCCC 253500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze srl a1, rINST, 12 # a1 <- B 253600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG_U a1, a1 # a1 <- fp[B], the object pointer 253700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ld a2, OFF_FP_METHOD(rFP) # a2 <- referrer 253800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a3, rSELF # a3 <- self 253900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jal artGetByteInstanceFromCode 254000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ld a3, THREAD_EXCEPTION_OFFSET(rSELF) 254100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ext a2, rINST, 8, 4 # a2 <- A 254200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze PREFETCH_INST 2 254300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze bnez a3, MterpPossibleException # bail out 254400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .if 0 254500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze SET_VREG_OBJECT v0, a2 # fp[A] <- v0 254600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .else 254700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze SET_VREG v0, a2 # fp[A] <- v0 254800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .endif 254900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ADVANCE 2 255000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_INST_OPCODE v0 # extract opcode from rINST 255100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GOTO_OPCODE v0 # jump to next instruction 255200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 255300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 255400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 255500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 255600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_iget_char: /* 0x57 */ 255700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_iget_char.S */ 255800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_iget.S */ 255900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* 256000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * General instance field get. 256100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 256200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * for: iget, iget-object, iget-boolean, iget-byte, iget-char, iget-short 256300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 256400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern artGetCharInstanceFromCode 256500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 256600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lhu a0, 2(rPC) # a0 <- field ref CCCC 256700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze srl a1, rINST, 12 # a1 <- B 256800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG_U a1, a1 # a1 <- fp[B], the object pointer 256900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ld a2, OFF_FP_METHOD(rFP) # a2 <- referrer 257000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a3, rSELF # a3 <- self 257100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jal artGetCharInstanceFromCode 257200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ld a3, THREAD_EXCEPTION_OFFSET(rSELF) 257300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ext a2, rINST, 8, 4 # a2 <- A 257400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze PREFETCH_INST 2 257500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze bnez a3, MterpPossibleException # bail out 257600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .if 0 257700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze SET_VREG_OBJECT v0, a2 # fp[A] <- v0 257800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .else 257900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze SET_VREG v0, a2 # fp[A] <- v0 258000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .endif 258100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ADVANCE 2 258200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_INST_OPCODE v0 # extract opcode from rINST 258300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GOTO_OPCODE v0 # jump to next instruction 258400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 258500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 258600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 258700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 258800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_iget_short: /* 0x58 */ 258900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_iget_short.S */ 259000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_iget.S */ 259100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* 259200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * General instance field get. 259300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 259400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * for: iget, iget-object, iget-boolean, iget-byte, iget-char, iget-short 259500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 259600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern artGetShortInstanceFromCode 259700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 259800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lhu a0, 2(rPC) # a0 <- field ref CCCC 259900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze srl a1, rINST, 12 # a1 <- B 260000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG_U a1, a1 # a1 <- fp[B], the object pointer 260100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ld a2, OFF_FP_METHOD(rFP) # a2 <- referrer 260200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a3, rSELF # a3 <- self 260300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jal artGetShortInstanceFromCode 260400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ld a3, THREAD_EXCEPTION_OFFSET(rSELF) 260500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ext a2, rINST, 8, 4 # a2 <- A 260600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze PREFETCH_INST 2 260700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze bnez a3, MterpPossibleException # bail out 260800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .if 0 260900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze SET_VREG_OBJECT v0, a2 # fp[A] <- v0 261000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .else 261100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze SET_VREG v0, a2 # fp[A] <- v0 261200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .endif 261300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ADVANCE 2 261400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_INST_OPCODE v0 # extract opcode from rINST 261500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GOTO_OPCODE v0 # jump to next instruction 261600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 261700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 261800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 261900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 262000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_iput: /* 0x59 */ 262100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_iput.S */ 262200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* 262300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * General 32-bit instance field put. 262400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 262500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * for: iput, iput-boolean, iput-byte, iput-char, iput-short 262600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 262700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* op vA, vB, field//CCCC */ 262800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern artSet32InstanceFromMterp 262900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 263000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lhu a0, 2(rPC) # a0 <- field ref CCCC 263100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze srl a1, rINST, 12 # a1 <- B 263200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG_U a1, a1 # a1 <- fp[B], the object pointer 263300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ext a2, rINST, 8, 4 # a2 <- A 263400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG a2, a2 # a2 <- fp[A] 263500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ld a3, OFF_FP_METHOD(rFP) # a3 <- referrer 263600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze PREFETCH_INST 2 263700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jal artSet32InstanceFromMterp 263800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze bnez v0, MterpPossibleException # bail out 263900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ADVANCE 2 264000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_INST_OPCODE v0 # extract opcode from rINST 264100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GOTO_OPCODE v0 # jump to next instruction 264200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 264300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 264400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 264500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_iput_wide: /* 0x5a */ 264600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_iput_wide.S */ 264700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* iput-wide vA, vB, field//CCCC */ 264800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern artSet64InstanceFromMterp 264900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 265000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lhu a0, 2(rPC) # a0 <- field ref CCCC 265100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze srl a1, rINST, 12 # a1 <- B 265200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG_U a1, a1 # a1 <- fp[B], the object pointer 265300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ext a2, rINST, 8, 4 # a2 <- A 265400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dlsa a2, a2, rFP, 2 # a2 <- &fp[A] 265500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ld a3, OFF_FP_METHOD(rFP) # a3 <- referrer 265600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze PREFETCH_INST 2 265700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jal artSet64InstanceFromMterp 265800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze bnez v0, MterpPossibleException # bail out 265900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ADVANCE 2 266000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_INST_OPCODE v0 # extract opcode from rINST 266100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GOTO_OPCODE v0 # jump to next instruction 266200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 266300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 266400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 266500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_iput_object: /* 0x5b */ 266600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_iput_object.S */ 266700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpIputObject 266800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 266900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a0, rFP, OFF_FP_SHADOWFRAME 267000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a1, rPC 267100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a2, rINST 267200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a3, rSELF 267300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jal MterpIputObject 267400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze beqzc v0, MterpException 267500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze FETCH_ADVANCE_INST 2 # advance rPC, load rINST 267600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_INST_OPCODE v0 # extract opcode from rINST 267700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GOTO_OPCODE v0 # jump to next instruction 267800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 267900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 268000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 268100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_iput_boolean: /* 0x5c */ 268200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_iput_boolean.S */ 268300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_iput.S */ 268400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* 268500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * General 32-bit instance field put. 268600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 268700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * for: iput, iput-boolean, iput-byte, iput-char, iput-short 268800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 268900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* op vA, vB, field//CCCC */ 269000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern artSet8InstanceFromMterp 269100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 269200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lhu a0, 2(rPC) # a0 <- field ref CCCC 269300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze srl a1, rINST, 12 # a1 <- B 269400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG_U a1, a1 # a1 <- fp[B], the object pointer 269500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ext a2, rINST, 8, 4 # a2 <- A 269600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG a2, a2 # a2 <- fp[A] 269700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ld a3, OFF_FP_METHOD(rFP) # a3 <- referrer 269800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze PREFETCH_INST 2 269900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jal artSet8InstanceFromMterp 270000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze bnez v0, MterpPossibleException # bail out 270100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ADVANCE 2 270200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_INST_OPCODE v0 # extract opcode from rINST 270300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GOTO_OPCODE v0 # jump to next instruction 270400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 270500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 270600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 270700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 270800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_iput_byte: /* 0x5d */ 270900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_iput_byte.S */ 271000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_iput.S */ 271100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* 271200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * General 32-bit instance field put. 271300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 271400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * for: iput, iput-boolean, iput-byte, iput-char, iput-short 271500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 271600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* op vA, vB, field//CCCC */ 271700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern artSet8InstanceFromMterp 271800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 271900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lhu a0, 2(rPC) # a0 <- field ref CCCC 272000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze srl a1, rINST, 12 # a1 <- B 272100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG_U a1, a1 # a1 <- fp[B], the object pointer 272200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ext a2, rINST, 8, 4 # a2 <- A 272300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG a2, a2 # a2 <- fp[A] 272400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ld a3, OFF_FP_METHOD(rFP) # a3 <- referrer 272500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze PREFETCH_INST 2 272600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jal artSet8InstanceFromMterp 272700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze bnez v0, MterpPossibleException # bail out 272800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ADVANCE 2 272900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_INST_OPCODE v0 # extract opcode from rINST 273000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GOTO_OPCODE v0 # jump to next instruction 273100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 273200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 273300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 273400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 273500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_iput_char: /* 0x5e */ 273600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_iput_char.S */ 273700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_iput.S */ 273800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* 273900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * General 32-bit instance field put. 274000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 274100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * for: iput, iput-boolean, iput-byte, iput-char, iput-short 274200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 274300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* op vA, vB, field//CCCC */ 274400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern artSet16InstanceFromMterp 274500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 274600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lhu a0, 2(rPC) # a0 <- field ref CCCC 274700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze srl a1, rINST, 12 # a1 <- B 274800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG_U a1, a1 # a1 <- fp[B], the object pointer 274900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ext a2, rINST, 8, 4 # a2 <- A 275000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG a2, a2 # a2 <- fp[A] 275100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ld a3, OFF_FP_METHOD(rFP) # a3 <- referrer 275200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze PREFETCH_INST 2 275300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jal artSet16InstanceFromMterp 275400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze bnez v0, MterpPossibleException # bail out 275500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ADVANCE 2 275600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_INST_OPCODE v0 # extract opcode from rINST 275700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GOTO_OPCODE v0 # jump to next instruction 275800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 275900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 276000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 276100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 276200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_iput_short: /* 0x5f */ 276300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_iput_short.S */ 276400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_iput.S */ 276500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* 276600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * General 32-bit instance field put. 276700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 276800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * for: iput, iput-boolean, iput-byte, iput-char, iput-short 276900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 277000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* op vA, vB, field//CCCC */ 277100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern artSet16InstanceFromMterp 277200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 277300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lhu a0, 2(rPC) # a0 <- field ref CCCC 277400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze srl a1, rINST, 12 # a1 <- B 277500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG_U a1, a1 # a1 <- fp[B], the object pointer 277600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ext a2, rINST, 8, 4 # a2 <- A 277700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG a2, a2 # a2 <- fp[A] 277800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ld a3, OFF_FP_METHOD(rFP) # a3 <- referrer 277900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze PREFETCH_INST 2 278000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jal artSet16InstanceFromMterp 278100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze bnez v0, MterpPossibleException # bail out 278200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ADVANCE 2 278300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_INST_OPCODE v0 # extract opcode from rINST 278400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GOTO_OPCODE v0 # jump to next instruction 278500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 278600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 278700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 278800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 278900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_sget: /* 0x60 */ 279000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_sget.S */ 279100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* 279200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * General SGET handler wrapper. 279300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 279400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * for: sget, sget-object, sget-boolean, sget-byte, sget-char, sget-short 279500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 279600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* op vAA, field//BBBB */ 279700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern artGet32StaticFromCode 279800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 279900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lhu a0, 2(rPC) # a0 <- field ref BBBB 280000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ld a1, OFF_FP_METHOD(rFP) 280100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a2, rSELF 280200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jal artGet32StaticFromCode 280300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ld a3, THREAD_EXCEPTION_OFFSET(rSELF) 280400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze srl a2, rINST, 8 # a2 <- AA 280500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 280600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze PREFETCH_INST 2 280700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze bnez a3, MterpException # bail out 280800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .if 0 280900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze SET_VREG_OBJECT v0, a2 # fp[AA] <- v0 281000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .else 281100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze SET_VREG v0, a2 # fp[AA] <- v0 281200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .endif 281300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ADVANCE 2 281400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_INST_OPCODE v0 # extract opcode from rINST 281500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GOTO_OPCODE v0 281600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 281700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 281800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 281900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_sget_wide: /* 0x61 */ 282000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_sget_wide.S */ 282100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* 282200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * SGET_WIDE handler wrapper. 282300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 282400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 282500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* sget-wide vAA, field//BBBB */ 282600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern artGet64StaticFromCode 282700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 282800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lhu a0, 2(rPC) # a0 <- field ref BBBB 282900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ld a1, OFF_FP_METHOD(rFP) 283000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a2, rSELF 283100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jal artGet64StaticFromCode 283200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ld a3, THREAD_EXCEPTION_OFFSET(rSELF) 283300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze srl a4, rINST, 8 # a4 <- AA 283400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze bnez a3, MterpException # bail out 283500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze FETCH_ADVANCE_INST 2 # advance rPC, load rINST 283600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze SET_VREG_WIDE v0, a4 283700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_INST_OPCODE v0 # extract opcode from rINST 283800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GOTO_OPCODE v0 # jump to next instruction 283900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 284000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 284100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 284200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_sget_object: /* 0x62 */ 284300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_sget_object.S */ 284400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_sget.S */ 284500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* 284600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * General SGET handler wrapper. 284700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 284800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * for: sget, sget-object, sget-boolean, sget-byte, sget-char, sget-short 284900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 285000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* op vAA, field//BBBB */ 285100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern artGetObjStaticFromCode 285200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 285300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lhu a0, 2(rPC) # a0 <- field ref BBBB 285400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ld a1, OFF_FP_METHOD(rFP) 285500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a2, rSELF 285600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jal artGetObjStaticFromCode 285700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ld a3, THREAD_EXCEPTION_OFFSET(rSELF) 285800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze srl a2, rINST, 8 # a2 <- AA 285900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 286000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze PREFETCH_INST 2 286100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze bnez a3, MterpException # bail out 286200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .if 1 286300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze SET_VREG_OBJECT v0, a2 # fp[AA] <- v0 286400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .else 286500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze SET_VREG v0, a2 # fp[AA] <- v0 286600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .endif 286700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ADVANCE 2 286800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_INST_OPCODE v0 # extract opcode from rINST 286900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GOTO_OPCODE v0 287000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 287100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 287200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 287300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 287400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_sget_boolean: /* 0x63 */ 287500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_sget_boolean.S */ 287600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_sget.S */ 287700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* 287800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * General SGET handler wrapper. 287900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 288000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * for: sget, sget-object, sget-boolean, sget-byte, sget-char, sget-short 288100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 288200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* op vAA, field//BBBB */ 288300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern artGetBooleanStaticFromCode 288400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 288500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lhu a0, 2(rPC) # a0 <- field ref BBBB 288600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ld a1, OFF_FP_METHOD(rFP) 288700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a2, rSELF 288800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jal artGetBooleanStaticFromCode 288900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ld a3, THREAD_EXCEPTION_OFFSET(rSELF) 289000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze srl a2, rINST, 8 # a2 <- AA 289100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze and v0, v0, 0xff 289200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze PREFETCH_INST 2 289300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze bnez a3, MterpException # bail out 289400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .if 0 289500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze SET_VREG_OBJECT v0, a2 # fp[AA] <- v0 289600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .else 289700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze SET_VREG v0, a2 # fp[AA] <- v0 289800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .endif 289900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ADVANCE 2 290000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_INST_OPCODE v0 # extract opcode from rINST 290100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GOTO_OPCODE v0 290200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 290300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 290400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 290500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 290600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_sget_byte: /* 0x64 */ 290700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_sget_byte.S */ 290800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_sget.S */ 290900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* 291000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * General SGET handler wrapper. 291100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 291200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * for: sget, sget-object, sget-boolean, sget-byte, sget-char, sget-short 291300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 291400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* op vAA, field//BBBB */ 291500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern artGetByteStaticFromCode 291600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 291700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lhu a0, 2(rPC) # a0 <- field ref BBBB 291800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ld a1, OFF_FP_METHOD(rFP) 291900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a2, rSELF 292000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jal artGetByteStaticFromCode 292100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ld a3, THREAD_EXCEPTION_OFFSET(rSELF) 292200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze srl a2, rINST, 8 # a2 <- AA 292300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze seb v0, v0 292400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze PREFETCH_INST 2 292500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze bnez a3, MterpException # bail out 292600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .if 0 292700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze SET_VREG_OBJECT v0, a2 # fp[AA] <- v0 292800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .else 292900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze SET_VREG v0, a2 # fp[AA] <- v0 293000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .endif 293100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ADVANCE 2 293200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_INST_OPCODE v0 # extract opcode from rINST 293300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GOTO_OPCODE v0 293400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 293500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 293600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 293700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 293800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_sget_char: /* 0x65 */ 293900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_sget_char.S */ 294000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_sget.S */ 294100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* 294200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * General SGET handler wrapper. 294300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 294400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * for: sget, sget-object, sget-boolean, sget-byte, sget-char, sget-short 294500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 294600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* op vAA, field//BBBB */ 294700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern artGetCharStaticFromCode 294800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 294900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lhu a0, 2(rPC) # a0 <- field ref BBBB 295000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ld a1, OFF_FP_METHOD(rFP) 295100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a2, rSELF 295200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jal artGetCharStaticFromCode 295300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ld a3, THREAD_EXCEPTION_OFFSET(rSELF) 295400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze srl a2, rINST, 8 # a2 <- AA 295500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze and v0, v0, 0xffff 295600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze PREFETCH_INST 2 295700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze bnez a3, MterpException # bail out 295800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .if 0 295900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze SET_VREG_OBJECT v0, a2 # fp[AA] <- v0 296000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .else 296100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze SET_VREG v0, a2 # fp[AA] <- v0 296200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .endif 296300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ADVANCE 2 296400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_INST_OPCODE v0 # extract opcode from rINST 296500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GOTO_OPCODE v0 296600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 296700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 296800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 296900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 297000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_sget_short: /* 0x66 */ 297100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_sget_short.S */ 297200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_sget.S */ 297300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* 297400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * General SGET handler wrapper. 297500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 297600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * for: sget, sget-object, sget-boolean, sget-byte, sget-char, sget-short 297700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 297800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* op vAA, field//BBBB */ 297900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern artGetShortStaticFromCode 298000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 298100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lhu a0, 2(rPC) # a0 <- field ref BBBB 298200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ld a1, OFF_FP_METHOD(rFP) 298300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a2, rSELF 298400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jal artGetShortStaticFromCode 298500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ld a3, THREAD_EXCEPTION_OFFSET(rSELF) 298600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze srl a2, rINST, 8 # a2 <- AA 298700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze seh v0, v0 298800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze PREFETCH_INST 2 298900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze bnez a3, MterpException # bail out 299000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .if 0 299100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze SET_VREG_OBJECT v0, a2 # fp[AA] <- v0 299200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .else 299300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze SET_VREG v0, a2 # fp[AA] <- v0 299400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .endif 299500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ADVANCE 2 299600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_INST_OPCODE v0 # extract opcode from rINST 299700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GOTO_OPCODE v0 299800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 299900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 300000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 300100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 300200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_sput: /* 0x67 */ 300300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_sput.S */ 300400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* 300500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * General SPUT handler wrapper. 300600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 300700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * for: sput, sput-boolean, sput-byte, sput-char, sput-short 300800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 300900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* op vAA, field//BBBB */ 301000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern artSet32StaticFromCode 301100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 301200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lhu a0, 2(rPC) # a0 <- field ref BBBB 301300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze srl a3, rINST, 8 # a3 <- AA 301400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG a1, a3 # a1 <- fp[AA] 301500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ld a2, OFF_FP_METHOD(rFP) 301600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a3, rSELF 301700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze PREFETCH_INST 2 # Get next inst, but don't advance rPC 301800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jal artSet32StaticFromCode 301900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze bnezc v0, MterpException # 0 on success 302000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ADVANCE 2 # Past exception point - now advance rPC 302100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_INST_OPCODE v0 # extract opcode from rINST 302200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GOTO_OPCODE v0 # jump to next instruction 302300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 302400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 302500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 302600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_sput_wide: /* 0x68 */ 302700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_sput_wide.S */ 302800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* 302900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * SPUT_WIDE handler wrapper. 303000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 303100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 303200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* sput-wide vAA, field//BBBB */ 303300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern artSet64IndirectStaticFromMterp 303400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 303500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lhu a0, 2(rPC) # a0 <- field ref BBBB 303600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ld a1, OFF_FP_METHOD(rFP) 303700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze srl a2, rINST, 8 # a2 <- AA 303800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dlsa a2, a2, rFP, 2 303900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a3, rSELF 304000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze PREFETCH_INST 2 # Get next inst, but don't advance rPC 304100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jal artSet64IndirectStaticFromMterp 304200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze bnezc v0, MterpException # 0 on success, -1 on failure 304300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ADVANCE 2 # Past exception point - now advance rPC 304400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_INST_OPCODE v0 # extract opcode from rINST 304500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GOTO_OPCODE v0 # jump to next instruction 304600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 304700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 304800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 304900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_sput_object: /* 0x69 */ 305000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_sput_object.S */ 305100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpSputObject 305200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 305300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a0, rFP, OFF_FP_SHADOWFRAME 305400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a1, rPC 305500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a2, rINST 305600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a3, rSELF 305700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jal MterpSputObject 305800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze beqzc v0, MterpException 305900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze FETCH_ADVANCE_INST 2 # advance rPC, load rINST 306000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_INST_OPCODE v0 # extract opcode from rINST 306100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GOTO_OPCODE v0 # jump to next instruction 306200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 306300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 306400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 306500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_sput_boolean: /* 0x6a */ 306600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_sput_boolean.S */ 306700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_sput.S */ 306800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* 306900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * General SPUT handler wrapper. 307000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 307100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * for: sput, sput-boolean, sput-byte, sput-char, sput-short 307200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 307300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* op vAA, field//BBBB */ 307400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern artSet8StaticFromCode 307500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 307600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lhu a0, 2(rPC) # a0 <- field ref BBBB 307700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze srl a3, rINST, 8 # a3 <- AA 307800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG a1, a3 # a1 <- fp[AA] 307900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ld a2, OFF_FP_METHOD(rFP) 308000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a3, rSELF 308100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze PREFETCH_INST 2 # Get next inst, but don't advance rPC 308200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jal artSet8StaticFromCode 308300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze bnezc v0, MterpException # 0 on success 308400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ADVANCE 2 # Past exception point - now advance rPC 308500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_INST_OPCODE v0 # extract opcode from rINST 308600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GOTO_OPCODE v0 # jump to next instruction 308700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 308800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 308900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 309000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 309100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_sput_byte: /* 0x6b */ 309200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_sput_byte.S */ 309300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_sput.S */ 309400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* 309500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * General SPUT handler wrapper. 309600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 309700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * for: sput, sput-boolean, sput-byte, sput-char, sput-short 309800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 309900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* op vAA, field//BBBB */ 310000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern artSet8StaticFromCode 310100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 310200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lhu a0, 2(rPC) # a0 <- field ref BBBB 310300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze srl a3, rINST, 8 # a3 <- AA 310400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG a1, a3 # a1 <- fp[AA] 310500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ld a2, OFF_FP_METHOD(rFP) 310600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a3, rSELF 310700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze PREFETCH_INST 2 # Get next inst, but don't advance rPC 310800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jal artSet8StaticFromCode 310900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze bnezc v0, MterpException # 0 on success 311000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ADVANCE 2 # Past exception point - now advance rPC 311100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_INST_OPCODE v0 # extract opcode from rINST 311200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GOTO_OPCODE v0 # jump to next instruction 311300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 311400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 311500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 311600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 311700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_sput_char: /* 0x6c */ 311800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_sput_char.S */ 311900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_sput.S */ 312000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* 312100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * General SPUT handler wrapper. 312200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 312300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * for: sput, sput-boolean, sput-byte, sput-char, sput-short 312400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 312500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* op vAA, field//BBBB */ 312600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern artSet16StaticFromCode 312700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 312800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lhu a0, 2(rPC) # a0 <- field ref BBBB 312900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze srl a3, rINST, 8 # a3 <- AA 313000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG a1, a3 # a1 <- fp[AA] 313100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ld a2, OFF_FP_METHOD(rFP) 313200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a3, rSELF 313300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze PREFETCH_INST 2 # Get next inst, but don't advance rPC 313400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jal artSet16StaticFromCode 313500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze bnezc v0, MterpException # 0 on success 313600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ADVANCE 2 # Past exception point - now advance rPC 313700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_INST_OPCODE v0 # extract opcode from rINST 313800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GOTO_OPCODE v0 # jump to next instruction 313900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 314000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 314100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 314200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 314300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_sput_short: /* 0x6d */ 314400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_sput_short.S */ 314500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_sput.S */ 314600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* 314700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * General SPUT handler wrapper. 314800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 314900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * for: sput, sput-boolean, sput-byte, sput-char, sput-short 315000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 315100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* op vAA, field//BBBB */ 315200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern artSet16StaticFromCode 315300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 315400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lhu a0, 2(rPC) # a0 <- field ref BBBB 315500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze srl a3, rINST, 8 # a3 <- AA 315600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG a1, a3 # a1 <- fp[AA] 315700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ld a2, OFF_FP_METHOD(rFP) 315800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a3, rSELF 315900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze PREFETCH_INST 2 # Get next inst, but don't advance rPC 316000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jal artSet16StaticFromCode 316100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze bnezc v0, MterpException # 0 on success 316200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ADVANCE 2 # Past exception point - now advance rPC 316300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_INST_OPCODE v0 # extract opcode from rINST 316400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GOTO_OPCODE v0 # jump to next instruction 316500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 316600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 316700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 316800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 316900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_invoke_virtual: /* 0x6e */ 317000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_invoke_virtual.S */ 317100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/invoke.S */ 317200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* 317300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Generic invoke handler wrapper. 317400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 317500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* op vB, {vD, vE, vF, vG, vA}, class@CCCC */ 317600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* op {vCCCC..v(CCCC+AA-1)}, meth@BBBB */ 317700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpInvokeVirtual 3178db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze .extern MterpShouldSwitchInterpreters 317900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 318000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 318100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 318200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a2, rPC 318300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a3, rINST 318400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jal MterpInvokeVirtual 318500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze beqzc v0, MterpException 318600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze FETCH_ADVANCE_INST 3 3187db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze jal MterpShouldSwitchInterpreters 3188db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze bnezc v0, MterpFallback 318900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_INST_OPCODE v0 319000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GOTO_OPCODE v0 319100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 319200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* 319300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Handle a virtual method call. 319400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 319500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * for: invoke-virtual, invoke-virtual/range 319600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 319700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* op vB, {vD, vE, vF, vG, vA}, class@CCCC */ 319800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* op vAA, {vCCCC..v(CCCC+AA-1)}, meth@BBBB */ 319900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 320000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 320100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 320200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_invoke_super: /* 0x6f */ 320300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_invoke_super.S */ 320400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/invoke.S */ 320500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* 320600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Generic invoke handler wrapper. 320700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 320800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* op vB, {vD, vE, vF, vG, vA}, class@CCCC */ 320900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* op {vCCCC..v(CCCC+AA-1)}, meth@BBBB */ 321000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpInvokeSuper 3211db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze .extern MterpShouldSwitchInterpreters 321200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 321300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 321400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 321500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a2, rPC 321600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a3, rINST 321700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jal MterpInvokeSuper 321800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze beqzc v0, MterpException 321900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze FETCH_ADVANCE_INST 3 3220db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze jal MterpShouldSwitchInterpreters 3221db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze bnezc v0, MterpFallback 322200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_INST_OPCODE v0 322300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GOTO_OPCODE v0 322400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 322500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* 322600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Handle a "super" method call. 322700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 322800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * for: invoke-super, invoke-super/range 322900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 323000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* op vB, {vD, vE, vF, vG, vA}, class@CCCC */ 323100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* op vAA, {vCCCC..v(CCCC+AA-1)}, meth@BBBB */ 323200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 323300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 323400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 323500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_invoke_direct: /* 0x70 */ 323600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_invoke_direct.S */ 323700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/invoke.S */ 323800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* 323900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Generic invoke handler wrapper. 324000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 324100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* op vB, {vD, vE, vF, vG, vA}, class@CCCC */ 324200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* op {vCCCC..v(CCCC+AA-1)}, meth@BBBB */ 324300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpInvokeDirect 3244db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze .extern MterpShouldSwitchInterpreters 324500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 324600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 324700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 324800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a2, rPC 324900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a3, rINST 325000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jal MterpInvokeDirect 325100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze beqzc v0, MterpException 325200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze FETCH_ADVANCE_INST 3 3253db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze jal MterpShouldSwitchInterpreters 3254db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze bnezc v0, MterpFallback 325500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_INST_OPCODE v0 325600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GOTO_OPCODE v0 325700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 325800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 325900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 326000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 326100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_invoke_static: /* 0x71 */ 326200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_invoke_static.S */ 326300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/invoke.S */ 326400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* 326500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Generic invoke handler wrapper. 326600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 326700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* op vB, {vD, vE, vF, vG, vA}, class@CCCC */ 326800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* op {vCCCC..v(CCCC+AA-1)}, meth@BBBB */ 326900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpInvokeStatic 3270db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze .extern MterpShouldSwitchInterpreters 327100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 327200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 327300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 327400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a2, rPC 327500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a3, rINST 327600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jal MterpInvokeStatic 327700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze beqzc v0, MterpException 327800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze FETCH_ADVANCE_INST 3 3279db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze jal MterpShouldSwitchInterpreters 3280db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze bnezc v0, MterpFallback 328100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_INST_OPCODE v0 328200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GOTO_OPCODE v0 328300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 328400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 328500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 328600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 328700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_invoke_interface: /* 0x72 */ 328800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_invoke_interface.S */ 328900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/invoke.S */ 329000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* 329100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Generic invoke handler wrapper. 329200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 329300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* op vB, {vD, vE, vF, vG, vA}, class@CCCC */ 329400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* op {vCCCC..v(CCCC+AA-1)}, meth@BBBB */ 329500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpInvokeInterface 3296db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze .extern MterpShouldSwitchInterpreters 329700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 329800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 329900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 330000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a2, rPC 330100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a3, rINST 330200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jal MterpInvokeInterface 330300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze beqzc v0, MterpException 330400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze FETCH_ADVANCE_INST 3 3305db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze jal MterpShouldSwitchInterpreters 3306db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze bnezc v0, MterpFallback 330700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_INST_OPCODE v0 330800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GOTO_OPCODE v0 330900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 331000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* 331100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Handle an interface method call. 331200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 331300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * for: invoke-interface, invoke-interface/range 331400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 331500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* op vB, {vD, vE, vF, vG, vA}, class@CCCC */ 331600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* op {vCCCC..v(CCCC+AA-1)}, meth@BBBB */ 331700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 331800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 331900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 332000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_return_void_no_barrier: /* 0x73 */ 332100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_return_void_no_barrier.S */ 332200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpSuspendCheck 332300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lw ra, THREAD_FLAGS_OFFSET(rSELF) 332400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 332500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze and ra, ra, (THREAD_SUSPEND_REQUEST | THREAD_CHECKPOINT_REQUEST) 332600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze beqzc ra, 1f 332700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jal MterpSuspendCheck # (self) 332800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze1: 332900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze li a0, 0 333000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze b MterpReturn 333100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 333200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 333300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 333400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_invoke_virtual_range: /* 0x74 */ 333500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_invoke_virtual_range.S */ 333600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/invoke.S */ 333700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* 333800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Generic invoke handler wrapper. 333900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 334000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* op vB, {vD, vE, vF, vG, vA}, class@CCCC */ 334100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* op {vCCCC..v(CCCC+AA-1)}, meth@BBBB */ 334200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpInvokeVirtualRange 3343db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze .extern MterpShouldSwitchInterpreters 334400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 334500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 334600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 334700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a2, rPC 334800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a3, rINST 334900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jal MterpInvokeVirtualRange 335000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze beqzc v0, MterpException 335100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze FETCH_ADVANCE_INST 3 3352db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze jal MterpShouldSwitchInterpreters 3353db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze bnezc v0, MterpFallback 335400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_INST_OPCODE v0 335500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GOTO_OPCODE v0 335600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 335700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 335800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 335900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 336000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_invoke_super_range: /* 0x75 */ 336100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_invoke_super_range.S */ 336200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/invoke.S */ 336300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* 336400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Generic invoke handler wrapper. 336500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 336600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* op vB, {vD, vE, vF, vG, vA}, class@CCCC */ 336700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* op {vCCCC..v(CCCC+AA-1)}, meth@BBBB */ 336800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpInvokeSuperRange 3369db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze .extern MterpShouldSwitchInterpreters 337000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 337100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 337200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 337300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a2, rPC 337400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a3, rINST 337500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jal MterpInvokeSuperRange 337600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze beqzc v0, MterpException 337700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze FETCH_ADVANCE_INST 3 3378db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze jal MterpShouldSwitchInterpreters 3379db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze bnezc v0, MterpFallback 338000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_INST_OPCODE v0 338100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GOTO_OPCODE v0 338200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 338300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 338400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 338500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 338600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_invoke_direct_range: /* 0x76 */ 338700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_invoke_direct_range.S */ 338800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/invoke.S */ 338900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* 339000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Generic invoke handler wrapper. 339100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 339200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* op vB, {vD, vE, vF, vG, vA}, class@CCCC */ 339300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* op {vCCCC..v(CCCC+AA-1)}, meth@BBBB */ 339400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpInvokeDirectRange 3395db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze .extern MterpShouldSwitchInterpreters 339600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 339700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 339800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 339900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a2, rPC 340000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a3, rINST 340100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jal MterpInvokeDirectRange 340200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze beqzc v0, MterpException 340300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze FETCH_ADVANCE_INST 3 3404db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze jal MterpShouldSwitchInterpreters 3405db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze bnezc v0, MterpFallback 340600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_INST_OPCODE v0 340700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GOTO_OPCODE v0 340800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 340900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 341000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 341100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 341200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_invoke_static_range: /* 0x77 */ 341300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_invoke_static_range.S */ 341400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/invoke.S */ 341500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* 341600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Generic invoke handler wrapper. 341700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 341800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* op vB, {vD, vE, vF, vG, vA}, class@CCCC */ 341900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* op {vCCCC..v(CCCC+AA-1)}, meth@BBBB */ 342000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpInvokeStaticRange 3421db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze .extern MterpShouldSwitchInterpreters 342200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 342300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 342400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 342500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a2, rPC 342600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a3, rINST 342700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jal MterpInvokeStaticRange 342800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze beqzc v0, MterpException 342900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze FETCH_ADVANCE_INST 3 3430db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze jal MterpShouldSwitchInterpreters 3431db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze bnezc v0, MterpFallback 343200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_INST_OPCODE v0 343300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GOTO_OPCODE v0 343400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 343500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 343600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 343700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 343800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_invoke_interface_range: /* 0x78 */ 343900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_invoke_interface_range.S */ 344000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/invoke.S */ 344100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* 344200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Generic invoke handler wrapper. 344300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 344400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* op vB, {vD, vE, vF, vG, vA}, class@CCCC */ 344500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* op {vCCCC..v(CCCC+AA-1)}, meth@BBBB */ 344600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpInvokeInterfaceRange 3447db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze .extern MterpShouldSwitchInterpreters 344800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 344900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 345000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 345100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a2, rPC 345200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a3, rINST 345300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jal MterpInvokeInterfaceRange 345400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze beqzc v0, MterpException 345500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze FETCH_ADVANCE_INST 3 3456db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze jal MterpShouldSwitchInterpreters 3457db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze bnezc v0, MterpFallback 345800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_INST_OPCODE v0 345900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GOTO_OPCODE v0 346000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 346100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 346200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 346300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 346400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_unused_79: /* 0x79 */ 346500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_unused_79.S */ 346600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/unused.S */ 346700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 346800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Bail to reference interpreter to throw. 346900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 347000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze b MterpFallback 347100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 347200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 347300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 347400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 347500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_unused_7a: /* 0x7a */ 347600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_unused_7a.S */ 347700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/unused.S */ 347800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 347900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Bail to reference interpreter to throw. 348000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 348100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze b MterpFallback 348200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 348300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 348400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 348500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 348600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_neg_int: /* 0x7b */ 348700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_neg_int.S */ 348800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/unop.S */ 348900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* 349000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Generic 32-bit unary operation. Provide an "instr" line that 349100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * specifies an instruction that performs "a0 = op a0". 349200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 349300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * for: int-to-byte, int-to-char, int-to-short, 349400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * not-int, neg-int 349500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 349600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* unop vA, vB */ 349700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ext a3, rINST, 12, 4 # a3 <- B 349800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG a0, a3 # a0 <- vB 349900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ext a2, rINST, 8, 4 # a2 <- A 350000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze # optional op 350100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze FETCH_ADVANCE_INST 1 # advance rPC, load rINST 350200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze subu a0, zero, a0 # a0 <- op, a0-a3 changed 350300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_INST_OPCODE v0 # extract opcode from rINST 350400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze SET_VREG a0, a2 # vA <- a0 350500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GOTO_OPCODE v0 # jump to next instruction 350600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 350700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 350800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 350900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 351000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_not_int: /* 0x7c */ 351100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_not_int.S */ 351200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/unop.S */ 351300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* 351400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Generic 32-bit unary operation. Provide an "instr" line that 351500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * specifies an instruction that performs "a0 = op a0". 351600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 351700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * for: int-to-byte, int-to-char, int-to-short, 351800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * not-int, neg-int 351900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 352000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* unop vA, vB */ 352100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ext a3, rINST, 12, 4 # a3 <- B 352200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG a0, a3 # a0 <- vB 352300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ext a2, rINST, 8, 4 # a2 <- A 352400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze # optional op 352500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze FETCH_ADVANCE_INST 1 # advance rPC, load rINST 352600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze nor a0, zero, a0 # a0 <- op, a0-a3 changed 352700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_INST_OPCODE v0 # extract opcode from rINST 352800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze SET_VREG a0, a2 # vA <- a0 352900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GOTO_OPCODE v0 # jump to next instruction 353000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 353100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 353200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 353300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 353400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_neg_long: /* 0x7d */ 353500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_neg_long.S */ 353600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/unopWide.S */ 353700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* 353800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Generic 64-bit unary operation. Provide an "instr" line that 353900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * specifies an instruction that performs "a0 = op a0". 354000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 354100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * For: not-long, neg-long 354200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 354300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* unop vA, vB */ 354400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ext a3, rINST, 12, 4 # a3 <- B 354500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG_WIDE a0, a3 # a0 <- vB 354600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ext a2, rINST, 8, 4 # a2 <- A 354700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze # optional op 354800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze FETCH_ADVANCE_INST 1 # advance rPC, load rINST 354900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dsubu a0, zero, a0 # a0 <- op, a0-a3 changed 355000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_INST_OPCODE v0 # extract opcode from rINST 355100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze SET_VREG_WIDE a0, a2 # vA <- a0 355200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GOTO_OPCODE v0 # jump to next instruction 355300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 355400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 355500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 355600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 355700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_not_long: /* 0x7e */ 355800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_not_long.S */ 355900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/unopWide.S */ 356000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* 356100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Generic 64-bit unary operation. Provide an "instr" line that 356200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * specifies an instruction that performs "a0 = op a0". 356300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 356400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * For: not-long, neg-long 356500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 356600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* unop vA, vB */ 356700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ext a3, rINST, 12, 4 # a3 <- B 356800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG_WIDE a0, a3 # a0 <- vB 356900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ext a2, rINST, 8, 4 # a2 <- A 357000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze # optional op 357100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze FETCH_ADVANCE_INST 1 # advance rPC, load rINST 357200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze nor a0, zero, a0 # a0 <- op, a0-a3 changed 357300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_INST_OPCODE v0 # extract opcode from rINST 357400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze SET_VREG_WIDE a0, a2 # vA <- a0 357500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GOTO_OPCODE v0 # jump to next instruction 357600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 357700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 357800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 357900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 358000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_neg_float: /* 0x7f */ 358100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_neg_float.S */ 358200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/fcvtHeader.S */ 358300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* 358400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Loads a specified register from vB. Used primarily for conversions 358500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * from or to a floating-point type. 358600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 358700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Sets up a1 = A and a2 = B. a2 is later used by fcvtFooter.S to 358800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * store the result in vA and jump to the next instruction. 358900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 359000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * For: int-to-float, int-to-double, long-to-float, long-to-double, 359100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * float-to-int, float-to-long, float-to-double, double-to-int, 359200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * double-to-long, double-to-float, neg-float, neg-double. 359300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 359400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ext a1, rINST, 8, 4 # a1 <- A 359500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze srl a2, rINST, 12 # a2 <- B 359600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG_FLOAT f0, a2 359700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze FETCH_ADVANCE_INST 1 # advance rPC, load rINST 359800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 359900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze neg.s f0, f0 360000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/fcvtFooter.S */ 360100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* 360200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Stores a specified register containing the result of conversion 360300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * from or to a floating-point type and jumps to the next instruction. 360400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 360500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Expects a1 to contain the destination Dalvik register number. 360600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * a1 is set up by fcvtHeader.S. 360700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 360800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * For: int-to-float, int-to-double, long-to-float, long-to-double, 360900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * float-to-int, float-to-long, float-to-double, double-to-int, 361000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * double-to-long, double-to-float, neg-float, neg-double. 361100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 361200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Note that this file can't be included after a break in other files 361300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * and in those files its contents appear as a copy. 361400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * See: float-to-int, float-to-long, double-to-int, double-to-long. 361500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 361600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_INST_OPCODE v0 # extract opcode from rINST 361700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze SET_VREG_FLOAT f0, a1 361800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GOTO_OPCODE v0 # jump to next instruction 361900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 362000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 362100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 362200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 362300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_neg_double: /* 0x80 */ 362400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_neg_double.S */ 362500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/fcvtHeader.S */ 362600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* 362700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Loads a specified register from vB. Used primarily for conversions 362800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * from or to a floating-point type. 362900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 363000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Sets up a1 = A and a2 = B. a2 is later used by fcvtFooter.S to 363100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * store the result in vA and jump to the next instruction. 363200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 363300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * For: int-to-float, int-to-double, long-to-float, long-to-double, 363400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * float-to-int, float-to-long, float-to-double, double-to-int, 363500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * double-to-long, double-to-float, neg-float, neg-double. 363600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 363700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ext a1, rINST, 8, 4 # a1 <- A 363800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze srl a2, rINST, 12 # a2 <- B 363900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG_DOUBLE f0, a2 364000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze FETCH_ADVANCE_INST 1 # advance rPC, load rINST 364100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 364200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze neg.d f0, f0 364300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/fcvtFooter.S */ 364400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* 364500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Stores a specified register containing the result of conversion 364600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * from or to a floating-point type and jumps to the next instruction. 364700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 364800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Expects a1 to contain the destination Dalvik register number. 364900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * a1 is set up by fcvtHeader.S. 365000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 365100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * For: int-to-float, int-to-double, long-to-float, long-to-double, 365200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * float-to-int, float-to-long, float-to-double, double-to-int, 365300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * double-to-long, double-to-float, neg-float, neg-double. 365400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 365500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Note that this file can't be included after a break in other files 365600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * and in those files its contents appear as a copy. 365700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * See: float-to-int, float-to-long, double-to-int, double-to-long. 365800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 365900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_INST_OPCODE v0 # extract opcode from rINST 366000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze SET_VREG_DOUBLE f0, a1 366100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GOTO_OPCODE v0 # jump to next instruction 366200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 366300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 366400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 366500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 366600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_int_to_long: /* 0x81 */ 366700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_int_to_long.S */ 366800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* int-to-long vA, vB */ 366900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ext a3, rINST, 12, 4 # a3 <- B 367000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG a0, a3 # a0 <- vB (sign-extended to 64 bits) 367100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ext a2, rINST, 8, 4 # a2 <- A 367200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze FETCH_ADVANCE_INST 1 # advance rPC, load rINST 367300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_INST_OPCODE v0 # extract opcode from rINST 367400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze SET_VREG_WIDE a0, a2 # vA <- vB 367500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GOTO_OPCODE v0 # jump to next instruction 367600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 367700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 367800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 367900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_int_to_float: /* 0x82 */ 368000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_int_to_float.S */ 368100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* 368200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Conversion from or to floating-point happens in a floating-point register. 368300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Therefore we load the input and store the output into or from a 368400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * floating-point register irrespective of the type. 368500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 368600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/fcvtHeader.S */ 368700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* 368800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Loads a specified register from vB. Used primarily for conversions 368900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * from or to a floating-point type. 369000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 369100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Sets up a1 = A and a2 = B. a2 is later used by fcvtFooter.S to 369200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * store the result in vA and jump to the next instruction. 369300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 369400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * For: int-to-float, int-to-double, long-to-float, long-to-double, 369500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * float-to-int, float-to-long, float-to-double, double-to-int, 369600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * double-to-long, double-to-float, neg-float, neg-double. 369700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 369800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ext a1, rINST, 8, 4 # a1 <- A 369900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze srl a2, rINST, 12 # a2 <- B 370000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG_FLOAT f0, a2 370100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze FETCH_ADVANCE_INST 1 # advance rPC, load rINST 370200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 370300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze cvt.s.w f0, f0 370400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/fcvtFooter.S */ 370500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* 370600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Stores a specified register containing the result of conversion 370700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * from or to a floating-point type and jumps to the next instruction. 370800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 370900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Expects a1 to contain the destination Dalvik register number. 371000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * a1 is set up by fcvtHeader.S. 371100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 371200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * For: int-to-float, int-to-double, long-to-float, long-to-double, 371300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * float-to-int, float-to-long, float-to-double, double-to-int, 371400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * double-to-long, double-to-float, neg-float, neg-double. 371500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 371600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Note that this file can't be included after a break in other files 371700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * and in those files its contents appear as a copy. 371800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * See: float-to-int, float-to-long, double-to-int, double-to-long. 371900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 372000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_INST_OPCODE v0 # extract opcode from rINST 372100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze SET_VREG_FLOAT f0, a1 372200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GOTO_OPCODE v0 # jump to next instruction 372300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 372400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 372500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 372600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 372700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_int_to_double: /* 0x83 */ 372800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_int_to_double.S */ 372900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* 373000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Conversion from or to floating-point happens in a floating-point register. 373100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Therefore we load the input and store the output into or from a 373200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * floating-point register irrespective of the type. 373300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 373400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/fcvtHeader.S */ 373500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* 373600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Loads a specified register from vB. Used primarily for conversions 373700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * from or to a floating-point type. 373800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 373900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Sets up a1 = A and a2 = B. a2 is later used by fcvtFooter.S to 374000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * store the result in vA and jump to the next instruction. 374100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 374200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * For: int-to-float, int-to-double, long-to-float, long-to-double, 374300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * float-to-int, float-to-long, float-to-double, double-to-int, 374400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * double-to-long, double-to-float, neg-float, neg-double. 374500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 374600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ext a1, rINST, 8, 4 # a1 <- A 374700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze srl a2, rINST, 12 # a2 <- B 374800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG_FLOAT f0, a2 374900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze FETCH_ADVANCE_INST 1 # advance rPC, load rINST 375000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 375100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze cvt.d.w f0, f0 375200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/fcvtFooter.S */ 375300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* 375400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Stores a specified register containing the result of conversion 375500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * from or to a floating-point type and jumps to the next instruction. 375600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 375700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Expects a1 to contain the destination Dalvik register number. 375800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * a1 is set up by fcvtHeader.S. 375900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 376000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * For: int-to-float, int-to-double, long-to-float, long-to-double, 376100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * float-to-int, float-to-long, float-to-double, double-to-int, 376200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * double-to-long, double-to-float, neg-float, neg-double. 376300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 376400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Note that this file can't be included after a break in other files 376500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * and in those files its contents appear as a copy. 376600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * See: float-to-int, float-to-long, double-to-int, double-to-long. 376700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 376800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_INST_OPCODE v0 # extract opcode from rINST 376900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze SET_VREG_DOUBLE f0, a1 377000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GOTO_OPCODE v0 # jump to next instruction 377100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 377200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 377300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 377400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 377500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_long_to_int: /* 0x84 */ 377600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_long_to_int.S */ 377700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* we ignore the high word, making this equivalent to a 32-bit reg move */ 377800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_move.S */ 377900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* for move, move-object, long-to-int */ 378000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* op vA, vB */ 378100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ext a2, rINST, 8, 4 # a2 <- A 378200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ext a3, rINST, 12, 4 # a3 <- B 378300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze FETCH_ADVANCE_INST 1 # advance rPC, load rINST 378400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG a0, a3 # a0 <- vB 378500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_INST_OPCODE v0 # extract opcode from rINST 378600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .if 0 378700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze SET_VREG_OBJECT a0, a2 # vA <- vB 378800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .else 378900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze SET_VREG a0, a2 # vA <- vB 379000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .endif 379100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GOTO_OPCODE v0 # jump to next instruction 379200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 379300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 379400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 379500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 379600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_long_to_float: /* 0x85 */ 379700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_long_to_float.S */ 379800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* 379900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Conversion from or to floating-point happens in a floating-point register. 380000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Therefore we load the input and store the output into or from a 380100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * floating-point register irrespective of the type. 380200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 380300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/fcvtHeader.S */ 380400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* 380500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Loads a specified register from vB. Used primarily for conversions 380600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * from or to a floating-point type. 380700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 380800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Sets up a1 = A and a2 = B. a2 is later used by fcvtFooter.S to 380900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * store the result in vA and jump to the next instruction. 381000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 381100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * For: int-to-float, int-to-double, long-to-float, long-to-double, 381200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * float-to-int, float-to-long, float-to-double, double-to-int, 381300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * double-to-long, double-to-float, neg-float, neg-double. 381400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 381500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ext a1, rINST, 8, 4 # a1 <- A 381600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze srl a2, rINST, 12 # a2 <- B 381700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG_DOUBLE f0, a2 381800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze FETCH_ADVANCE_INST 1 # advance rPC, load rINST 381900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 382000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze cvt.s.l f0, f0 382100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/fcvtFooter.S */ 382200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* 382300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Stores a specified register containing the result of conversion 382400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * from or to a floating-point type and jumps to the next instruction. 382500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 382600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Expects a1 to contain the destination Dalvik register number. 382700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * a1 is set up by fcvtHeader.S. 382800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 382900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * For: int-to-float, int-to-double, long-to-float, long-to-double, 383000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * float-to-int, float-to-long, float-to-double, double-to-int, 383100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * double-to-long, double-to-float, neg-float, neg-double. 383200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 383300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Note that this file can't be included after a break in other files 383400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * and in those files its contents appear as a copy. 383500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * See: float-to-int, float-to-long, double-to-int, double-to-long. 383600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 383700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_INST_OPCODE v0 # extract opcode from rINST 383800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze SET_VREG_FLOAT f0, a1 383900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GOTO_OPCODE v0 # jump to next instruction 384000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 384100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 384200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 384300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 384400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_long_to_double: /* 0x86 */ 384500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_long_to_double.S */ 384600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* 384700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Conversion from or to floating-point happens in a floating-point register. 384800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Therefore we load the input and store the output into or from a 384900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * floating-point register irrespective of the type. 385000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 385100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/fcvtHeader.S */ 385200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* 385300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Loads a specified register from vB. Used primarily for conversions 385400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * from or to a floating-point type. 385500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 385600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Sets up a1 = A and a2 = B. a2 is later used by fcvtFooter.S to 385700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * store the result in vA and jump to the next instruction. 385800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 385900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * For: int-to-float, int-to-double, long-to-float, long-to-double, 386000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * float-to-int, float-to-long, float-to-double, double-to-int, 386100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * double-to-long, double-to-float, neg-float, neg-double. 386200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 386300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ext a1, rINST, 8, 4 # a1 <- A 386400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze srl a2, rINST, 12 # a2 <- B 386500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG_DOUBLE f0, a2 386600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze FETCH_ADVANCE_INST 1 # advance rPC, load rINST 386700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 386800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze cvt.d.l f0, f0 386900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/fcvtFooter.S */ 387000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* 387100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Stores a specified register containing the result of conversion 387200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * from or to a floating-point type and jumps to the next instruction. 387300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 387400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Expects a1 to contain the destination Dalvik register number. 387500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * a1 is set up by fcvtHeader.S. 387600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 387700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * For: int-to-float, int-to-double, long-to-float, long-to-double, 387800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * float-to-int, float-to-long, float-to-double, double-to-int, 387900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * double-to-long, double-to-float, neg-float, neg-double. 388000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 388100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Note that this file can't be included after a break in other files 388200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * and in those files its contents appear as a copy. 388300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * See: float-to-int, float-to-long, double-to-int, double-to-long. 388400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 388500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_INST_OPCODE v0 # extract opcode from rINST 388600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze SET_VREG_DOUBLE f0, a1 388700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GOTO_OPCODE v0 # jump to next instruction 388800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 388900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 389000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 389100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 389200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_float_to_int: /* 0x87 */ 389300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_float_to_int.S */ 389400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/fcvtHeader.S */ 389500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* 389600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Loads a specified register from vB. Used primarily for conversions 389700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * from or to a floating-point type. 389800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 389900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Sets up a1 = A and a2 = B. a2 is later used by fcvtFooter.S to 390000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * store the result in vA and jump to the next instruction. 390100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 390200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * For: int-to-float, int-to-double, long-to-float, long-to-double, 390300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * float-to-int, float-to-long, float-to-double, double-to-int, 390400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * double-to-long, double-to-float, neg-float, neg-double. 390500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 390600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ext a1, rINST, 8, 4 # a1 <- A 390700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze srl a2, rINST, 12 # a2 <- B 390800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG_FLOAT f0, a2 390900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze FETCH_ADVANCE_INST 1 # advance rPC, load rINST 391000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 391100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* 391200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * TODO: simplify this when the MIPS64R6 emulator 391300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * supports NAN2008=1. 391400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 391500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze li t0, INT_MIN_AS_FLOAT 391600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze mtc1 t0, f1 391700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze cmp.le.s f1, f1, f0 391800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze bc1nez f1, .Lop_float_to_int_trunc 391900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze cmp.eq.s f1, f0, f0 392000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze li t0, INT_MIN 392100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze mfc1 t1, f1 392200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze and t0, t0, t1 392300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze b .Lop_float_to_int_done 392400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 392500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 392600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 392700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_float_to_long: /* 0x88 */ 392800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_float_to_long.S */ 392900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/fcvtHeader.S */ 393000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* 393100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Loads a specified register from vB. Used primarily for conversions 393200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * from or to a floating-point type. 393300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 393400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Sets up a1 = A and a2 = B. a2 is later used by fcvtFooter.S to 393500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * store the result in vA and jump to the next instruction. 393600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 393700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * For: int-to-float, int-to-double, long-to-float, long-to-double, 393800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * float-to-int, float-to-long, float-to-double, double-to-int, 393900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * double-to-long, double-to-float, neg-float, neg-double. 394000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 394100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ext a1, rINST, 8, 4 # a1 <- A 394200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze srl a2, rINST, 12 # a2 <- B 394300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG_FLOAT f0, a2 394400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze FETCH_ADVANCE_INST 1 # advance rPC, load rINST 394500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 394600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* 394700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * TODO: simplify this when the MIPS64R6 emulator 394800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * supports NAN2008=1. 394900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 395000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze li t0, LONG_MIN_AS_FLOAT 395100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze mtc1 t0, f1 395200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze cmp.le.s f1, f1, f0 395300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze bc1nez f1, .Lop_float_to_long_trunc 395400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze cmp.eq.s f1, f0, f0 395500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dli t0, LONG_MIN 395600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze mfc1 t1, f1 395700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze and t0, t0, t1 395800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze b .Lop_float_to_long_done 395900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 396000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 396100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 396200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_float_to_double: /* 0x89 */ 396300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_float_to_double.S */ 396400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* 396500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Conversion from or to floating-point happens in a floating-point register. 396600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Therefore we load the input and store the output into or from a 396700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * floating-point register irrespective of the type. 396800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 396900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/fcvtHeader.S */ 397000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* 397100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Loads a specified register from vB. Used primarily for conversions 397200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * from or to a floating-point type. 397300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 397400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Sets up a1 = A and a2 = B. a2 is later used by fcvtFooter.S to 397500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * store the result in vA and jump to the next instruction. 397600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 397700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * For: int-to-float, int-to-double, long-to-float, long-to-double, 397800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * float-to-int, float-to-long, float-to-double, double-to-int, 397900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * double-to-long, double-to-float, neg-float, neg-double. 398000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 398100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ext a1, rINST, 8, 4 # a1 <- A 398200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze srl a2, rINST, 12 # a2 <- B 398300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG_FLOAT f0, a2 398400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze FETCH_ADVANCE_INST 1 # advance rPC, load rINST 398500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 398600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze cvt.d.s f0, f0 398700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/fcvtFooter.S */ 398800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* 398900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Stores a specified register containing the result of conversion 399000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * from or to a floating-point type and jumps to the next instruction. 399100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 399200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Expects a1 to contain the destination Dalvik register number. 399300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * a1 is set up by fcvtHeader.S. 399400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 399500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * For: int-to-float, int-to-double, long-to-float, long-to-double, 399600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * float-to-int, float-to-long, float-to-double, double-to-int, 399700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * double-to-long, double-to-float, neg-float, neg-double. 399800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 399900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Note that this file can't be included after a break in other files 400000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * and in those files its contents appear as a copy. 400100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * See: float-to-int, float-to-long, double-to-int, double-to-long. 400200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 400300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_INST_OPCODE v0 # extract opcode from rINST 400400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze SET_VREG_DOUBLE f0, a1 400500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GOTO_OPCODE v0 # jump to next instruction 400600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 400700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 400800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 400900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 401000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_double_to_int: /* 0x8a */ 401100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_double_to_int.S */ 401200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/fcvtHeader.S */ 401300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* 401400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Loads a specified register from vB. Used primarily for conversions 401500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * from or to a floating-point type. 401600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 401700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Sets up a1 = A and a2 = B. a2 is later used by fcvtFooter.S to 401800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * store the result in vA and jump to the next instruction. 401900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 402000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * For: int-to-float, int-to-double, long-to-float, long-to-double, 402100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * float-to-int, float-to-long, float-to-double, double-to-int, 402200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * double-to-long, double-to-float, neg-float, neg-double. 402300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 402400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ext a1, rINST, 8, 4 # a1 <- A 402500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze srl a2, rINST, 12 # a2 <- B 402600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG_DOUBLE f0, a2 402700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze FETCH_ADVANCE_INST 1 # advance rPC, load rINST 402800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 402900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* 403000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * TODO: simplify this when the MIPS64R6 emulator 403100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * supports NAN2008=1. 403200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 403300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dli t0, INT_MIN_AS_DOUBLE 403400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dmtc1 t0, f1 403500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze cmp.le.d f1, f1, f0 403600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze bc1nez f1, .Lop_double_to_int_trunc 403700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze cmp.eq.d f1, f0, f0 403800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze li t0, INT_MIN 403900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze mfc1 t1, f1 404000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze and t0, t0, t1 404100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze b .Lop_double_to_int_done 404200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 404300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 404400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 404500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_double_to_long: /* 0x8b */ 404600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_double_to_long.S */ 404700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/fcvtHeader.S */ 404800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* 404900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Loads a specified register from vB. Used primarily for conversions 405000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * from or to a floating-point type. 405100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 405200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Sets up a1 = A and a2 = B. a2 is later used by fcvtFooter.S to 405300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * store the result in vA and jump to the next instruction. 405400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 405500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * For: int-to-float, int-to-double, long-to-float, long-to-double, 405600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * float-to-int, float-to-long, float-to-double, double-to-int, 405700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * double-to-long, double-to-float, neg-float, neg-double. 405800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 405900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ext a1, rINST, 8, 4 # a1 <- A 406000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze srl a2, rINST, 12 # a2 <- B 406100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG_DOUBLE f0, a2 406200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze FETCH_ADVANCE_INST 1 # advance rPC, load rINST 406300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 406400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* 406500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * TODO: simplify this when the MIPS64R6 emulator 406600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * supports NAN2008=1. 406700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 406800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dli t0, LONG_MIN_AS_DOUBLE 406900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dmtc1 t0, f1 407000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze cmp.le.d f1, f1, f0 407100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze bc1nez f1, .Lop_double_to_long_trunc 407200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze cmp.eq.d f1, f0, f0 407300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dli t0, LONG_MIN 407400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze mfc1 t1, f1 407500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze and t0, t0, t1 407600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze b .Lop_double_to_long_done 407700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 407800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 407900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 408000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_double_to_float: /* 0x8c */ 408100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_double_to_float.S */ 408200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* 408300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Conversion from or to floating-point happens in a floating-point register. 408400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Therefore we load the input and store the output into or from a 408500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * floating-point register irrespective of the type. 408600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 408700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/fcvtHeader.S */ 408800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* 408900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Loads a specified register from vB. Used primarily for conversions 409000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * from or to a floating-point type. 409100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 409200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Sets up a1 = A and a2 = B. a2 is later used by fcvtFooter.S to 409300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * store the result in vA and jump to the next instruction. 409400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 409500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * For: int-to-float, int-to-double, long-to-float, long-to-double, 409600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * float-to-int, float-to-long, float-to-double, double-to-int, 409700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * double-to-long, double-to-float, neg-float, neg-double. 409800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 409900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ext a1, rINST, 8, 4 # a1 <- A 410000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze srl a2, rINST, 12 # a2 <- B 410100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG_DOUBLE f0, a2 410200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze FETCH_ADVANCE_INST 1 # advance rPC, load rINST 410300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 410400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze cvt.s.d f0, f0 410500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/fcvtFooter.S */ 410600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* 410700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Stores a specified register containing the result of conversion 410800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * from or to a floating-point type and jumps to the next instruction. 410900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 411000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Expects a1 to contain the destination Dalvik register number. 411100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * a1 is set up by fcvtHeader.S. 411200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 411300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * For: int-to-float, int-to-double, long-to-float, long-to-double, 411400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * float-to-int, float-to-long, float-to-double, double-to-int, 411500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * double-to-long, double-to-float, neg-float, neg-double. 411600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 411700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Note that this file can't be included after a break in other files 411800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * and in those files its contents appear as a copy. 411900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * See: float-to-int, float-to-long, double-to-int, double-to-long. 412000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 412100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_INST_OPCODE v0 # extract opcode from rINST 412200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze SET_VREG_FLOAT f0, a1 412300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GOTO_OPCODE v0 # jump to next instruction 412400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 412500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 412600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 412700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 412800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_int_to_byte: /* 0x8d */ 412900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_int_to_byte.S */ 413000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/unop.S */ 413100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* 413200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Generic 32-bit unary operation. Provide an "instr" line that 413300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * specifies an instruction that performs "a0 = op a0". 413400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 413500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * for: int-to-byte, int-to-char, int-to-short, 413600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * not-int, neg-int 413700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 413800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* unop vA, vB */ 413900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ext a3, rINST, 12, 4 # a3 <- B 414000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG a0, a3 # a0 <- vB 414100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ext a2, rINST, 8, 4 # a2 <- A 414200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze # optional op 414300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze FETCH_ADVANCE_INST 1 # advance rPC, load rINST 414400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze seb a0, a0 # a0 <- op, a0-a3 changed 414500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_INST_OPCODE v0 # extract opcode from rINST 414600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze SET_VREG a0, a2 # vA <- a0 414700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GOTO_OPCODE v0 # jump to next instruction 414800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 414900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 415000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 415100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 415200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_int_to_char: /* 0x8e */ 415300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_int_to_char.S */ 415400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/unop.S */ 415500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* 415600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Generic 32-bit unary operation. Provide an "instr" line that 415700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * specifies an instruction that performs "a0 = op a0". 415800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 415900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * for: int-to-byte, int-to-char, int-to-short, 416000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * not-int, neg-int 416100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 416200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* unop vA, vB */ 416300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ext a3, rINST, 12, 4 # a3 <- B 416400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG a0, a3 # a0 <- vB 416500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ext a2, rINST, 8, 4 # a2 <- A 416600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze # optional op 416700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze FETCH_ADVANCE_INST 1 # advance rPC, load rINST 416800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze and a0, a0, 0xffff # a0 <- op, a0-a3 changed 416900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_INST_OPCODE v0 # extract opcode from rINST 417000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze SET_VREG a0, a2 # vA <- a0 417100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GOTO_OPCODE v0 # jump to next instruction 417200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 417300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 417400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 417500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 417600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_int_to_short: /* 0x8f */ 417700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_int_to_short.S */ 417800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/unop.S */ 417900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* 418000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Generic 32-bit unary operation. Provide an "instr" line that 418100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * specifies an instruction that performs "a0 = op a0". 418200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 418300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * for: int-to-byte, int-to-char, int-to-short, 418400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * not-int, neg-int 418500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 418600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* unop vA, vB */ 418700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ext a3, rINST, 12, 4 # a3 <- B 418800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG a0, a3 # a0 <- vB 418900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ext a2, rINST, 8, 4 # a2 <- A 419000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze # optional op 419100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze FETCH_ADVANCE_INST 1 # advance rPC, load rINST 419200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze seh a0, a0 # a0 <- op, a0-a3 changed 419300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_INST_OPCODE v0 # extract opcode from rINST 419400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze SET_VREG a0, a2 # vA <- a0 419500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GOTO_OPCODE v0 # jump to next instruction 419600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 419700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 419800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 419900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 420000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_add_int: /* 0x90 */ 420100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_add_int.S */ 420200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/binop.S */ 420300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* 420400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Generic 32-bit binary operation. Provide an "instr" line that 420500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * specifies an instruction that performs "result = a0 op a1". 420600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * This could be a MIPS instruction or a function call. (If the result 420700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * comes back in a register other than a0, you can override "result".) 420800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 420900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * If "chkzero" is set to 1, we perform a divide-by-zero check on 421000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * vCC (a1). Useful for integer division and modulus. Note that we 421100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * *don't* check for (INT_MIN / -1) here, because the CPU handles it 421200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * correctly. 421300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 421400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * For: add-int, sub-int, mul-int, div-int, rem-int, and-int, or-int, 421500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * xor-int, shl-int, shr-int, ushr-int 421600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 421700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* binop vAA, vBB, vCC */ 421800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze srl a4, rINST, 8 # a4 <- AA 421900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lbu a2, 2(rPC) # a2 <- BB 422000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lbu a3, 3(rPC) # a3 <- CC 422100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG a0, a2 # a0 <- vBB 422200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG a1, a3 # a1 <- vCC 422300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .if 0 422400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze beqz a1, common_errDivideByZero # is second operand zero? 422500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .endif 422600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze FETCH_ADVANCE_INST 2 # advance rPC, load rINST 422700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze # optional op 422800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze addu a0, a0, a1 # a0 <- op, a0-a3 changed 422900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_INST_OPCODE v0 # extract opcode from rINST 423000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze SET_VREG a0, a4 # vAA <- a0 423100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GOTO_OPCODE v0 # jump to next instruction 423200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 423300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 423400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 423500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 423600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_sub_int: /* 0x91 */ 423700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_sub_int.S */ 423800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/binop.S */ 423900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* 424000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Generic 32-bit binary operation. Provide an "instr" line that 424100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * specifies an instruction that performs "result = a0 op a1". 424200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * This could be a MIPS instruction or a function call. (If the result 424300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * comes back in a register other than a0, you can override "result".) 424400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 424500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * If "chkzero" is set to 1, we perform a divide-by-zero check on 424600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * vCC (a1). Useful for integer division and modulus. Note that we 424700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * *don't* check for (INT_MIN / -1) here, because the CPU handles it 424800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * correctly. 424900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 425000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * For: add-int, sub-int, mul-int, div-int, rem-int, and-int, or-int, 425100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * xor-int, shl-int, shr-int, ushr-int 425200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 425300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* binop vAA, vBB, vCC */ 425400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze srl a4, rINST, 8 # a4 <- AA 425500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lbu a2, 2(rPC) # a2 <- BB 425600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lbu a3, 3(rPC) # a3 <- CC 425700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG a0, a2 # a0 <- vBB 425800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG a1, a3 # a1 <- vCC 425900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .if 0 426000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze beqz a1, common_errDivideByZero # is second operand zero? 426100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .endif 426200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze FETCH_ADVANCE_INST 2 # advance rPC, load rINST 426300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze # optional op 426400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze subu a0, a0, a1 # a0 <- op, a0-a3 changed 426500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_INST_OPCODE v0 # extract opcode from rINST 426600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze SET_VREG a0, a4 # vAA <- a0 426700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GOTO_OPCODE v0 # jump to next instruction 426800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 426900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 427000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 427100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 427200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_mul_int: /* 0x92 */ 427300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_mul_int.S */ 427400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/binop.S */ 427500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* 427600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Generic 32-bit binary operation. Provide an "instr" line that 427700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * specifies an instruction that performs "result = a0 op a1". 427800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * This could be a MIPS instruction or a function call. (If the result 427900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * comes back in a register other than a0, you can override "result".) 428000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 428100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * If "chkzero" is set to 1, we perform a divide-by-zero check on 428200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * vCC (a1). Useful for integer division and modulus. Note that we 428300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * *don't* check for (INT_MIN / -1) here, because the CPU handles it 428400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * correctly. 428500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 428600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * For: add-int, sub-int, mul-int, div-int, rem-int, and-int, or-int, 428700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * xor-int, shl-int, shr-int, ushr-int 428800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 428900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* binop vAA, vBB, vCC */ 429000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze srl a4, rINST, 8 # a4 <- AA 429100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lbu a2, 2(rPC) # a2 <- BB 429200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lbu a3, 3(rPC) # a3 <- CC 429300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG a0, a2 # a0 <- vBB 429400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG a1, a3 # a1 <- vCC 429500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .if 0 429600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze beqz a1, common_errDivideByZero # is second operand zero? 429700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .endif 429800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze FETCH_ADVANCE_INST 2 # advance rPC, load rINST 429900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze # optional op 430000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze mul a0, a0, a1 # a0 <- op, a0-a3 changed 430100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_INST_OPCODE v0 # extract opcode from rINST 430200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze SET_VREG a0, a4 # vAA <- a0 430300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GOTO_OPCODE v0 # jump to next instruction 430400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 430500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 430600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 430700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 430800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_div_int: /* 0x93 */ 430900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_div_int.S */ 431000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/binop.S */ 431100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* 431200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Generic 32-bit binary operation. Provide an "instr" line that 431300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * specifies an instruction that performs "result = a0 op a1". 431400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * This could be a MIPS instruction or a function call. (If the result 431500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * comes back in a register other than a0, you can override "result".) 431600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 431700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * If "chkzero" is set to 1, we perform a divide-by-zero check on 431800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * vCC (a1). Useful for integer division and modulus. Note that we 431900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * *don't* check for (INT_MIN / -1) here, because the CPU handles it 432000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * correctly. 432100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 432200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * For: add-int, sub-int, mul-int, div-int, rem-int, and-int, or-int, 432300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * xor-int, shl-int, shr-int, ushr-int 432400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 432500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* binop vAA, vBB, vCC */ 432600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze srl a4, rINST, 8 # a4 <- AA 432700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lbu a2, 2(rPC) # a2 <- BB 432800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lbu a3, 3(rPC) # a3 <- CC 432900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG a0, a2 # a0 <- vBB 433000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG a1, a3 # a1 <- vCC 433100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .if 1 433200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze beqz a1, common_errDivideByZero # is second operand zero? 433300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .endif 433400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze FETCH_ADVANCE_INST 2 # advance rPC, load rINST 433500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze # optional op 433600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze div a0, a0, a1 # a0 <- op, a0-a3 changed 433700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_INST_OPCODE v0 # extract opcode from rINST 433800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze SET_VREG a0, a4 # vAA <- a0 433900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GOTO_OPCODE v0 # jump to next instruction 434000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 434100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 434200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 434300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 434400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_rem_int: /* 0x94 */ 434500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_rem_int.S */ 434600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/binop.S */ 434700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* 434800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Generic 32-bit binary operation. Provide an "instr" line that 434900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * specifies an instruction that performs "result = a0 op a1". 435000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * This could be a MIPS instruction or a function call. (If the result 435100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * comes back in a register other than a0, you can override "result".) 435200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 435300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * If "chkzero" is set to 1, we perform a divide-by-zero check on 435400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * vCC (a1). Useful for integer division and modulus. Note that we 435500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * *don't* check for (INT_MIN / -1) here, because the CPU handles it 435600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * correctly. 435700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 435800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * For: add-int, sub-int, mul-int, div-int, rem-int, and-int, or-int, 435900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * xor-int, shl-int, shr-int, ushr-int 436000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 436100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* binop vAA, vBB, vCC */ 436200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze srl a4, rINST, 8 # a4 <- AA 436300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lbu a2, 2(rPC) # a2 <- BB 436400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lbu a3, 3(rPC) # a3 <- CC 436500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG a0, a2 # a0 <- vBB 436600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG a1, a3 # a1 <- vCC 436700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .if 1 436800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze beqz a1, common_errDivideByZero # is second operand zero? 436900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .endif 437000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze FETCH_ADVANCE_INST 2 # advance rPC, load rINST 437100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze # optional op 437200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze mod a0, a0, a1 # a0 <- op, a0-a3 changed 437300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_INST_OPCODE v0 # extract opcode from rINST 437400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze SET_VREG a0, a4 # vAA <- a0 437500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GOTO_OPCODE v0 # jump to next instruction 437600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 437700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 437800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 437900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 438000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_and_int: /* 0x95 */ 438100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_and_int.S */ 438200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/binop.S */ 438300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* 438400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Generic 32-bit binary operation. Provide an "instr" line that 438500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * specifies an instruction that performs "result = a0 op a1". 438600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * This could be a MIPS instruction or a function call. (If the result 438700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * comes back in a register other than a0, you can override "result".) 438800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 438900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * If "chkzero" is set to 1, we perform a divide-by-zero check on 439000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * vCC (a1). Useful for integer division and modulus. Note that we 439100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * *don't* check for (INT_MIN / -1) here, because the CPU handles it 439200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * correctly. 439300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 439400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * For: add-int, sub-int, mul-int, div-int, rem-int, and-int, or-int, 439500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * xor-int, shl-int, shr-int, ushr-int 439600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 439700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* binop vAA, vBB, vCC */ 439800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze srl a4, rINST, 8 # a4 <- AA 439900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lbu a2, 2(rPC) # a2 <- BB 440000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lbu a3, 3(rPC) # a3 <- CC 440100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG a0, a2 # a0 <- vBB 440200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG a1, a3 # a1 <- vCC 440300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .if 0 440400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze beqz a1, common_errDivideByZero # is second operand zero? 440500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .endif 440600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze FETCH_ADVANCE_INST 2 # advance rPC, load rINST 440700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze # optional op 440800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze and a0, a0, a1 # a0 <- op, a0-a3 changed 440900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_INST_OPCODE v0 # extract opcode from rINST 441000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze SET_VREG a0, a4 # vAA <- a0 441100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GOTO_OPCODE v0 # jump to next instruction 441200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 441300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 441400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 441500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 441600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_or_int: /* 0x96 */ 441700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_or_int.S */ 441800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/binop.S */ 441900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* 442000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Generic 32-bit binary operation. Provide an "instr" line that 442100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * specifies an instruction that performs "result = a0 op a1". 442200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * This could be a MIPS instruction or a function call. (If the result 442300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * comes back in a register other than a0, you can override "result".) 442400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 442500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * If "chkzero" is set to 1, we perform a divide-by-zero check on 442600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * vCC (a1). Useful for integer division and modulus. Note that we 442700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * *don't* check for (INT_MIN / -1) here, because the CPU handles it 442800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * correctly. 442900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 443000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * For: add-int, sub-int, mul-int, div-int, rem-int, and-int, or-int, 443100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * xor-int, shl-int, shr-int, ushr-int 443200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 443300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* binop vAA, vBB, vCC */ 443400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze srl a4, rINST, 8 # a4 <- AA 443500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lbu a2, 2(rPC) # a2 <- BB 443600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lbu a3, 3(rPC) # a3 <- CC 443700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG a0, a2 # a0 <- vBB 443800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG a1, a3 # a1 <- vCC 443900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .if 0 444000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze beqz a1, common_errDivideByZero # is second operand zero? 444100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .endif 444200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze FETCH_ADVANCE_INST 2 # advance rPC, load rINST 444300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze # optional op 444400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze or a0, a0, a1 # a0 <- op, a0-a3 changed 444500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_INST_OPCODE v0 # extract opcode from rINST 444600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze SET_VREG a0, a4 # vAA <- a0 444700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GOTO_OPCODE v0 # jump to next instruction 444800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 444900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 445000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 445100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 445200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_xor_int: /* 0x97 */ 445300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_xor_int.S */ 445400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/binop.S */ 445500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* 445600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Generic 32-bit binary operation. Provide an "instr" line that 445700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * specifies an instruction that performs "result = a0 op a1". 445800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * This could be a MIPS instruction or a function call. (If the result 445900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * comes back in a register other than a0, you can override "result".) 446000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 446100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * If "chkzero" is set to 1, we perform a divide-by-zero check on 446200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * vCC (a1). Useful for integer division and modulus. Note that we 446300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * *don't* check for (INT_MIN / -1) here, because the CPU handles it 446400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * correctly. 446500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 446600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * For: add-int, sub-int, mul-int, div-int, rem-int, and-int, or-int, 446700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * xor-int, shl-int, shr-int, ushr-int 446800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 446900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* binop vAA, vBB, vCC */ 447000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze srl a4, rINST, 8 # a4 <- AA 447100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lbu a2, 2(rPC) # a2 <- BB 447200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lbu a3, 3(rPC) # a3 <- CC 447300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG a0, a2 # a0 <- vBB 447400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG a1, a3 # a1 <- vCC 447500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .if 0 447600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze beqz a1, common_errDivideByZero # is second operand zero? 447700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .endif 447800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze FETCH_ADVANCE_INST 2 # advance rPC, load rINST 447900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze # optional op 448000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze xor a0, a0, a1 # a0 <- op, a0-a3 changed 448100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_INST_OPCODE v0 # extract opcode from rINST 448200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze SET_VREG a0, a4 # vAA <- a0 448300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GOTO_OPCODE v0 # jump to next instruction 448400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 448500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 448600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 448700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 448800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_shl_int: /* 0x98 */ 448900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_shl_int.S */ 449000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/binop.S */ 449100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* 449200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Generic 32-bit binary operation. Provide an "instr" line that 449300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * specifies an instruction that performs "result = a0 op a1". 449400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * This could be a MIPS instruction or a function call. (If the result 449500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * comes back in a register other than a0, you can override "result".) 449600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 449700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * If "chkzero" is set to 1, we perform a divide-by-zero check on 449800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * vCC (a1). Useful for integer division and modulus. Note that we 449900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * *don't* check for (INT_MIN / -1) here, because the CPU handles it 450000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * correctly. 450100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 450200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * For: add-int, sub-int, mul-int, div-int, rem-int, and-int, or-int, 450300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * xor-int, shl-int, shr-int, ushr-int 450400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 450500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* binop vAA, vBB, vCC */ 450600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze srl a4, rINST, 8 # a4 <- AA 450700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lbu a2, 2(rPC) # a2 <- BB 450800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lbu a3, 3(rPC) # a3 <- CC 450900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG a0, a2 # a0 <- vBB 451000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG a1, a3 # a1 <- vCC 451100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .if 0 451200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze beqz a1, common_errDivideByZero # is second operand zero? 451300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .endif 451400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze FETCH_ADVANCE_INST 2 # advance rPC, load rINST 451500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze # optional op 451600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze sll a0, a0, a1 # a0 <- op, a0-a3 changed 451700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_INST_OPCODE v0 # extract opcode from rINST 451800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze SET_VREG a0, a4 # vAA <- a0 451900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GOTO_OPCODE v0 # jump to next instruction 452000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 452100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 452200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 452300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 452400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_shr_int: /* 0x99 */ 452500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_shr_int.S */ 452600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/binop.S */ 452700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* 452800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Generic 32-bit binary operation. Provide an "instr" line that 452900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * specifies an instruction that performs "result = a0 op a1". 453000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * This could be a MIPS instruction or a function call. (If the result 453100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * comes back in a register other than a0, you can override "result".) 453200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 453300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * If "chkzero" is set to 1, we perform a divide-by-zero check on 453400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * vCC (a1). Useful for integer division and modulus. Note that we 453500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * *don't* check for (INT_MIN / -1) here, because the CPU handles it 453600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * correctly. 453700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 453800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * For: add-int, sub-int, mul-int, div-int, rem-int, and-int, or-int, 453900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * xor-int, shl-int, shr-int, ushr-int 454000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 454100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* binop vAA, vBB, vCC */ 454200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze srl a4, rINST, 8 # a4 <- AA 454300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lbu a2, 2(rPC) # a2 <- BB 454400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lbu a3, 3(rPC) # a3 <- CC 454500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG a0, a2 # a0 <- vBB 454600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG a1, a3 # a1 <- vCC 454700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .if 0 454800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze beqz a1, common_errDivideByZero # is second operand zero? 454900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .endif 455000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze FETCH_ADVANCE_INST 2 # advance rPC, load rINST 455100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze # optional op 455200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze sra a0, a0, a1 # a0 <- op, a0-a3 changed 455300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_INST_OPCODE v0 # extract opcode from rINST 455400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze SET_VREG a0, a4 # vAA <- a0 455500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GOTO_OPCODE v0 # jump to next instruction 455600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 455700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 455800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 455900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 456000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_ushr_int: /* 0x9a */ 456100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_ushr_int.S */ 456200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/binop.S */ 456300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* 456400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Generic 32-bit binary operation. Provide an "instr" line that 456500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * specifies an instruction that performs "result = a0 op a1". 456600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * This could be a MIPS instruction or a function call. (If the result 456700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * comes back in a register other than a0, you can override "result".) 456800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 456900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * If "chkzero" is set to 1, we perform a divide-by-zero check on 457000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * vCC (a1). Useful for integer division and modulus. Note that we 457100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * *don't* check for (INT_MIN / -1) here, because the CPU handles it 457200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * correctly. 457300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 457400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * For: add-int, sub-int, mul-int, div-int, rem-int, and-int, or-int, 457500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * xor-int, shl-int, shr-int, ushr-int 457600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 457700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* binop vAA, vBB, vCC */ 457800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze srl a4, rINST, 8 # a4 <- AA 457900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lbu a2, 2(rPC) # a2 <- BB 458000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lbu a3, 3(rPC) # a3 <- CC 458100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG a0, a2 # a0 <- vBB 458200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG a1, a3 # a1 <- vCC 458300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .if 0 458400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze beqz a1, common_errDivideByZero # is second operand zero? 458500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .endif 458600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze FETCH_ADVANCE_INST 2 # advance rPC, load rINST 458700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze # optional op 458800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze srl a0, a0, a1 # a0 <- op, a0-a3 changed 458900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_INST_OPCODE v0 # extract opcode from rINST 459000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze SET_VREG a0, a4 # vAA <- a0 459100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GOTO_OPCODE v0 # jump to next instruction 459200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 459300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 459400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 459500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 459600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_add_long: /* 0x9b */ 459700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_add_long.S */ 459800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/binopWide.S */ 459900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* 460000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Generic 64-bit binary operation. Provide an "instr" line that 460100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * specifies an instruction that performs "result = a0 op a1". 460200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * This could be a MIPS instruction or a function call. (If the result 460300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * comes back in a register other than a0, you can override "result".) 460400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 460500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * If "chkzero" is set to 1, we perform a divide-by-zero check on 460600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * vCC (a1). Useful for integer division and modulus. Note that we 460700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * *don't* check for (LONG_MIN / -1) here, because the CPU handles it 460800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * correctly. 460900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 461000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * For: add-long, sub-long, mul-long, div-long, rem-long, and-long, or-long, 461100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * xor-long, shl-long, shr-long, ushr-long 461200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 461300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* binop vAA, vBB, vCC */ 461400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze srl a4, rINST, 8 # a4 <- AA 461500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lbu a2, 2(rPC) # a2 <- BB 461600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lbu a3, 3(rPC) # a3 <- CC 461700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG_WIDE a0, a2 # a0 <- vBB 461800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG_WIDE a1, a3 # a1 <- vCC 461900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .if 0 462000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze beqz a1, common_errDivideByZero # is second operand zero? 462100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .endif 462200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze FETCH_ADVANCE_INST 2 # advance rPC, load rINST 462300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze # optional op 462400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a0, a0, a1 # a0 <- op, a0-a3 changed 462500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_INST_OPCODE v0 # extract opcode from rINST 462600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze SET_VREG_WIDE a0, a4 # vAA <- a0 462700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GOTO_OPCODE v0 # jump to next instruction 462800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 462900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 463000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 463100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 463200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_sub_long: /* 0x9c */ 463300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_sub_long.S */ 463400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/binopWide.S */ 463500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* 463600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Generic 64-bit binary operation. Provide an "instr" line that 463700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * specifies an instruction that performs "result = a0 op a1". 463800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * This could be a MIPS instruction or a function call. (If the result 463900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * comes back in a register other than a0, you can override "result".) 464000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 464100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * If "chkzero" is set to 1, we perform a divide-by-zero check on 464200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * vCC (a1). Useful for integer division and modulus. Note that we 464300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * *don't* check for (LONG_MIN / -1) here, because the CPU handles it 464400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * correctly. 464500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 464600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * For: add-long, sub-long, mul-long, div-long, rem-long, and-long, or-long, 464700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * xor-long, shl-long, shr-long, ushr-long 464800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 464900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* binop vAA, vBB, vCC */ 465000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze srl a4, rINST, 8 # a4 <- AA 465100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lbu a2, 2(rPC) # a2 <- BB 465200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lbu a3, 3(rPC) # a3 <- CC 465300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG_WIDE a0, a2 # a0 <- vBB 465400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG_WIDE a1, a3 # a1 <- vCC 465500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .if 0 465600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze beqz a1, common_errDivideByZero # is second operand zero? 465700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .endif 465800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze FETCH_ADVANCE_INST 2 # advance rPC, load rINST 465900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze # optional op 466000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dsubu a0, a0, a1 # a0 <- op, a0-a3 changed 466100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_INST_OPCODE v0 # extract opcode from rINST 466200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze SET_VREG_WIDE a0, a4 # vAA <- a0 466300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GOTO_OPCODE v0 # jump to next instruction 466400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 466500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 466600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 466700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 466800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_mul_long: /* 0x9d */ 466900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_mul_long.S */ 467000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/binopWide.S */ 467100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* 467200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Generic 64-bit binary operation. Provide an "instr" line that 467300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * specifies an instruction that performs "result = a0 op a1". 467400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * This could be a MIPS instruction or a function call. (If the result 467500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * comes back in a register other than a0, you can override "result".) 467600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 467700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * If "chkzero" is set to 1, we perform a divide-by-zero check on 467800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * vCC (a1). Useful for integer division and modulus. Note that we 467900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * *don't* check for (LONG_MIN / -1) here, because the CPU handles it 468000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * correctly. 468100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 468200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * For: add-long, sub-long, mul-long, div-long, rem-long, and-long, or-long, 468300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * xor-long, shl-long, shr-long, ushr-long 468400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 468500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* binop vAA, vBB, vCC */ 468600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze srl a4, rINST, 8 # a4 <- AA 468700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lbu a2, 2(rPC) # a2 <- BB 468800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lbu a3, 3(rPC) # a3 <- CC 468900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG_WIDE a0, a2 # a0 <- vBB 469000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG_WIDE a1, a3 # a1 <- vCC 469100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .if 0 469200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze beqz a1, common_errDivideByZero # is second operand zero? 469300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .endif 469400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze FETCH_ADVANCE_INST 2 # advance rPC, load rINST 469500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze # optional op 469600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dmul a0, a0, a1 # a0 <- op, a0-a3 changed 469700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_INST_OPCODE v0 # extract opcode from rINST 469800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze SET_VREG_WIDE a0, a4 # vAA <- a0 469900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GOTO_OPCODE v0 # jump to next instruction 470000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 470100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 470200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 470300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 470400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_div_long: /* 0x9e */ 470500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_div_long.S */ 470600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/binopWide.S */ 470700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* 470800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Generic 64-bit binary operation. Provide an "instr" line that 470900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * specifies an instruction that performs "result = a0 op a1". 471000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * This could be a MIPS instruction or a function call. (If the result 471100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * comes back in a register other than a0, you can override "result".) 471200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 471300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * If "chkzero" is set to 1, we perform a divide-by-zero check on 471400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * vCC (a1). Useful for integer division and modulus. Note that we 471500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * *don't* check for (LONG_MIN / -1) here, because the CPU handles it 471600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * correctly. 471700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 471800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * For: add-long, sub-long, mul-long, div-long, rem-long, and-long, or-long, 471900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * xor-long, shl-long, shr-long, ushr-long 472000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 472100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* binop vAA, vBB, vCC */ 472200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze srl a4, rINST, 8 # a4 <- AA 472300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lbu a2, 2(rPC) # a2 <- BB 472400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lbu a3, 3(rPC) # a3 <- CC 472500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG_WIDE a0, a2 # a0 <- vBB 472600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG_WIDE a1, a3 # a1 <- vCC 472700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .if 1 472800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze beqz a1, common_errDivideByZero # is second operand zero? 472900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .endif 473000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze FETCH_ADVANCE_INST 2 # advance rPC, load rINST 473100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze # optional op 473200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ddiv a0, a0, a1 # a0 <- op, a0-a3 changed 473300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_INST_OPCODE v0 # extract opcode from rINST 473400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze SET_VREG_WIDE a0, a4 # vAA <- a0 473500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GOTO_OPCODE v0 # jump to next instruction 473600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 473700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 473800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 473900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 474000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_rem_long: /* 0x9f */ 474100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_rem_long.S */ 474200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/binopWide.S */ 474300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* 474400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Generic 64-bit binary operation. Provide an "instr" line that 474500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * specifies an instruction that performs "result = a0 op a1". 474600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * This could be a MIPS instruction or a function call. (If the result 474700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * comes back in a register other than a0, you can override "result".) 474800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 474900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * If "chkzero" is set to 1, we perform a divide-by-zero check on 475000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * vCC (a1). Useful for integer division and modulus. Note that we 475100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * *don't* check for (LONG_MIN / -1) here, because the CPU handles it 475200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * correctly. 475300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 475400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * For: add-long, sub-long, mul-long, div-long, rem-long, and-long, or-long, 475500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * xor-long, shl-long, shr-long, ushr-long 475600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 475700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* binop vAA, vBB, vCC */ 475800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze srl a4, rINST, 8 # a4 <- AA 475900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lbu a2, 2(rPC) # a2 <- BB 476000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lbu a3, 3(rPC) # a3 <- CC 476100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG_WIDE a0, a2 # a0 <- vBB 476200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG_WIDE a1, a3 # a1 <- vCC 476300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .if 1 476400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze beqz a1, common_errDivideByZero # is second operand zero? 476500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .endif 476600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze FETCH_ADVANCE_INST 2 # advance rPC, load rINST 476700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze # optional op 476800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dmod a0, a0, a1 # a0 <- op, a0-a3 changed 476900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_INST_OPCODE v0 # extract opcode from rINST 477000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze SET_VREG_WIDE a0, a4 # vAA <- a0 477100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GOTO_OPCODE v0 # jump to next instruction 477200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 477300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 477400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 477500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 477600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_and_long: /* 0xa0 */ 477700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_and_long.S */ 477800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/binopWide.S */ 477900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* 478000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Generic 64-bit binary operation. Provide an "instr" line that 478100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * specifies an instruction that performs "result = a0 op a1". 478200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * This could be a MIPS instruction or a function call. (If the result 478300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * comes back in a register other than a0, you can override "result".) 478400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 478500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * If "chkzero" is set to 1, we perform a divide-by-zero check on 478600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * vCC (a1). Useful for integer division and modulus. Note that we 478700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * *don't* check for (LONG_MIN / -1) here, because the CPU handles it 478800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * correctly. 478900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 479000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * For: add-long, sub-long, mul-long, div-long, rem-long, and-long, or-long, 479100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * xor-long, shl-long, shr-long, ushr-long 479200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 479300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* binop vAA, vBB, vCC */ 479400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze srl a4, rINST, 8 # a4 <- AA 479500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lbu a2, 2(rPC) # a2 <- BB 479600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lbu a3, 3(rPC) # a3 <- CC 479700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG_WIDE a0, a2 # a0 <- vBB 479800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG_WIDE a1, a3 # a1 <- vCC 479900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .if 0 480000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze beqz a1, common_errDivideByZero # is second operand zero? 480100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .endif 480200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze FETCH_ADVANCE_INST 2 # advance rPC, load rINST 480300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze # optional op 480400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze and a0, a0, a1 # a0 <- op, a0-a3 changed 480500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_INST_OPCODE v0 # extract opcode from rINST 480600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze SET_VREG_WIDE a0, a4 # vAA <- a0 480700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GOTO_OPCODE v0 # jump to next instruction 480800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 480900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 481000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 481100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 481200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_or_long: /* 0xa1 */ 481300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_or_long.S */ 481400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/binopWide.S */ 481500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* 481600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Generic 64-bit binary operation. Provide an "instr" line that 481700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * specifies an instruction that performs "result = a0 op a1". 481800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * This could be a MIPS instruction or a function call. (If the result 481900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * comes back in a register other than a0, you can override "result".) 482000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 482100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * If "chkzero" is set to 1, we perform a divide-by-zero check on 482200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * vCC (a1). Useful for integer division and modulus. Note that we 482300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * *don't* check for (LONG_MIN / -1) here, because the CPU handles it 482400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * correctly. 482500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 482600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * For: add-long, sub-long, mul-long, div-long, rem-long, and-long, or-long, 482700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * xor-long, shl-long, shr-long, ushr-long 482800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 482900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* binop vAA, vBB, vCC */ 483000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze srl a4, rINST, 8 # a4 <- AA 483100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lbu a2, 2(rPC) # a2 <- BB 483200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lbu a3, 3(rPC) # a3 <- CC 483300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG_WIDE a0, a2 # a0 <- vBB 483400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG_WIDE a1, a3 # a1 <- vCC 483500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .if 0 483600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze beqz a1, common_errDivideByZero # is second operand zero? 483700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .endif 483800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze FETCH_ADVANCE_INST 2 # advance rPC, load rINST 483900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze # optional op 484000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze or a0, a0, a1 # a0 <- op, a0-a3 changed 484100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_INST_OPCODE v0 # extract opcode from rINST 484200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze SET_VREG_WIDE a0, a4 # vAA <- a0 484300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GOTO_OPCODE v0 # jump to next instruction 484400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 484500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 484600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 484700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 484800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_xor_long: /* 0xa2 */ 484900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_xor_long.S */ 485000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/binopWide.S */ 485100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* 485200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Generic 64-bit binary operation. Provide an "instr" line that 485300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * specifies an instruction that performs "result = a0 op a1". 485400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * This could be a MIPS instruction or a function call. (If the result 485500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * comes back in a register other than a0, you can override "result".) 485600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 485700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * If "chkzero" is set to 1, we perform a divide-by-zero check on 485800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * vCC (a1). Useful for integer division and modulus. Note that we 485900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * *don't* check for (LONG_MIN / -1) here, because the CPU handles it 486000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * correctly. 486100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 486200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * For: add-long, sub-long, mul-long, div-long, rem-long, and-long, or-long, 486300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * xor-long, shl-long, shr-long, ushr-long 486400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 486500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* binop vAA, vBB, vCC */ 486600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze srl a4, rINST, 8 # a4 <- AA 486700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lbu a2, 2(rPC) # a2 <- BB 486800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lbu a3, 3(rPC) # a3 <- CC 486900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG_WIDE a0, a2 # a0 <- vBB 487000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG_WIDE a1, a3 # a1 <- vCC 487100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .if 0 487200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze beqz a1, common_errDivideByZero # is second operand zero? 487300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .endif 487400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze FETCH_ADVANCE_INST 2 # advance rPC, load rINST 487500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze # optional op 487600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze xor a0, a0, a1 # a0 <- op, a0-a3 changed 487700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_INST_OPCODE v0 # extract opcode from rINST 487800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze SET_VREG_WIDE a0, a4 # vAA <- a0 487900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GOTO_OPCODE v0 # jump to next instruction 488000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 488100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 488200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 488300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 488400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_shl_long: /* 0xa3 */ 488500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_shl_long.S */ 488600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/binopWide.S */ 488700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* 488800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Generic 64-bit binary operation. Provide an "instr" line that 488900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * specifies an instruction that performs "result = a0 op a1". 489000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * This could be a MIPS instruction or a function call. (If the result 489100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * comes back in a register other than a0, you can override "result".) 489200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 489300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * If "chkzero" is set to 1, we perform a divide-by-zero check on 489400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * vCC (a1). Useful for integer division and modulus. Note that we 489500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * *don't* check for (LONG_MIN / -1) here, because the CPU handles it 489600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * correctly. 489700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 489800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * For: add-long, sub-long, mul-long, div-long, rem-long, and-long, or-long, 489900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * xor-long, shl-long, shr-long, ushr-long 490000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 490100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* binop vAA, vBB, vCC */ 490200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze srl a4, rINST, 8 # a4 <- AA 490300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lbu a2, 2(rPC) # a2 <- BB 490400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lbu a3, 3(rPC) # a3 <- CC 490500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG_WIDE a0, a2 # a0 <- vBB 490600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG_WIDE a1, a3 # a1 <- vCC 490700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .if 0 490800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze beqz a1, common_errDivideByZero # is second operand zero? 490900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .endif 491000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze FETCH_ADVANCE_INST 2 # advance rPC, load rINST 491100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze # optional op 491200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dsll a0, a0, a1 # a0 <- op, a0-a3 changed 491300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_INST_OPCODE v0 # extract opcode from rINST 491400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze SET_VREG_WIDE a0, a4 # vAA <- a0 491500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GOTO_OPCODE v0 # jump to next instruction 491600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 491700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 491800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 491900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 492000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_shr_long: /* 0xa4 */ 492100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_shr_long.S */ 492200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/binopWide.S */ 492300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* 492400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Generic 64-bit binary operation. Provide an "instr" line that 492500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * specifies an instruction that performs "result = a0 op a1". 492600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * This could be a MIPS instruction or a function call. (If the result 492700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * comes back in a register other than a0, you can override "result".) 492800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 492900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * If "chkzero" is set to 1, we perform a divide-by-zero check on 493000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * vCC (a1). Useful for integer division and modulus. Note that we 493100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * *don't* check for (LONG_MIN / -1) here, because the CPU handles it 493200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * correctly. 493300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 493400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * For: add-long, sub-long, mul-long, div-long, rem-long, and-long, or-long, 493500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * xor-long, shl-long, shr-long, ushr-long 493600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 493700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* binop vAA, vBB, vCC */ 493800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze srl a4, rINST, 8 # a4 <- AA 493900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lbu a2, 2(rPC) # a2 <- BB 494000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lbu a3, 3(rPC) # a3 <- CC 494100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG_WIDE a0, a2 # a0 <- vBB 494200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG_WIDE a1, a3 # a1 <- vCC 494300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .if 0 494400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze beqz a1, common_errDivideByZero # is second operand zero? 494500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .endif 494600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze FETCH_ADVANCE_INST 2 # advance rPC, load rINST 494700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze # optional op 494800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dsra a0, a0, a1 # a0 <- op, a0-a3 changed 494900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_INST_OPCODE v0 # extract opcode from rINST 495000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze SET_VREG_WIDE a0, a4 # vAA <- a0 495100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GOTO_OPCODE v0 # jump to next instruction 495200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 495300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 495400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 495500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 495600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_ushr_long: /* 0xa5 */ 495700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_ushr_long.S */ 495800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/binopWide.S */ 495900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* 496000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Generic 64-bit binary operation. Provide an "instr" line that 496100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * specifies an instruction that performs "result = a0 op a1". 496200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * This could be a MIPS instruction or a function call. (If the result 496300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * comes back in a register other than a0, you can override "result".) 496400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 496500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * If "chkzero" is set to 1, we perform a divide-by-zero check on 496600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * vCC (a1). Useful for integer division and modulus. Note that we 496700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * *don't* check for (LONG_MIN / -1) here, because the CPU handles it 496800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * correctly. 496900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 497000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * For: add-long, sub-long, mul-long, div-long, rem-long, and-long, or-long, 497100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * xor-long, shl-long, shr-long, ushr-long 497200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 497300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* binop vAA, vBB, vCC */ 497400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze srl a4, rINST, 8 # a4 <- AA 497500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lbu a2, 2(rPC) # a2 <- BB 497600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lbu a3, 3(rPC) # a3 <- CC 497700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG_WIDE a0, a2 # a0 <- vBB 497800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG_WIDE a1, a3 # a1 <- vCC 497900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .if 0 498000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze beqz a1, common_errDivideByZero # is second operand zero? 498100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .endif 498200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze FETCH_ADVANCE_INST 2 # advance rPC, load rINST 498300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze # optional op 498400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dsrl a0, a0, a1 # a0 <- op, a0-a3 changed 498500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_INST_OPCODE v0 # extract opcode from rINST 498600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze SET_VREG_WIDE a0, a4 # vAA <- a0 498700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GOTO_OPCODE v0 # jump to next instruction 498800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 498900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 499000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 499100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 499200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_add_float: /* 0xa6 */ 499300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_add_float.S */ 499400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/fbinop.S */ 499500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /*: 499600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Generic 32-bit floating-point operation. 499700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 499800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * For: add-float, sub-float, mul-float, div-float. 499900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * form: <op> f0, f0, f1 500000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 500100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* binop vAA, vBB, vCC */ 500200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze srl a4, rINST, 8 # a4 <- AA 500300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lbu a2, 2(rPC) # a2 <- BB 500400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lbu a3, 3(rPC) # a3 <- CC 500500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG_FLOAT f0, a2 # f0 <- vBB 500600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG_FLOAT f1, a3 # f1 <- vCC 500700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze add.s f0, f0, f1 # f0 <- f0 op f1 500800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze FETCH_ADVANCE_INST 2 # advance rPC, load rINST 500900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_INST_OPCODE v0 # extract opcode from rINST 501000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze SET_VREG_FLOAT f0, a4 # vAA <- f0 501100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GOTO_OPCODE v0 # jump to next instruction 501200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 501300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 501400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 501500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 501600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_sub_float: /* 0xa7 */ 501700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_sub_float.S */ 501800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/fbinop.S */ 501900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /*: 502000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Generic 32-bit floating-point operation. 502100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 502200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * For: add-float, sub-float, mul-float, div-float. 502300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * form: <op> f0, f0, f1 502400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 502500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* binop vAA, vBB, vCC */ 502600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze srl a4, rINST, 8 # a4 <- AA 502700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lbu a2, 2(rPC) # a2 <- BB 502800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lbu a3, 3(rPC) # a3 <- CC 502900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG_FLOAT f0, a2 # f0 <- vBB 503000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG_FLOAT f1, a3 # f1 <- vCC 503100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze sub.s f0, f0, f1 # f0 <- f0 op f1 503200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze FETCH_ADVANCE_INST 2 # advance rPC, load rINST 503300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_INST_OPCODE v0 # extract opcode from rINST 503400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze SET_VREG_FLOAT f0, a4 # vAA <- f0 503500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GOTO_OPCODE v0 # jump to next instruction 503600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 503700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 503800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 503900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 504000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_mul_float: /* 0xa8 */ 504100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_mul_float.S */ 504200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/fbinop.S */ 504300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /*: 504400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Generic 32-bit floating-point operation. 504500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 504600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * For: add-float, sub-float, mul-float, div-float. 504700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * form: <op> f0, f0, f1 504800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 504900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* binop vAA, vBB, vCC */ 505000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze srl a4, rINST, 8 # a4 <- AA 505100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lbu a2, 2(rPC) # a2 <- BB 505200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lbu a3, 3(rPC) # a3 <- CC 505300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG_FLOAT f0, a2 # f0 <- vBB 505400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG_FLOAT f1, a3 # f1 <- vCC 505500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze mul.s f0, f0, f1 # f0 <- f0 op f1 505600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze FETCH_ADVANCE_INST 2 # advance rPC, load rINST 505700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_INST_OPCODE v0 # extract opcode from rINST 505800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze SET_VREG_FLOAT f0, a4 # vAA <- f0 505900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GOTO_OPCODE v0 # jump to next instruction 506000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 506100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 506200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 506300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 506400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_div_float: /* 0xa9 */ 506500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_div_float.S */ 506600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/fbinop.S */ 506700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /*: 506800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Generic 32-bit floating-point operation. 506900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 507000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * For: add-float, sub-float, mul-float, div-float. 507100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * form: <op> f0, f0, f1 507200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 507300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* binop vAA, vBB, vCC */ 507400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze srl a4, rINST, 8 # a4 <- AA 507500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lbu a2, 2(rPC) # a2 <- BB 507600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lbu a3, 3(rPC) # a3 <- CC 507700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG_FLOAT f0, a2 # f0 <- vBB 507800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG_FLOAT f1, a3 # f1 <- vCC 507900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze div.s f0, f0, f1 # f0 <- f0 op f1 508000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze FETCH_ADVANCE_INST 2 # advance rPC, load rINST 508100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_INST_OPCODE v0 # extract opcode from rINST 508200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze SET_VREG_FLOAT f0, a4 # vAA <- f0 508300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GOTO_OPCODE v0 # jump to next instruction 508400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 508500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 508600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 508700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 508800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_rem_float: /* 0xaa */ 508900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_rem_float.S */ 509000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* rem-float vAA, vBB, vCC */ 509100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern fmodf 509200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lbu a2, 2(rPC) # a2 <- BB 509300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lbu a3, 3(rPC) # a3 <- CC 509400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG_FLOAT f12, a2 # f12 <- vBB 509500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG_FLOAT f13, a3 # f13 <- vCC 509600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jal fmodf # f0 <- f12 op f13 509700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze srl a4, rINST, 8 # a4 <- AA 509800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze FETCH_ADVANCE_INST 2 # advance rPC, load rINST 509900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_INST_OPCODE v0 # extract opcode from rINST 510000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze SET_VREG_FLOAT f0, a4 # vAA <- f0 510100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GOTO_OPCODE v0 # jump to next instruction 510200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 510300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 510400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 510500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_add_double: /* 0xab */ 510600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_add_double.S */ 510700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/fbinopWide.S */ 510800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /*: 510900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Generic 64-bit floating-point operation. 511000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 511100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * For: add-double, sub-double, mul-double, div-double. 511200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * form: <op> f0, f0, f1 511300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 511400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* binop vAA, vBB, vCC */ 511500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze srl a4, rINST, 8 # a4 <- AA 511600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lbu a2, 2(rPC) # a2 <- BB 511700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lbu a3, 3(rPC) # a3 <- CC 511800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG_DOUBLE f0, a2 # f0 <- vBB 511900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG_DOUBLE f1, a3 # f1 <- vCC 512000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze add.d f0, f0, f1 # f0 <- f0 op f1 512100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze FETCH_ADVANCE_INST 2 # advance rPC, load rINST 512200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_INST_OPCODE v0 # extract opcode from rINST 512300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze SET_VREG_DOUBLE f0, a4 # vAA <- f0 512400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GOTO_OPCODE v0 # jump to next instruction 512500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 512600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 512700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 512800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 512900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_sub_double: /* 0xac */ 513000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_sub_double.S */ 513100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/fbinopWide.S */ 513200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /*: 513300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Generic 64-bit floating-point operation. 513400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 513500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * For: add-double, sub-double, mul-double, div-double. 513600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * form: <op> f0, f0, f1 513700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 513800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* binop vAA, vBB, vCC */ 513900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze srl a4, rINST, 8 # a4 <- AA 514000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lbu a2, 2(rPC) # a2 <- BB 514100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lbu a3, 3(rPC) # a3 <- CC 514200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG_DOUBLE f0, a2 # f0 <- vBB 514300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG_DOUBLE f1, a3 # f1 <- vCC 514400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze sub.d f0, f0, f1 # f0 <- f0 op f1 514500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze FETCH_ADVANCE_INST 2 # advance rPC, load rINST 514600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_INST_OPCODE v0 # extract opcode from rINST 514700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze SET_VREG_DOUBLE f0, a4 # vAA <- f0 514800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GOTO_OPCODE v0 # jump to next instruction 514900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 515000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 515100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 515200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 515300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_mul_double: /* 0xad */ 515400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_mul_double.S */ 515500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/fbinopWide.S */ 515600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /*: 515700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Generic 64-bit floating-point operation. 515800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 515900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * For: add-double, sub-double, mul-double, div-double. 516000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * form: <op> f0, f0, f1 516100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 516200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* binop vAA, vBB, vCC */ 516300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze srl a4, rINST, 8 # a4 <- AA 516400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lbu a2, 2(rPC) # a2 <- BB 516500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lbu a3, 3(rPC) # a3 <- CC 516600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG_DOUBLE f0, a2 # f0 <- vBB 516700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG_DOUBLE f1, a3 # f1 <- vCC 516800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze mul.d f0, f0, f1 # f0 <- f0 op f1 516900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze FETCH_ADVANCE_INST 2 # advance rPC, load rINST 517000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_INST_OPCODE v0 # extract opcode from rINST 517100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze SET_VREG_DOUBLE f0, a4 # vAA <- f0 517200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GOTO_OPCODE v0 # jump to next instruction 517300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 517400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 517500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 517600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 517700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_div_double: /* 0xae */ 517800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_div_double.S */ 517900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/fbinopWide.S */ 518000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /*: 518100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Generic 64-bit floating-point operation. 518200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 518300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * For: add-double, sub-double, mul-double, div-double. 518400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * form: <op> f0, f0, f1 518500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 518600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* binop vAA, vBB, vCC */ 518700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze srl a4, rINST, 8 # a4 <- AA 518800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lbu a2, 2(rPC) # a2 <- BB 518900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lbu a3, 3(rPC) # a3 <- CC 519000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG_DOUBLE f0, a2 # f0 <- vBB 519100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG_DOUBLE f1, a3 # f1 <- vCC 519200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze div.d f0, f0, f1 # f0 <- f0 op f1 519300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze FETCH_ADVANCE_INST 2 # advance rPC, load rINST 519400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_INST_OPCODE v0 # extract opcode from rINST 519500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze SET_VREG_DOUBLE f0, a4 # vAA <- f0 519600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GOTO_OPCODE v0 # jump to next instruction 519700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 519800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 519900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 520000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 520100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_rem_double: /* 0xaf */ 520200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_rem_double.S */ 520300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* rem-double vAA, vBB, vCC */ 520400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern fmod 520500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lbu a2, 2(rPC) # a2 <- BB 520600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lbu a3, 3(rPC) # a3 <- CC 520700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG_DOUBLE f12, a2 # f12 <- vBB 520800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG_DOUBLE f13, a3 # f13 <- vCC 520900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jal fmod # f0 <- f12 op f13 521000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze srl a4, rINST, 8 # a4 <- AA 521100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze FETCH_ADVANCE_INST 2 # advance rPC, load rINST 521200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_INST_OPCODE v0 # extract opcode from rINST 521300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze SET_VREG_DOUBLE f0, a4 # vAA <- f0 521400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GOTO_OPCODE v0 # jump to next instruction 521500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 521600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 521700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 521800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_add_int_2addr: /* 0xb0 */ 521900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_add_int_2addr.S */ 522000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/binop2addr.S */ 522100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* 522200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Generic 32-bit "/2addr" binary operation. Provide an "instr" line 522300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * that specifies an instruction that performs "result = a0 op a1". 522400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * This could be a MIPS instruction or a function call. (If the result 522500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * comes back in a register other than a0, you can override "result".) 522600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 522700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * If "chkzero" is set to 1, we perform a divide-by-zero check on 522800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * vB (a1). Useful for integer division and modulus. Note that we 522900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * *don't* check for (INT_MIN / -1) here, because the CPU handles it 523000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * correctly. 523100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 523200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * For: add-int/2addr, sub-int/2addr, mul-int/2addr, div-int/2addr, 523300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * rem-int/2addr, and-int/2addr, or-int/2addr, xor-int/2addr, 523400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * shl-int/2addr, shr-int/2addr, ushr-int/2addr 523500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 523600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* binop/2addr vA, vB */ 523700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ext a2, rINST, 8, 4 # a2 <- A 523800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ext a3, rINST, 12, 4 # a3 <- B 523900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG a0, a2 # a0 <- vA 524000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG a1, a3 # a1 <- vB 524100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .if 0 524200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze beqz a1, common_errDivideByZero # is second operand zero? 524300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .endif 524400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze FETCH_ADVANCE_INST 1 # advance rPC, load rINST 524500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze # optional op 524600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze addu a0, a0, a1 # a0 <- op, a0-a3 changed 524700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_INST_OPCODE v0 # extract opcode from rINST 524800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze SET_VREG a0, a2 # vA <- a0 524900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GOTO_OPCODE v0 # jump to next instruction 525000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 525100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 525200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 525300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 525400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_sub_int_2addr: /* 0xb1 */ 525500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_sub_int_2addr.S */ 525600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/binop2addr.S */ 525700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* 525800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Generic 32-bit "/2addr" binary operation. Provide an "instr" line 525900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * that specifies an instruction that performs "result = a0 op a1". 526000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * This could be a MIPS instruction or a function call. (If the result 526100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * comes back in a register other than a0, you can override "result".) 526200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 526300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * If "chkzero" is set to 1, we perform a divide-by-zero check on 526400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * vB (a1). Useful for integer division and modulus. Note that we 526500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * *don't* check for (INT_MIN / -1) here, because the CPU handles it 526600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * correctly. 526700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 526800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * For: add-int/2addr, sub-int/2addr, mul-int/2addr, div-int/2addr, 526900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * rem-int/2addr, and-int/2addr, or-int/2addr, xor-int/2addr, 527000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * shl-int/2addr, shr-int/2addr, ushr-int/2addr 527100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 527200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* binop/2addr vA, vB */ 527300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ext a2, rINST, 8, 4 # a2 <- A 527400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ext a3, rINST, 12, 4 # a3 <- B 527500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG a0, a2 # a0 <- vA 527600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG a1, a3 # a1 <- vB 527700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .if 0 527800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze beqz a1, common_errDivideByZero # is second operand zero? 527900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .endif 528000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze FETCH_ADVANCE_INST 1 # advance rPC, load rINST 528100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze # optional op 528200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze subu a0, a0, a1 # a0 <- op, a0-a3 changed 528300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_INST_OPCODE v0 # extract opcode from rINST 528400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze SET_VREG a0, a2 # vA <- a0 528500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GOTO_OPCODE v0 # jump to next instruction 528600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 528700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 528800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 528900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 529000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_mul_int_2addr: /* 0xb2 */ 529100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_mul_int_2addr.S */ 529200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/binop2addr.S */ 529300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* 529400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Generic 32-bit "/2addr" binary operation. Provide an "instr" line 529500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * that specifies an instruction that performs "result = a0 op a1". 529600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * This could be a MIPS instruction or a function call. (If the result 529700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * comes back in a register other than a0, you can override "result".) 529800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 529900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * If "chkzero" is set to 1, we perform a divide-by-zero check on 530000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * vB (a1). Useful for integer division and modulus. Note that we 530100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * *don't* check for (INT_MIN / -1) here, because the CPU handles it 530200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * correctly. 530300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 530400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * For: add-int/2addr, sub-int/2addr, mul-int/2addr, div-int/2addr, 530500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * rem-int/2addr, and-int/2addr, or-int/2addr, xor-int/2addr, 530600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * shl-int/2addr, shr-int/2addr, ushr-int/2addr 530700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 530800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* binop/2addr vA, vB */ 530900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ext a2, rINST, 8, 4 # a2 <- A 531000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ext a3, rINST, 12, 4 # a3 <- B 531100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG a0, a2 # a0 <- vA 531200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG a1, a3 # a1 <- vB 531300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .if 0 531400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze beqz a1, common_errDivideByZero # is second operand zero? 531500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .endif 531600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze FETCH_ADVANCE_INST 1 # advance rPC, load rINST 531700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze # optional op 531800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze mul a0, a0, a1 # a0 <- op, a0-a3 changed 531900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_INST_OPCODE v0 # extract opcode from rINST 532000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze SET_VREG a0, a2 # vA <- a0 532100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GOTO_OPCODE v0 # jump to next instruction 532200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 532300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 532400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 532500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 532600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_div_int_2addr: /* 0xb3 */ 532700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_div_int_2addr.S */ 532800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/binop2addr.S */ 532900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* 533000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Generic 32-bit "/2addr" binary operation. Provide an "instr" line 533100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * that specifies an instruction that performs "result = a0 op a1". 533200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * This could be a MIPS instruction or a function call. (If the result 533300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * comes back in a register other than a0, you can override "result".) 533400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 533500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * If "chkzero" is set to 1, we perform a divide-by-zero check on 533600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * vB (a1). Useful for integer division and modulus. Note that we 533700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * *don't* check for (INT_MIN / -1) here, because the CPU handles it 533800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * correctly. 533900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 534000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * For: add-int/2addr, sub-int/2addr, mul-int/2addr, div-int/2addr, 534100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * rem-int/2addr, and-int/2addr, or-int/2addr, xor-int/2addr, 534200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * shl-int/2addr, shr-int/2addr, ushr-int/2addr 534300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 534400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* binop/2addr vA, vB */ 534500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ext a2, rINST, 8, 4 # a2 <- A 534600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ext a3, rINST, 12, 4 # a3 <- B 534700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG a0, a2 # a0 <- vA 534800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG a1, a3 # a1 <- vB 534900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .if 1 535000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze beqz a1, common_errDivideByZero # is second operand zero? 535100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .endif 535200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze FETCH_ADVANCE_INST 1 # advance rPC, load rINST 535300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze # optional op 535400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze div a0, a0, a1 # a0 <- op, a0-a3 changed 535500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_INST_OPCODE v0 # extract opcode from rINST 535600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze SET_VREG a0, a2 # vA <- a0 535700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GOTO_OPCODE v0 # jump to next instruction 535800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 535900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 536000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 536100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 536200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_rem_int_2addr: /* 0xb4 */ 536300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_rem_int_2addr.S */ 536400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/binop2addr.S */ 536500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* 536600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Generic 32-bit "/2addr" binary operation. Provide an "instr" line 536700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * that specifies an instruction that performs "result = a0 op a1". 536800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * This could be a MIPS instruction or a function call. (If the result 536900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * comes back in a register other than a0, you can override "result".) 537000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 537100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * If "chkzero" is set to 1, we perform a divide-by-zero check on 537200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * vB (a1). Useful for integer division and modulus. Note that we 537300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * *don't* check for (INT_MIN / -1) here, because the CPU handles it 537400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * correctly. 537500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 537600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * For: add-int/2addr, sub-int/2addr, mul-int/2addr, div-int/2addr, 537700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * rem-int/2addr, and-int/2addr, or-int/2addr, xor-int/2addr, 537800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * shl-int/2addr, shr-int/2addr, ushr-int/2addr 537900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 538000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* binop/2addr vA, vB */ 538100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ext a2, rINST, 8, 4 # a2 <- A 538200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ext a3, rINST, 12, 4 # a3 <- B 538300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG a0, a2 # a0 <- vA 538400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG a1, a3 # a1 <- vB 538500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .if 1 538600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze beqz a1, common_errDivideByZero # is second operand zero? 538700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .endif 538800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze FETCH_ADVANCE_INST 1 # advance rPC, load rINST 538900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze # optional op 539000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze mod a0, a0, a1 # a0 <- op, a0-a3 changed 539100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_INST_OPCODE v0 # extract opcode from rINST 539200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze SET_VREG a0, a2 # vA <- a0 539300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GOTO_OPCODE v0 # jump to next instruction 539400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 539500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 539600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 539700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 539800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_and_int_2addr: /* 0xb5 */ 539900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_and_int_2addr.S */ 540000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/binop2addr.S */ 540100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* 540200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Generic 32-bit "/2addr" binary operation. Provide an "instr" line 540300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * that specifies an instruction that performs "result = a0 op a1". 540400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * This could be a MIPS instruction or a function call. (If the result 540500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * comes back in a register other than a0, you can override "result".) 540600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 540700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * If "chkzero" is set to 1, we perform a divide-by-zero check on 540800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * vB (a1). Useful for integer division and modulus. Note that we 540900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * *don't* check for (INT_MIN / -1) here, because the CPU handles it 541000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * correctly. 541100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 541200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * For: add-int/2addr, sub-int/2addr, mul-int/2addr, div-int/2addr, 541300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * rem-int/2addr, and-int/2addr, or-int/2addr, xor-int/2addr, 541400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * shl-int/2addr, shr-int/2addr, ushr-int/2addr 541500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 541600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* binop/2addr vA, vB */ 541700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ext a2, rINST, 8, 4 # a2 <- A 541800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ext a3, rINST, 12, 4 # a3 <- B 541900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG a0, a2 # a0 <- vA 542000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG a1, a3 # a1 <- vB 542100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .if 0 542200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze beqz a1, common_errDivideByZero # is second operand zero? 542300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .endif 542400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze FETCH_ADVANCE_INST 1 # advance rPC, load rINST 542500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze # optional op 542600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze and a0, a0, a1 # a0 <- op, a0-a3 changed 542700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_INST_OPCODE v0 # extract opcode from rINST 542800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze SET_VREG a0, a2 # vA <- a0 542900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GOTO_OPCODE v0 # jump to next instruction 543000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 543100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 543200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 543300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 543400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_or_int_2addr: /* 0xb6 */ 543500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_or_int_2addr.S */ 543600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/binop2addr.S */ 543700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* 543800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Generic 32-bit "/2addr" binary operation. Provide an "instr" line 543900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * that specifies an instruction that performs "result = a0 op a1". 544000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * This could be a MIPS instruction or a function call. (If the result 544100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * comes back in a register other than a0, you can override "result".) 544200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 544300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * If "chkzero" is set to 1, we perform a divide-by-zero check on 544400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * vB (a1). Useful for integer division and modulus. Note that we 544500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * *don't* check for (INT_MIN / -1) here, because the CPU handles it 544600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * correctly. 544700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 544800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * For: add-int/2addr, sub-int/2addr, mul-int/2addr, div-int/2addr, 544900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * rem-int/2addr, and-int/2addr, or-int/2addr, xor-int/2addr, 545000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * shl-int/2addr, shr-int/2addr, ushr-int/2addr 545100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 545200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* binop/2addr vA, vB */ 545300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ext a2, rINST, 8, 4 # a2 <- A 545400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ext a3, rINST, 12, 4 # a3 <- B 545500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG a0, a2 # a0 <- vA 545600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG a1, a3 # a1 <- vB 545700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .if 0 545800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze beqz a1, common_errDivideByZero # is second operand zero? 545900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .endif 546000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze FETCH_ADVANCE_INST 1 # advance rPC, load rINST 546100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze # optional op 546200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze or a0, a0, a1 # a0 <- op, a0-a3 changed 546300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_INST_OPCODE v0 # extract opcode from rINST 546400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze SET_VREG a0, a2 # vA <- a0 546500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GOTO_OPCODE v0 # jump to next instruction 546600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 546700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 546800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 546900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 547000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_xor_int_2addr: /* 0xb7 */ 547100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_xor_int_2addr.S */ 547200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/binop2addr.S */ 547300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* 547400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Generic 32-bit "/2addr" binary operation. Provide an "instr" line 547500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * that specifies an instruction that performs "result = a0 op a1". 547600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * This could be a MIPS instruction or a function call. (If the result 547700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * comes back in a register other than a0, you can override "result".) 547800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 547900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * If "chkzero" is set to 1, we perform a divide-by-zero check on 548000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * vB (a1). Useful for integer division and modulus. Note that we 548100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * *don't* check for (INT_MIN / -1) here, because the CPU handles it 548200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * correctly. 548300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 548400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * For: add-int/2addr, sub-int/2addr, mul-int/2addr, div-int/2addr, 548500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * rem-int/2addr, and-int/2addr, or-int/2addr, xor-int/2addr, 548600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * shl-int/2addr, shr-int/2addr, ushr-int/2addr 548700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 548800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* binop/2addr vA, vB */ 548900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ext a2, rINST, 8, 4 # a2 <- A 549000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ext a3, rINST, 12, 4 # a3 <- B 549100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG a0, a2 # a0 <- vA 549200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG a1, a3 # a1 <- vB 549300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .if 0 549400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze beqz a1, common_errDivideByZero # is second operand zero? 549500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .endif 549600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze FETCH_ADVANCE_INST 1 # advance rPC, load rINST 549700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze # optional op 549800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze xor a0, a0, a1 # a0 <- op, a0-a3 changed 549900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_INST_OPCODE v0 # extract opcode from rINST 550000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze SET_VREG a0, a2 # vA <- a0 550100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GOTO_OPCODE v0 # jump to next instruction 550200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 550300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 550400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 550500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 550600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_shl_int_2addr: /* 0xb8 */ 550700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_shl_int_2addr.S */ 550800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/binop2addr.S */ 550900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* 551000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Generic 32-bit "/2addr" binary operation. Provide an "instr" line 551100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * that specifies an instruction that performs "result = a0 op a1". 551200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * This could be a MIPS instruction or a function call. (If the result 551300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * comes back in a register other than a0, you can override "result".) 551400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 551500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * If "chkzero" is set to 1, we perform a divide-by-zero check on 551600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * vB (a1). Useful for integer division and modulus. Note that we 551700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * *don't* check for (INT_MIN / -1) here, because the CPU handles it 551800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * correctly. 551900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 552000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * For: add-int/2addr, sub-int/2addr, mul-int/2addr, div-int/2addr, 552100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * rem-int/2addr, and-int/2addr, or-int/2addr, xor-int/2addr, 552200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * shl-int/2addr, shr-int/2addr, ushr-int/2addr 552300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 552400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* binop/2addr vA, vB */ 552500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ext a2, rINST, 8, 4 # a2 <- A 552600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ext a3, rINST, 12, 4 # a3 <- B 552700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG a0, a2 # a0 <- vA 552800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG a1, a3 # a1 <- vB 552900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .if 0 553000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze beqz a1, common_errDivideByZero # is second operand zero? 553100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .endif 553200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze FETCH_ADVANCE_INST 1 # advance rPC, load rINST 553300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze # optional op 553400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze sll a0, a0, a1 # a0 <- op, a0-a3 changed 553500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_INST_OPCODE v0 # extract opcode from rINST 553600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze SET_VREG a0, a2 # vA <- a0 553700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GOTO_OPCODE v0 # jump to next instruction 553800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 553900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 554000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 554100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 554200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_shr_int_2addr: /* 0xb9 */ 554300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_shr_int_2addr.S */ 554400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/binop2addr.S */ 554500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* 554600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Generic 32-bit "/2addr" binary operation. Provide an "instr" line 554700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * that specifies an instruction that performs "result = a0 op a1". 554800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * This could be a MIPS instruction or a function call. (If the result 554900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * comes back in a register other than a0, you can override "result".) 555000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 555100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * If "chkzero" is set to 1, we perform a divide-by-zero check on 555200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * vB (a1). Useful for integer division and modulus. Note that we 555300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * *don't* check for (INT_MIN / -1) here, because the CPU handles it 555400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * correctly. 555500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 555600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * For: add-int/2addr, sub-int/2addr, mul-int/2addr, div-int/2addr, 555700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * rem-int/2addr, and-int/2addr, or-int/2addr, xor-int/2addr, 555800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * shl-int/2addr, shr-int/2addr, ushr-int/2addr 555900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 556000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* binop/2addr vA, vB */ 556100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ext a2, rINST, 8, 4 # a2 <- A 556200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ext a3, rINST, 12, 4 # a3 <- B 556300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG a0, a2 # a0 <- vA 556400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG a1, a3 # a1 <- vB 556500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .if 0 556600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze beqz a1, common_errDivideByZero # is second operand zero? 556700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .endif 556800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze FETCH_ADVANCE_INST 1 # advance rPC, load rINST 556900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze # optional op 557000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze sra a0, a0, a1 # a0 <- op, a0-a3 changed 557100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_INST_OPCODE v0 # extract opcode from rINST 557200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze SET_VREG a0, a2 # vA <- a0 557300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GOTO_OPCODE v0 # jump to next instruction 557400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 557500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 557600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 557700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 557800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_ushr_int_2addr: /* 0xba */ 557900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_ushr_int_2addr.S */ 558000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/binop2addr.S */ 558100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* 558200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Generic 32-bit "/2addr" binary operation. Provide an "instr" line 558300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * that specifies an instruction that performs "result = a0 op a1". 558400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * This could be a MIPS instruction or a function call. (If the result 558500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * comes back in a register other than a0, you can override "result".) 558600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 558700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * If "chkzero" is set to 1, we perform a divide-by-zero check on 558800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * vB (a1). Useful for integer division and modulus. Note that we 558900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * *don't* check for (INT_MIN / -1) here, because the CPU handles it 559000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * correctly. 559100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 559200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * For: add-int/2addr, sub-int/2addr, mul-int/2addr, div-int/2addr, 559300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * rem-int/2addr, and-int/2addr, or-int/2addr, xor-int/2addr, 559400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * shl-int/2addr, shr-int/2addr, ushr-int/2addr 559500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 559600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* binop/2addr vA, vB */ 559700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ext a2, rINST, 8, 4 # a2 <- A 559800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ext a3, rINST, 12, 4 # a3 <- B 559900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG a0, a2 # a0 <- vA 560000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG a1, a3 # a1 <- vB 560100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .if 0 560200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze beqz a1, common_errDivideByZero # is second operand zero? 560300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .endif 560400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze FETCH_ADVANCE_INST 1 # advance rPC, load rINST 560500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze # optional op 560600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze srl a0, a0, a1 # a0 <- op, a0-a3 changed 560700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_INST_OPCODE v0 # extract opcode from rINST 560800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze SET_VREG a0, a2 # vA <- a0 560900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GOTO_OPCODE v0 # jump to next instruction 561000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 561100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 561200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 561300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 561400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_add_long_2addr: /* 0xbb */ 561500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_add_long_2addr.S */ 561600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/binopWide2addr.S */ 561700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* 561800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Generic 64-bit "/2addr" binary operation. Provide an "instr" line 561900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * that specifies an instruction that performs "result = a0 op a1". 562000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * This could be a MIPS instruction or a function call. (If the result 562100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * comes back in a register other than a0, you can override "result".) 562200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 562300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * If "chkzero" is set to 1, we perform a divide-by-zero check on 562400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * vB (a1). Useful for integer division and modulus. Note that we 562500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * *don't* check for (LONG_MIN / -1) here, because the CPU handles it 562600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * correctly. 562700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 562800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * For: add-long/2addr, sub-long/2addr, mul-long/2addr, div-long/2addr, 562900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * rem-long/2addr, and-long/2addr, or-long/2addr, xor-long/2addr, 563000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * shl-long/2addr, shr-long/2addr, ushr-long/2addr 563100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 563200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* binop/2addr vA, vB */ 563300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ext a2, rINST, 8, 4 # a2 <- A 563400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ext a3, rINST, 12, 4 # a3 <- B 563500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG_WIDE a0, a2 # a0 <- vA 563600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG_WIDE a1, a3 # a1 <- vB 563700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .if 0 563800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze beqz a1, common_errDivideByZero # is second operand zero? 563900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .endif 564000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze FETCH_ADVANCE_INST 1 # advance rPC, load rINST 564100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze # optional op 564200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a0, a0, a1 # a0 <- op, a0-a3 changed 564300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_INST_OPCODE v0 # extract opcode from rINST 564400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze SET_VREG_WIDE a0, a2 # vA <- a0 564500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GOTO_OPCODE v0 # jump to next instruction 564600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 564700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 564800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 564900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 565000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_sub_long_2addr: /* 0xbc */ 565100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_sub_long_2addr.S */ 565200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/binopWide2addr.S */ 565300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* 565400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Generic 64-bit "/2addr" binary operation. Provide an "instr" line 565500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * that specifies an instruction that performs "result = a0 op a1". 565600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * This could be a MIPS instruction or a function call. (If the result 565700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * comes back in a register other than a0, you can override "result".) 565800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 565900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * If "chkzero" is set to 1, we perform a divide-by-zero check on 566000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * vB (a1). Useful for integer division and modulus. Note that we 566100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * *don't* check for (LONG_MIN / -1) here, because the CPU handles it 566200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * correctly. 566300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 566400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * For: add-long/2addr, sub-long/2addr, mul-long/2addr, div-long/2addr, 566500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * rem-long/2addr, and-long/2addr, or-long/2addr, xor-long/2addr, 566600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * shl-long/2addr, shr-long/2addr, ushr-long/2addr 566700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 566800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* binop/2addr vA, vB */ 566900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ext a2, rINST, 8, 4 # a2 <- A 567000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ext a3, rINST, 12, 4 # a3 <- B 567100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG_WIDE a0, a2 # a0 <- vA 567200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG_WIDE a1, a3 # a1 <- vB 567300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .if 0 567400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze beqz a1, common_errDivideByZero # is second operand zero? 567500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .endif 567600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze FETCH_ADVANCE_INST 1 # advance rPC, load rINST 567700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze # optional op 567800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dsubu a0, a0, a1 # a0 <- op, a0-a3 changed 567900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_INST_OPCODE v0 # extract opcode from rINST 568000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze SET_VREG_WIDE a0, a2 # vA <- a0 568100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GOTO_OPCODE v0 # jump to next instruction 568200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 568300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 568400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 568500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 568600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_mul_long_2addr: /* 0xbd */ 568700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_mul_long_2addr.S */ 568800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/binopWide2addr.S */ 568900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* 569000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Generic 64-bit "/2addr" binary operation. Provide an "instr" line 569100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * that specifies an instruction that performs "result = a0 op a1". 569200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * This could be a MIPS instruction or a function call. (If the result 569300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * comes back in a register other than a0, you can override "result".) 569400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 569500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * If "chkzero" is set to 1, we perform a divide-by-zero check on 569600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * vB (a1). Useful for integer division and modulus. Note that we 569700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * *don't* check for (LONG_MIN / -1) here, because the CPU handles it 569800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * correctly. 569900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 570000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * For: add-long/2addr, sub-long/2addr, mul-long/2addr, div-long/2addr, 570100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * rem-long/2addr, and-long/2addr, or-long/2addr, xor-long/2addr, 570200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * shl-long/2addr, shr-long/2addr, ushr-long/2addr 570300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 570400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* binop/2addr vA, vB */ 570500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ext a2, rINST, 8, 4 # a2 <- A 570600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ext a3, rINST, 12, 4 # a3 <- B 570700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG_WIDE a0, a2 # a0 <- vA 570800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG_WIDE a1, a3 # a1 <- vB 570900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .if 0 571000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze beqz a1, common_errDivideByZero # is second operand zero? 571100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .endif 571200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze FETCH_ADVANCE_INST 1 # advance rPC, load rINST 571300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze # optional op 571400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dmul a0, a0, a1 # a0 <- op, a0-a3 changed 571500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_INST_OPCODE v0 # extract opcode from rINST 571600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze SET_VREG_WIDE a0, a2 # vA <- a0 571700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GOTO_OPCODE v0 # jump to next instruction 571800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 571900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 572000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 572100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 572200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_div_long_2addr: /* 0xbe */ 572300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_div_long_2addr.S */ 572400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/binopWide2addr.S */ 572500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* 572600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Generic 64-bit "/2addr" binary operation. Provide an "instr" line 572700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * that specifies an instruction that performs "result = a0 op a1". 572800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * This could be a MIPS instruction or a function call. (If the result 572900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * comes back in a register other than a0, you can override "result".) 573000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 573100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * If "chkzero" is set to 1, we perform a divide-by-zero check on 573200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * vB (a1). Useful for integer division and modulus. Note that we 573300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * *don't* check for (LONG_MIN / -1) here, because the CPU handles it 573400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * correctly. 573500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 573600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * For: add-long/2addr, sub-long/2addr, mul-long/2addr, div-long/2addr, 573700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * rem-long/2addr, and-long/2addr, or-long/2addr, xor-long/2addr, 573800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * shl-long/2addr, shr-long/2addr, ushr-long/2addr 573900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 574000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* binop/2addr vA, vB */ 574100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ext a2, rINST, 8, 4 # a2 <- A 574200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ext a3, rINST, 12, 4 # a3 <- B 574300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG_WIDE a0, a2 # a0 <- vA 574400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG_WIDE a1, a3 # a1 <- vB 574500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .if 1 574600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze beqz a1, common_errDivideByZero # is second operand zero? 574700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .endif 574800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze FETCH_ADVANCE_INST 1 # advance rPC, load rINST 574900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze # optional op 575000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ddiv a0, a0, a1 # a0 <- op, a0-a3 changed 575100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_INST_OPCODE v0 # extract opcode from rINST 575200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze SET_VREG_WIDE a0, a2 # vA <- a0 575300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GOTO_OPCODE v0 # jump to next instruction 575400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 575500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 575600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 575700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 575800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_rem_long_2addr: /* 0xbf */ 575900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_rem_long_2addr.S */ 576000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/binopWide2addr.S */ 576100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* 576200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Generic 64-bit "/2addr" binary operation. Provide an "instr" line 576300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * that specifies an instruction that performs "result = a0 op a1". 576400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * This could be a MIPS instruction or a function call. (If the result 576500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * comes back in a register other than a0, you can override "result".) 576600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 576700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * If "chkzero" is set to 1, we perform a divide-by-zero check on 576800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * vB (a1). Useful for integer division and modulus. Note that we 576900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * *don't* check for (LONG_MIN / -1) here, because the CPU handles it 577000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * correctly. 577100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 577200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * For: add-long/2addr, sub-long/2addr, mul-long/2addr, div-long/2addr, 577300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * rem-long/2addr, and-long/2addr, or-long/2addr, xor-long/2addr, 577400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * shl-long/2addr, shr-long/2addr, ushr-long/2addr 577500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 577600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* binop/2addr vA, vB */ 577700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ext a2, rINST, 8, 4 # a2 <- A 577800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ext a3, rINST, 12, 4 # a3 <- B 577900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG_WIDE a0, a2 # a0 <- vA 578000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG_WIDE a1, a3 # a1 <- vB 578100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .if 1 578200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze beqz a1, common_errDivideByZero # is second operand zero? 578300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .endif 578400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze FETCH_ADVANCE_INST 1 # advance rPC, load rINST 578500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze # optional op 578600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dmod a0, a0, a1 # a0 <- op, a0-a3 changed 578700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_INST_OPCODE v0 # extract opcode from rINST 578800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze SET_VREG_WIDE a0, a2 # vA <- a0 578900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GOTO_OPCODE v0 # jump to next instruction 579000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 579100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 579200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 579300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 579400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_and_long_2addr: /* 0xc0 */ 579500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_and_long_2addr.S */ 579600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/binopWide2addr.S */ 579700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* 579800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Generic 64-bit "/2addr" binary operation. Provide an "instr" line 579900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * that specifies an instruction that performs "result = a0 op a1". 580000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * This could be a MIPS instruction or a function call. (If the result 580100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * comes back in a register other than a0, you can override "result".) 580200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 580300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * If "chkzero" is set to 1, we perform a divide-by-zero check on 580400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * vB (a1). Useful for integer division and modulus. Note that we 580500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * *don't* check for (LONG_MIN / -1) here, because the CPU handles it 580600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * correctly. 580700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 580800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * For: add-long/2addr, sub-long/2addr, mul-long/2addr, div-long/2addr, 580900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * rem-long/2addr, and-long/2addr, or-long/2addr, xor-long/2addr, 581000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * shl-long/2addr, shr-long/2addr, ushr-long/2addr 581100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 581200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* binop/2addr vA, vB */ 581300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ext a2, rINST, 8, 4 # a2 <- A 581400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ext a3, rINST, 12, 4 # a3 <- B 581500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG_WIDE a0, a2 # a0 <- vA 581600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG_WIDE a1, a3 # a1 <- vB 581700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .if 0 581800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze beqz a1, common_errDivideByZero # is second operand zero? 581900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .endif 582000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze FETCH_ADVANCE_INST 1 # advance rPC, load rINST 582100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze # optional op 582200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze and a0, a0, a1 # a0 <- op, a0-a3 changed 582300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_INST_OPCODE v0 # extract opcode from rINST 582400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze SET_VREG_WIDE a0, a2 # vA <- a0 582500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GOTO_OPCODE v0 # jump to next instruction 582600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 582700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 582800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 582900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 583000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_or_long_2addr: /* 0xc1 */ 583100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_or_long_2addr.S */ 583200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/binopWide2addr.S */ 583300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* 583400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Generic 64-bit "/2addr" binary operation. Provide an "instr" line 583500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * that specifies an instruction that performs "result = a0 op a1". 583600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * This could be a MIPS instruction or a function call. (If the result 583700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * comes back in a register other than a0, you can override "result".) 583800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 583900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * If "chkzero" is set to 1, we perform a divide-by-zero check on 584000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * vB (a1). Useful for integer division and modulus. Note that we 584100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * *don't* check for (LONG_MIN / -1) here, because the CPU handles it 584200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * correctly. 584300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 584400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * For: add-long/2addr, sub-long/2addr, mul-long/2addr, div-long/2addr, 584500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * rem-long/2addr, and-long/2addr, or-long/2addr, xor-long/2addr, 584600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * shl-long/2addr, shr-long/2addr, ushr-long/2addr 584700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 584800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* binop/2addr vA, vB */ 584900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ext a2, rINST, 8, 4 # a2 <- A 585000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ext a3, rINST, 12, 4 # a3 <- B 585100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG_WIDE a0, a2 # a0 <- vA 585200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG_WIDE a1, a3 # a1 <- vB 585300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .if 0 585400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze beqz a1, common_errDivideByZero # is second operand zero? 585500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .endif 585600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze FETCH_ADVANCE_INST 1 # advance rPC, load rINST 585700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze # optional op 585800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze or a0, a0, a1 # a0 <- op, a0-a3 changed 585900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_INST_OPCODE v0 # extract opcode from rINST 586000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze SET_VREG_WIDE a0, a2 # vA <- a0 586100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GOTO_OPCODE v0 # jump to next instruction 586200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 586300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 586400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 586500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 586600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_xor_long_2addr: /* 0xc2 */ 586700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_xor_long_2addr.S */ 586800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/binopWide2addr.S */ 586900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* 587000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Generic 64-bit "/2addr" binary operation. Provide an "instr" line 587100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * that specifies an instruction that performs "result = a0 op a1". 587200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * This could be a MIPS instruction or a function call. (If the result 587300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * comes back in a register other than a0, you can override "result".) 587400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 587500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * If "chkzero" is set to 1, we perform a divide-by-zero check on 587600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * vB (a1). Useful for integer division and modulus. Note that we 587700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * *don't* check for (LONG_MIN / -1) here, because the CPU handles it 587800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * correctly. 587900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 588000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * For: add-long/2addr, sub-long/2addr, mul-long/2addr, div-long/2addr, 588100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * rem-long/2addr, and-long/2addr, or-long/2addr, xor-long/2addr, 588200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * shl-long/2addr, shr-long/2addr, ushr-long/2addr 588300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 588400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* binop/2addr vA, vB */ 588500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ext a2, rINST, 8, 4 # a2 <- A 588600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ext a3, rINST, 12, 4 # a3 <- B 588700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG_WIDE a0, a2 # a0 <- vA 588800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG_WIDE a1, a3 # a1 <- vB 588900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .if 0 589000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze beqz a1, common_errDivideByZero # is second operand zero? 589100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .endif 589200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze FETCH_ADVANCE_INST 1 # advance rPC, load rINST 589300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze # optional op 589400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze xor a0, a0, a1 # a0 <- op, a0-a3 changed 589500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_INST_OPCODE v0 # extract opcode from rINST 589600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze SET_VREG_WIDE a0, a2 # vA <- a0 589700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GOTO_OPCODE v0 # jump to next instruction 589800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 589900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 590000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 590100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 590200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_shl_long_2addr: /* 0xc3 */ 590300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_shl_long_2addr.S */ 590400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/binopWide2addr.S */ 590500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* 590600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Generic 64-bit "/2addr" binary operation. Provide an "instr" line 590700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * that specifies an instruction that performs "result = a0 op a1". 590800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * This could be a MIPS instruction or a function call. (If the result 590900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * comes back in a register other than a0, you can override "result".) 591000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 591100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * If "chkzero" is set to 1, we perform a divide-by-zero check on 591200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * vB (a1). Useful for integer division and modulus. Note that we 591300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * *don't* check for (LONG_MIN / -1) here, because the CPU handles it 591400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * correctly. 591500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 591600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * For: add-long/2addr, sub-long/2addr, mul-long/2addr, div-long/2addr, 591700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * rem-long/2addr, and-long/2addr, or-long/2addr, xor-long/2addr, 591800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * shl-long/2addr, shr-long/2addr, ushr-long/2addr 591900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 592000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* binop/2addr vA, vB */ 592100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ext a2, rINST, 8, 4 # a2 <- A 592200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ext a3, rINST, 12, 4 # a3 <- B 592300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG_WIDE a0, a2 # a0 <- vA 592400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG_WIDE a1, a3 # a1 <- vB 592500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .if 0 592600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze beqz a1, common_errDivideByZero # is second operand zero? 592700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .endif 592800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze FETCH_ADVANCE_INST 1 # advance rPC, load rINST 592900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze # optional op 593000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dsll a0, a0, a1 # a0 <- op, a0-a3 changed 593100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_INST_OPCODE v0 # extract opcode from rINST 593200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze SET_VREG_WIDE a0, a2 # vA <- a0 593300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GOTO_OPCODE v0 # jump to next instruction 593400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 593500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 593600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 593700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 593800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_shr_long_2addr: /* 0xc4 */ 593900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_shr_long_2addr.S */ 594000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/binopWide2addr.S */ 594100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* 594200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Generic 64-bit "/2addr" binary operation. Provide an "instr" line 594300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * that specifies an instruction that performs "result = a0 op a1". 594400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * This could be a MIPS instruction or a function call. (If the result 594500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * comes back in a register other than a0, you can override "result".) 594600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 594700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * If "chkzero" is set to 1, we perform a divide-by-zero check on 594800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * vB (a1). Useful for integer division and modulus. Note that we 594900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * *don't* check for (LONG_MIN / -1) here, because the CPU handles it 595000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * correctly. 595100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 595200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * For: add-long/2addr, sub-long/2addr, mul-long/2addr, div-long/2addr, 595300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * rem-long/2addr, and-long/2addr, or-long/2addr, xor-long/2addr, 595400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * shl-long/2addr, shr-long/2addr, ushr-long/2addr 595500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 595600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* binop/2addr vA, vB */ 595700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ext a2, rINST, 8, 4 # a2 <- A 595800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ext a3, rINST, 12, 4 # a3 <- B 595900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG_WIDE a0, a2 # a0 <- vA 596000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG_WIDE a1, a3 # a1 <- vB 596100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .if 0 596200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze beqz a1, common_errDivideByZero # is second operand zero? 596300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .endif 596400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze FETCH_ADVANCE_INST 1 # advance rPC, load rINST 596500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze # optional op 596600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dsra a0, a0, a1 # a0 <- op, a0-a3 changed 596700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_INST_OPCODE v0 # extract opcode from rINST 596800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze SET_VREG_WIDE a0, a2 # vA <- a0 596900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GOTO_OPCODE v0 # jump to next instruction 597000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 597100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 597200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 597300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 597400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_ushr_long_2addr: /* 0xc5 */ 597500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_ushr_long_2addr.S */ 597600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/binopWide2addr.S */ 597700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* 597800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Generic 64-bit "/2addr" binary operation. Provide an "instr" line 597900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * that specifies an instruction that performs "result = a0 op a1". 598000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * This could be a MIPS instruction or a function call. (If the result 598100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * comes back in a register other than a0, you can override "result".) 598200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 598300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * If "chkzero" is set to 1, we perform a divide-by-zero check on 598400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * vB (a1). Useful for integer division and modulus. Note that we 598500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * *don't* check for (LONG_MIN / -1) here, because the CPU handles it 598600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * correctly. 598700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 598800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * For: add-long/2addr, sub-long/2addr, mul-long/2addr, div-long/2addr, 598900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * rem-long/2addr, and-long/2addr, or-long/2addr, xor-long/2addr, 599000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * shl-long/2addr, shr-long/2addr, ushr-long/2addr 599100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 599200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* binop/2addr vA, vB */ 599300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ext a2, rINST, 8, 4 # a2 <- A 599400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ext a3, rINST, 12, 4 # a3 <- B 599500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG_WIDE a0, a2 # a0 <- vA 599600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG_WIDE a1, a3 # a1 <- vB 599700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .if 0 599800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze beqz a1, common_errDivideByZero # is second operand zero? 599900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .endif 600000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze FETCH_ADVANCE_INST 1 # advance rPC, load rINST 600100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze # optional op 600200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dsrl a0, a0, a1 # a0 <- op, a0-a3 changed 600300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_INST_OPCODE v0 # extract opcode from rINST 600400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze SET_VREG_WIDE a0, a2 # vA <- a0 600500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GOTO_OPCODE v0 # jump to next instruction 600600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 600700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 600800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 600900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 601000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_add_float_2addr: /* 0xc6 */ 601100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_add_float_2addr.S */ 601200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/fbinop2addr.S */ 601300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /*: 601400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Generic 32-bit "/2addr" floating-point operation. 601500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 601600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * For: add-float/2addr, sub-float/2addr, mul-float/2addr, div-float/2addr. 601700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * form: <op> f0, f0, f1 601800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 601900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* binop/2addr vA, vB */ 602000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ext a2, rINST, 8, 4 # a2 <- A 602100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ext a3, rINST, 12, 4 # a3 <- B 602200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG_FLOAT f0, a2 # f0 <- vA 602300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG_FLOAT f1, a3 # f1 <- vB 602400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze add.s f0, f0, f1 # f0 <- f0 op f1 602500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze FETCH_ADVANCE_INST 1 # advance rPC, load rINST 602600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_INST_OPCODE v0 # extract opcode from rINST 602700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze SET_VREG_FLOAT f0, a2 # vA <- f0 602800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GOTO_OPCODE v0 # jump to next instruction 602900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 603000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 603100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 603200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 603300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_sub_float_2addr: /* 0xc7 */ 603400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_sub_float_2addr.S */ 603500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/fbinop2addr.S */ 603600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /*: 603700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Generic 32-bit "/2addr" floating-point operation. 603800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 603900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * For: add-float/2addr, sub-float/2addr, mul-float/2addr, div-float/2addr. 604000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * form: <op> f0, f0, f1 604100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 604200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* binop/2addr vA, vB */ 604300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ext a2, rINST, 8, 4 # a2 <- A 604400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ext a3, rINST, 12, 4 # a3 <- B 604500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG_FLOAT f0, a2 # f0 <- vA 604600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG_FLOAT f1, a3 # f1 <- vB 604700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze sub.s f0, f0, f1 # f0 <- f0 op f1 604800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze FETCH_ADVANCE_INST 1 # advance rPC, load rINST 604900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_INST_OPCODE v0 # extract opcode from rINST 605000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze SET_VREG_FLOAT f0, a2 # vA <- f0 605100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GOTO_OPCODE v0 # jump to next instruction 605200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 605300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 605400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 605500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 605600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_mul_float_2addr: /* 0xc8 */ 605700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_mul_float_2addr.S */ 605800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/fbinop2addr.S */ 605900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /*: 606000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Generic 32-bit "/2addr" floating-point operation. 606100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 606200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * For: add-float/2addr, sub-float/2addr, mul-float/2addr, div-float/2addr. 606300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * form: <op> f0, f0, f1 606400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 606500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* binop/2addr vA, vB */ 606600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ext a2, rINST, 8, 4 # a2 <- A 606700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ext a3, rINST, 12, 4 # a3 <- B 606800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG_FLOAT f0, a2 # f0 <- vA 606900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG_FLOAT f1, a3 # f1 <- vB 607000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze mul.s f0, f0, f1 # f0 <- f0 op f1 607100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze FETCH_ADVANCE_INST 1 # advance rPC, load rINST 607200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_INST_OPCODE v0 # extract opcode from rINST 607300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze SET_VREG_FLOAT f0, a2 # vA <- f0 607400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GOTO_OPCODE v0 # jump to next instruction 607500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 607600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 607700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 607800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 607900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_div_float_2addr: /* 0xc9 */ 608000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_div_float_2addr.S */ 608100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/fbinop2addr.S */ 608200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /*: 608300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Generic 32-bit "/2addr" floating-point operation. 608400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 608500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * For: add-float/2addr, sub-float/2addr, mul-float/2addr, div-float/2addr. 608600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * form: <op> f0, f0, f1 608700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 608800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* binop/2addr vA, vB */ 608900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ext a2, rINST, 8, 4 # a2 <- A 609000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ext a3, rINST, 12, 4 # a3 <- B 609100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG_FLOAT f0, a2 # f0 <- vA 609200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG_FLOAT f1, a3 # f1 <- vB 609300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze div.s f0, f0, f1 # f0 <- f0 op f1 609400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze FETCH_ADVANCE_INST 1 # advance rPC, load rINST 609500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_INST_OPCODE v0 # extract opcode from rINST 609600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze SET_VREG_FLOAT f0, a2 # vA <- f0 609700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GOTO_OPCODE v0 # jump to next instruction 609800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 609900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 610000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 610100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 610200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_rem_float_2addr: /* 0xca */ 610300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_rem_float_2addr.S */ 610400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* rem-float/2addr vA, vB */ 610500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern fmodf 610600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ext a2, rINST, 8, 4 # a2 <- A 610700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ext a3, rINST, 12, 4 # a3 <- B 610800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG_FLOAT f12, a2 # f12 <- vA 610900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG_FLOAT f13, a3 # f13 <- vB 611000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jal fmodf # f0 <- f12 op f13 611100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ext a2, rINST, 8, 4 # a2 <- A 611200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze FETCH_ADVANCE_INST 1 # advance rPC, load rINST 611300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_INST_OPCODE v0 # extract opcode from rINST 611400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze SET_VREG_FLOAT f0, a2 # vA <- f0 611500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GOTO_OPCODE v0 # jump to next instruction 611600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 611700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 611800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 611900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_add_double_2addr: /* 0xcb */ 612000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_add_double_2addr.S */ 612100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/fbinopWide2addr.S */ 612200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /*: 612300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Generic 64-bit "/2addr" floating-point operation. 612400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 612500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * For: add-double/2addr, sub-double/2addr, mul-double/2addr, div-double/2addr. 612600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * form: <op> f0, f0, f1 612700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 612800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* binop/2addr vA, vB */ 612900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ext a2, rINST, 8, 4 # a2 <- A 613000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ext a3, rINST, 12, 4 # a3 <- B 613100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG_DOUBLE f0, a2 # f0 <- vA 613200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG_DOUBLE f1, a3 # f1 <- vB 613300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze add.d f0, f0, f1 # f0 <- f0 op f1 613400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze FETCH_ADVANCE_INST 1 # advance rPC, load rINST 613500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_INST_OPCODE v0 # extract opcode from rINST 613600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze SET_VREG_DOUBLE f0, a2 # vA <- f0 613700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GOTO_OPCODE v0 # jump to next instruction 613800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 613900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 614000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 614100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 614200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_sub_double_2addr: /* 0xcc */ 614300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_sub_double_2addr.S */ 614400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/fbinopWide2addr.S */ 614500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /*: 614600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Generic 64-bit "/2addr" floating-point operation. 614700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 614800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * For: add-double/2addr, sub-double/2addr, mul-double/2addr, div-double/2addr. 614900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * form: <op> f0, f0, f1 615000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 615100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* binop/2addr vA, vB */ 615200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ext a2, rINST, 8, 4 # a2 <- A 615300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ext a3, rINST, 12, 4 # a3 <- B 615400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG_DOUBLE f0, a2 # f0 <- vA 615500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG_DOUBLE f1, a3 # f1 <- vB 615600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze sub.d f0, f0, f1 # f0 <- f0 op f1 615700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze FETCH_ADVANCE_INST 1 # advance rPC, load rINST 615800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_INST_OPCODE v0 # extract opcode from rINST 615900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze SET_VREG_DOUBLE f0, a2 # vA <- f0 616000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GOTO_OPCODE v0 # jump to next instruction 616100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 616200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 616300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 616400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 616500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_mul_double_2addr: /* 0xcd */ 616600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_mul_double_2addr.S */ 616700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/fbinopWide2addr.S */ 616800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /*: 616900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Generic 64-bit "/2addr" floating-point operation. 617000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 617100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * For: add-double/2addr, sub-double/2addr, mul-double/2addr, div-double/2addr. 617200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * form: <op> f0, f0, f1 617300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 617400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* binop/2addr vA, vB */ 617500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ext a2, rINST, 8, 4 # a2 <- A 617600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ext a3, rINST, 12, 4 # a3 <- B 617700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG_DOUBLE f0, a2 # f0 <- vA 617800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG_DOUBLE f1, a3 # f1 <- vB 617900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze mul.d f0, f0, f1 # f0 <- f0 op f1 618000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze FETCH_ADVANCE_INST 1 # advance rPC, load rINST 618100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_INST_OPCODE v0 # extract opcode from rINST 618200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze SET_VREG_DOUBLE f0, a2 # vA <- f0 618300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GOTO_OPCODE v0 # jump to next instruction 618400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 618500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 618600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 618700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 618800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_div_double_2addr: /* 0xce */ 618900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_div_double_2addr.S */ 619000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/fbinopWide2addr.S */ 619100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /*: 619200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Generic 64-bit "/2addr" floating-point operation. 619300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 619400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * For: add-double/2addr, sub-double/2addr, mul-double/2addr, div-double/2addr. 619500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * form: <op> f0, f0, f1 619600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 619700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* binop/2addr vA, vB */ 619800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ext a2, rINST, 8, 4 # a2 <- A 619900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ext a3, rINST, 12, 4 # a3 <- B 620000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG_DOUBLE f0, a2 # f0 <- vA 620100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG_DOUBLE f1, a3 # f1 <- vB 620200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze div.d f0, f0, f1 # f0 <- f0 op f1 620300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze FETCH_ADVANCE_INST 1 # advance rPC, load rINST 620400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_INST_OPCODE v0 # extract opcode from rINST 620500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze SET_VREG_DOUBLE f0, a2 # vA <- f0 620600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GOTO_OPCODE v0 # jump to next instruction 620700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 620800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 620900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 621000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 621100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_rem_double_2addr: /* 0xcf */ 621200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_rem_double_2addr.S */ 621300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* rem-double/2addr vA, vB */ 621400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern fmod 621500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ext a2, rINST, 8, 4 # a2 <- A 621600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ext a3, rINST, 12, 4 # a3 <- B 621700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG_DOUBLE f12, a2 # f12 <- vA 621800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG_DOUBLE f13, a3 # f13 <- vB 621900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jal fmod # f0 <- f12 op f13 622000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ext a2, rINST, 8, 4 # a2 <- A 622100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze FETCH_ADVANCE_INST 1 # advance rPC, load rINST 622200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_INST_OPCODE v0 # extract opcode from rINST 622300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze SET_VREG_DOUBLE f0, a2 # vA <- f0 622400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GOTO_OPCODE v0 # jump to next instruction 622500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 622600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 622700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 622800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_add_int_lit16: /* 0xd0 */ 622900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_add_int_lit16.S */ 623000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/binopLit16.S */ 623100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* 623200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Generic 32-bit "lit16" binary operation. Provide an "instr" line 623300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * that specifies an instruction that performs "result = a0 op a1". 623400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * This could be an MIPS instruction or a function call. (If the result 623500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * comes back in a register other than a0, you can override "result".) 623600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 623700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * If "chkzero" is set to 1, we perform a divide-by-zero check on 623800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * CCCC (a1). Useful for integer division and modulus. 623900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 624000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * For: add-int/lit16, rsub-int, mul-int/lit16, div-int/lit16, 624100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * rem-int/lit16, and-int/lit16, or-int/lit16, xor-int/lit16 624200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 624300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* binop/lit16 vA, vB, #+CCCC */ 624400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lh a1, 2(rPC) # a1 <- sign-extended CCCC 624500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ext a2, rINST, 8, 4 # a2 <- A 624600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ext a3, rINST, 12, 4 # a3 <- B 624700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG a0, a3 # a0 <- vB 624800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .if 0 624900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze beqz a1, common_errDivideByZero # is second operand zero? 625000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .endif 625100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze FETCH_ADVANCE_INST 2 # advance rPC, load rINST 625200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze # optional op 625300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze addu a0, a0, a1 # a0 <- op, a0-a3 changed 625400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_INST_OPCODE v0 # extract opcode from rINST 625500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze SET_VREG a0, a2 # vA <- a0 625600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GOTO_OPCODE v0 # jump to next instruction 625700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 625800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 625900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 626000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 626100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 626200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_rsub_int: /* 0xd1 */ 626300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_rsub_int.S */ 626400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/binopLit16.S */ 626500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* 626600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Generic 32-bit "lit16" binary operation. Provide an "instr" line 626700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * that specifies an instruction that performs "result = a0 op a1". 626800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * This could be an MIPS instruction or a function call. (If the result 626900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * comes back in a register other than a0, you can override "result".) 627000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 627100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * If "chkzero" is set to 1, we perform a divide-by-zero check on 627200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * CCCC (a1). Useful for integer division and modulus. 627300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 627400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * For: add-int/lit16, rsub-int, mul-int/lit16, div-int/lit16, 627500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * rem-int/lit16, and-int/lit16, or-int/lit16, xor-int/lit16 627600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 627700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* binop/lit16 vA, vB, #+CCCC */ 627800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lh a1, 2(rPC) # a1 <- sign-extended CCCC 627900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ext a2, rINST, 8, 4 # a2 <- A 628000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ext a3, rINST, 12, 4 # a3 <- B 628100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG a0, a3 # a0 <- vB 628200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .if 0 628300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze beqz a1, common_errDivideByZero # is second operand zero? 628400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .endif 628500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze FETCH_ADVANCE_INST 2 # advance rPC, load rINST 628600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze # optional op 628700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze subu a0, a1, a0 # a0 <- op, a0-a3 changed 628800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_INST_OPCODE v0 # extract opcode from rINST 628900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze SET_VREG a0, a2 # vA <- a0 629000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GOTO_OPCODE v0 # jump to next instruction 629100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 629200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 629300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 629400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 629500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 629600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_mul_int_lit16: /* 0xd2 */ 629700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_mul_int_lit16.S */ 629800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/binopLit16.S */ 629900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* 630000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Generic 32-bit "lit16" binary operation. Provide an "instr" line 630100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * that specifies an instruction that performs "result = a0 op a1". 630200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * This could be an MIPS instruction or a function call. (If the result 630300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * comes back in a register other than a0, you can override "result".) 630400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 630500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * If "chkzero" is set to 1, we perform a divide-by-zero check on 630600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * CCCC (a1). Useful for integer division and modulus. 630700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 630800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * For: add-int/lit16, rsub-int, mul-int/lit16, div-int/lit16, 630900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * rem-int/lit16, and-int/lit16, or-int/lit16, xor-int/lit16 631000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 631100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* binop/lit16 vA, vB, #+CCCC */ 631200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lh a1, 2(rPC) # a1 <- sign-extended CCCC 631300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ext a2, rINST, 8, 4 # a2 <- A 631400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ext a3, rINST, 12, 4 # a3 <- B 631500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG a0, a3 # a0 <- vB 631600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .if 0 631700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze beqz a1, common_errDivideByZero # is second operand zero? 631800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .endif 631900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze FETCH_ADVANCE_INST 2 # advance rPC, load rINST 632000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze # optional op 632100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze mul a0, a0, a1 # a0 <- op, a0-a3 changed 632200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_INST_OPCODE v0 # extract opcode from rINST 632300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze SET_VREG a0, a2 # vA <- a0 632400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GOTO_OPCODE v0 # jump to next instruction 632500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 632600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 632700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 632800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 632900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 633000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_div_int_lit16: /* 0xd3 */ 633100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_div_int_lit16.S */ 633200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/binopLit16.S */ 633300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* 633400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Generic 32-bit "lit16" binary operation. Provide an "instr" line 633500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * that specifies an instruction that performs "result = a0 op a1". 633600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * This could be an MIPS instruction or a function call. (If the result 633700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * comes back in a register other than a0, you can override "result".) 633800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 633900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * If "chkzero" is set to 1, we perform a divide-by-zero check on 634000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * CCCC (a1). Useful for integer division and modulus. 634100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 634200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * For: add-int/lit16, rsub-int, mul-int/lit16, div-int/lit16, 634300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * rem-int/lit16, and-int/lit16, or-int/lit16, xor-int/lit16 634400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 634500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* binop/lit16 vA, vB, #+CCCC */ 634600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lh a1, 2(rPC) # a1 <- sign-extended CCCC 634700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ext a2, rINST, 8, 4 # a2 <- A 634800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ext a3, rINST, 12, 4 # a3 <- B 634900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG a0, a3 # a0 <- vB 635000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .if 1 635100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze beqz a1, common_errDivideByZero # is second operand zero? 635200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .endif 635300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze FETCH_ADVANCE_INST 2 # advance rPC, load rINST 635400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze # optional op 635500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze div a0, a0, a1 # a0 <- op, a0-a3 changed 635600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_INST_OPCODE v0 # extract opcode from rINST 635700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze SET_VREG a0, a2 # vA <- a0 635800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GOTO_OPCODE v0 # jump to next instruction 635900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 636000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 636100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 636200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 636300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 636400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_rem_int_lit16: /* 0xd4 */ 636500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_rem_int_lit16.S */ 636600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/binopLit16.S */ 636700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* 636800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Generic 32-bit "lit16" binary operation. Provide an "instr" line 636900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * that specifies an instruction that performs "result = a0 op a1". 637000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * This could be an MIPS instruction or a function call. (If the result 637100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * comes back in a register other than a0, you can override "result".) 637200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 637300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * If "chkzero" is set to 1, we perform a divide-by-zero check on 637400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * CCCC (a1). Useful for integer division and modulus. 637500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 637600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * For: add-int/lit16, rsub-int, mul-int/lit16, div-int/lit16, 637700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * rem-int/lit16, and-int/lit16, or-int/lit16, xor-int/lit16 637800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 637900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* binop/lit16 vA, vB, #+CCCC */ 638000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lh a1, 2(rPC) # a1 <- sign-extended CCCC 638100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ext a2, rINST, 8, 4 # a2 <- A 638200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ext a3, rINST, 12, 4 # a3 <- B 638300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG a0, a3 # a0 <- vB 638400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .if 1 638500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze beqz a1, common_errDivideByZero # is second operand zero? 638600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .endif 638700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze FETCH_ADVANCE_INST 2 # advance rPC, load rINST 638800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze # optional op 638900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze mod a0, a0, a1 # a0 <- op, a0-a3 changed 639000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_INST_OPCODE v0 # extract opcode from rINST 639100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze SET_VREG a0, a2 # vA <- a0 639200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GOTO_OPCODE v0 # jump to next instruction 639300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 639400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 639500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 639600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 639700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 639800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_and_int_lit16: /* 0xd5 */ 639900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_and_int_lit16.S */ 640000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/binopLit16.S */ 640100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* 640200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Generic 32-bit "lit16" binary operation. Provide an "instr" line 640300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * that specifies an instruction that performs "result = a0 op a1". 640400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * This could be an MIPS instruction or a function call. (If the result 640500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * comes back in a register other than a0, you can override "result".) 640600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 640700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * If "chkzero" is set to 1, we perform a divide-by-zero check on 640800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * CCCC (a1). Useful for integer division and modulus. 640900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 641000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * For: add-int/lit16, rsub-int, mul-int/lit16, div-int/lit16, 641100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * rem-int/lit16, and-int/lit16, or-int/lit16, xor-int/lit16 641200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 641300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* binop/lit16 vA, vB, #+CCCC */ 641400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lh a1, 2(rPC) # a1 <- sign-extended CCCC 641500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ext a2, rINST, 8, 4 # a2 <- A 641600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ext a3, rINST, 12, 4 # a3 <- B 641700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG a0, a3 # a0 <- vB 641800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .if 0 641900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze beqz a1, common_errDivideByZero # is second operand zero? 642000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .endif 642100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze FETCH_ADVANCE_INST 2 # advance rPC, load rINST 642200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze # optional op 642300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze and a0, a0, a1 # a0 <- op, a0-a3 changed 642400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_INST_OPCODE v0 # extract opcode from rINST 642500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze SET_VREG a0, a2 # vA <- a0 642600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GOTO_OPCODE v0 # jump to next instruction 642700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 642800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 642900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 643000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 643100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 643200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_or_int_lit16: /* 0xd6 */ 643300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_or_int_lit16.S */ 643400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/binopLit16.S */ 643500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* 643600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Generic 32-bit "lit16" binary operation. Provide an "instr" line 643700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * that specifies an instruction that performs "result = a0 op a1". 643800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * This could be an MIPS instruction or a function call. (If the result 643900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * comes back in a register other than a0, you can override "result".) 644000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 644100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * If "chkzero" is set to 1, we perform a divide-by-zero check on 644200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * CCCC (a1). Useful for integer division and modulus. 644300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 644400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * For: add-int/lit16, rsub-int, mul-int/lit16, div-int/lit16, 644500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * rem-int/lit16, and-int/lit16, or-int/lit16, xor-int/lit16 644600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 644700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* binop/lit16 vA, vB, #+CCCC */ 644800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lh a1, 2(rPC) # a1 <- sign-extended CCCC 644900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ext a2, rINST, 8, 4 # a2 <- A 645000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ext a3, rINST, 12, 4 # a3 <- B 645100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG a0, a3 # a0 <- vB 645200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .if 0 645300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze beqz a1, common_errDivideByZero # is second operand zero? 645400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .endif 645500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze FETCH_ADVANCE_INST 2 # advance rPC, load rINST 645600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze # optional op 645700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze or a0, a0, a1 # a0 <- op, a0-a3 changed 645800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_INST_OPCODE v0 # extract opcode from rINST 645900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze SET_VREG a0, a2 # vA <- a0 646000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GOTO_OPCODE v0 # jump to next instruction 646100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 646200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 646300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 646400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 646500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 646600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_xor_int_lit16: /* 0xd7 */ 646700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_xor_int_lit16.S */ 646800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/binopLit16.S */ 646900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* 647000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Generic 32-bit "lit16" binary operation. Provide an "instr" line 647100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * that specifies an instruction that performs "result = a0 op a1". 647200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * This could be an MIPS instruction or a function call. (If the result 647300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * comes back in a register other than a0, you can override "result".) 647400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 647500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * If "chkzero" is set to 1, we perform a divide-by-zero check on 647600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * CCCC (a1). Useful for integer division and modulus. 647700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 647800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * For: add-int/lit16, rsub-int, mul-int/lit16, div-int/lit16, 647900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * rem-int/lit16, and-int/lit16, or-int/lit16, xor-int/lit16 648000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 648100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* binop/lit16 vA, vB, #+CCCC */ 648200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lh a1, 2(rPC) # a1 <- sign-extended CCCC 648300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ext a2, rINST, 8, 4 # a2 <- A 648400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ext a3, rINST, 12, 4 # a3 <- B 648500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG a0, a3 # a0 <- vB 648600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .if 0 648700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze beqz a1, common_errDivideByZero # is second operand zero? 648800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .endif 648900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze FETCH_ADVANCE_INST 2 # advance rPC, load rINST 649000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze # optional op 649100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze xor a0, a0, a1 # a0 <- op, a0-a3 changed 649200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_INST_OPCODE v0 # extract opcode from rINST 649300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze SET_VREG a0, a2 # vA <- a0 649400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GOTO_OPCODE v0 # jump to next instruction 649500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 649600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 649700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 649800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 649900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 650000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_add_int_lit8: /* 0xd8 */ 650100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_add_int_lit8.S */ 650200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/binopLit8.S */ 650300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* 650400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Generic 32-bit "lit8" binary operation. Provide an "instr" line 650500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * that specifies an instruction that performs "result = a0 op a1". 650600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * This could be an MIPS instruction or a function call. (If the result 650700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * comes back in a register other than a0, you can override "result".) 650800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 650900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * If "chkzero" is set to 1, we perform a divide-by-zero check on 651000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * CC (a1). Useful for integer division and modulus. 651100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 651200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * For: add-int/lit8, rsub-int/lit8, mul-int/lit8, div-int/lit8, 651300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * rem-int/lit8, and-int/lit8, or-int/lit8, xor-int/lit8, 651400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * shl-int/lit8, shr-int/lit8, ushr-int/lit8 651500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 651600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* binop/lit8 vAA, vBB, #+CC */ 651700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lbu a3, 2(rPC) # a3 <- BB 651800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lb a1, 3(rPC) # a1 <- sign-extended CC 651900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze srl a2, rINST, 8 # a2 <- AA 652000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG a0, a3 # a0 <- vBB 652100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .if 0 652200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze beqz a1, common_errDivideByZero # is second operand zero? 652300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .endif 652400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze FETCH_ADVANCE_INST 2 # advance rPC, load rINST 652500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze # optional op 652600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze addu a0, a0, a1 # a0 <- op, a0-a3 changed 652700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_INST_OPCODE v0 # extract opcode from rINST 652800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze SET_VREG a0, a2 # vAA <- a0 652900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GOTO_OPCODE v0 # jump to next instruction 653000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 653100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 653200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 653300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 653400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 653500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_rsub_int_lit8: /* 0xd9 */ 653600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_rsub_int_lit8.S */ 653700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/binopLit8.S */ 653800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* 653900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Generic 32-bit "lit8" binary operation. Provide an "instr" line 654000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * that specifies an instruction that performs "result = a0 op a1". 654100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * This could be an MIPS instruction or a function call. (If the result 654200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * comes back in a register other than a0, you can override "result".) 654300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 654400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * If "chkzero" is set to 1, we perform a divide-by-zero check on 654500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * CC (a1). Useful for integer division and modulus. 654600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 654700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * For: add-int/lit8, rsub-int/lit8, mul-int/lit8, div-int/lit8, 654800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * rem-int/lit8, and-int/lit8, or-int/lit8, xor-int/lit8, 654900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * shl-int/lit8, shr-int/lit8, ushr-int/lit8 655000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 655100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* binop/lit8 vAA, vBB, #+CC */ 655200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lbu a3, 2(rPC) # a3 <- BB 655300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lb a1, 3(rPC) # a1 <- sign-extended CC 655400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze srl a2, rINST, 8 # a2 <- AA 655500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG a0, a3 # a0 <- vBB 655600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .if 0 655700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze beqz a1, common_errDivideByZero # is second operand zero? 655800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .endif 655900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze FETCH_ADVANCE_INST 2 # advance rPC, load rINST 656000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze # optional op 656100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze subu a0, a1, a0 # a0 <- op, a0-a3 changed 656200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_INST_OPCODE v0 # extract opcode from rINST 656300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze SET_VREG a0, a2 # vAA <- a0 656400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GOTO_OPCODE v0 # jump to next instruction 656500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 656600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 656700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 656800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 656900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 657000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_mul_int_lit8: /* 0xda */ 657100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_mul_int_lit8.S */ 657200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/binopLit8.S */ 657300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* 657400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Generic 32-bit "lit8" binary operation. Provide an "instr" line 657500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * that specifies an instruction that performs "result = a0 op a1". 657600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * This could be an MIPS instruction or a function call. (If the result 657700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * comes back in a register other than a0, you can override "result".) 657800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 657900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * If "chkzero" is set to 1, we perform a divide-by-zero check on 658000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * CC (a1). Useful for integer division and modulus. 658100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 658200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * For: add-int/lit8, rsub-int/lit8, mul-int/lit8, div-int/lit8, 658300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * rem-int/lit8, and-int/lit8, or-int/lit8, xor-int/lit8, 658400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * shl-int/lit8, shr-int/lit8, ushr-int/lit8 658500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 658600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* binop/lit8 vAA, vBB, #+CC */ 658700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lbu a3, 2(rPC) # a3 <- BB 658800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lb a1, 3(rPC) # a1 <- sign-extended CC 658900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze srl a2, rINST, 8 # a2 <- AA 659000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG a0, a3 # a0 <- vBB 659100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .if 0 659200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze beqz a1, common_errDivideByZero # is second operand zero? 659300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .endif 659400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze FETCH_ADVANCE_INST 2 # advance rPC, load rINST 659500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze # optional op 659600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze mul a0, a0, a1 # a0 <- op, a0-a3 changed 659700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_INST_OPCODE v0 # extract opcode from rINST 659800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze SET_VREG a0, a2 # vAA <- a0 659900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GOTO_OPCODE v0 # jump to next instruction 660000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 660100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 660200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 660300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 660400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 660500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_div_int_lit8: /* 0xdb */ 660600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_div_int_lit8.S */ 660700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/binopLit8.S */ 660800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* 660900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Generic 32-bit "lit8" binary operation. Provide an "instr" line 661000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * that specifies an instruction that performs "result = a0 op a1". 661100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * This could be an MIPS instruction or a function call. (If the result 661200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * comes back in a register other than a0, you can override "result".) 661300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 661400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * If "chkzero" is set to 1, we perform a divide-by-zero check on 661500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * CC (a1). Useful for integer division and modulus. 661600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 661700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * For: add-int/lit8, rsub-int/lit8, mul-int/lit8, div-int/lit8, 661800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * rem-int/lit8, and-int/lit8, or-int/lit8, xor-int/lit8, 661900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * shl-int/lit8, shr-int/lit8, ushr-int/lit8 662000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 662100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* binop/lit8 vAA, vBB, #+CC */ 662200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lbu a3, 2(rPC) # a3 <- BB 662300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lb a1, 3(rPC) # a1 <- sign-extended CC 662400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze srl a2, rINST, 8 # a2 <- AA 662500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG a0, a3 # a0 <- vBB 662600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .if 1 662700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze beqz a1, common_errDivideByZero # is second operand zero? 662800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .endif 662900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze FETCH_ADVANCE_INST 2 # advance rPC, load rINST 663000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze # optional op 663100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze div a0, a0, a1 # a0 <- op, a0-a3 changed 663200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_INST_OPCODE v0 # extract opcode from rINST 663300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze SET_VREG a0, a2 # vAA <- a0 663400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GOTO_OPCODE v0 # jump to next instruction 663500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 663600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 663700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 663800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 663900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 664000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_rem_int_lit8: /* 0xdc */ 664100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_rem_int_lit8.S */ 664200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/binopLit8.S */ 664300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* 664400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Generic 32-bit "lit8" binary operation. Provide an "instr" line 664500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * that specifies an instruction that performs "result = a0 op a1". 664600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * This could be an MIPS instruction or a function call. (If the result 664700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * comes back in a register other than a0, you can override "result".) 664800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 664900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * If "chkzero" is set to 1, we perform a divide-by-zero check on 665000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * CC (a1). Useful for integer division and modulus. 665100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 665200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * For: add-int/lit8, rsub-int/lit8, mul-int/lit8, div-int/lit8, 665300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * rem-int/lit8, and-int/lit8, or-int/lit8, xor-int/lit8, 665400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * shl-int/lit8, shr-int/lit8, ushr-int/lit8 665500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 665600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* binop/lit8 vAA, vBB, #+CC */ 665700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lbu a3, 2(rPC) # a3 <- BB 665800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lb a1, 3(rPC) # a1 <- sign-extended CC 665900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze srl a2, rINST, 8 # a2 <- AA 666000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG a0, a3 # a0 <- vBB 666100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .if 1 666200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze beqz a1, common_errDivideByZero # is second operand zero? 666300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .endif 666400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze FETCH_ADVANCE_INST 2 # advance rPC, load rINST 666500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze # optional op 666600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze mod a0, a0, a1 # a0 <- op, a0-a3 changed 666700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_INST_OPCODE v0 # extract opcode from rINST 666800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze SET_VREG a0, a2 # vAA <- a0 666900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GOTO_OPCODE v0 # jump to next instruction 667000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 667100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 667200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 667300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 667400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 667500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_and_int_lit8: /* 0xdd */ 667600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_and_int_lit8.S */ 667700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/binopLit8.S */ 667800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* 667900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Generic 32-bit "lit8" binary operation. Provide an "instr" line 668000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * that specifies an instruction that performs "result = a0 op a1". 668100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * This could be an MIPS instruction or a function call. (If the result 668200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * comes back in a register other than a0, you can override "result".) 668300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 668400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * If "chkzero" is set to 1, we perform a divide-by-zero check on 668500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * CC (a1). Useful for integer division and modulus. 668600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 668700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * For: add-int/lit8, rsub-int/lit8, mul-int/lit8, div-int/lit8, 668800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * rem-int/lit8, and-int/lit8, or-int/lit8, xor-int/lit8, 668900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * shl-int/lit8, shr-int/lit8, ushr-int/lit8 669000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 669100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* binop/lit8 vAA, vBB, #+CC */ 669200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lbu a3, 2(rPC) # a3 <- BB 669300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lb a1, 3(rPC) # a1 <- sign-extended CC 669400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze srl a2, rINST, 8 # a2 <- AA 669500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG a0, a3 # a0 <- vBB 669600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .if 0 669700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze beqz a1, common_errDivideByZero # is second operand zero? 669800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .endif 669900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze FETCH_ADVANCE_INST 2 # advance rPC, load rINST 670000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze # optional op 670100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze and a0, a0, a1 # a0 <- op, a0-a3 changed 670200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_INST_OPCODE v0 # extract opcode from rINST 670300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze SET_VREG a0, a2 # vAA <- a0 670400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GOTO_OPCODE v0 # jump to next instruction 670500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 670600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 670700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 670800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 670900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 671000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_or_int_lit8: /* 0xde */ 671100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_or_int_lit8.S */ 671200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/binopLit8.S */ 671300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* 671400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Generic 32-bit "lit8" binary operation. Provide an "instr" line 671500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * that specifies an instruction that performs "result = a0 op a1". 671600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * This could be an MIPS instruction or a function call. (If the result 671700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * comes back in a register other than a0, you can override "result".) 671800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 671900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * If "chkzero" is set to 1, we perform a divide-by-zero check on 672000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * CC (a1). Useful for integer division and modulus. 672100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 672200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * For: add-int/lit8, rsub-int/lit8, mul-int/lit8, div-int/lit8, 672300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * rem-int/lit8, and-int/lit8, or-int/lit8, xor-int/lit8, 672400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * shl-int/lit8, shr-int/lit8, ushr-int/lit8 672500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 672600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* binop/lit8 vAA, vBB, #+CC */ 672700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lbu a3, 2(rPC) # a3 <- BB 672800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lb a1, 3(rPC) # a1 <- sign-extended CC 672900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze srl a2, rINST, 8 # a2 <- AA 673000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG a0, a3 # a0 <- vBB 673100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .if 0 673200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze beqz a1, common_errDivideByZero # is second operand zero? 673300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .endif 673400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze FETCH_ADVANCE_INST 2 # advance rPC, load rINST 673500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze # optional op 673600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze or a0, a0, a1 # a0 <- op, a0-a3 changed 673700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_INST_OPCODE v0 # extract opcode from rINST 673800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze SET_VREG a0, a2 # vAA <- a0 673900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GOTO_OPCODE v0 # jump to next instruction 674000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 674100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 674200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 674300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 674400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 674500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_xor_int_lit8: /* 0xdf */ 674600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_xor_int_lit8.S */ 674700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/binopLit8.S */ 674800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* 674900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Generic 32-bit "lit8" binary operation. Provide an "instr" line 675000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * that specifies an instruction that performs "result = a0 op a1". 675100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * This could be an MIPS instruction or a function call. (If the result 675200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * comes back in a register other than a0, you can override "result".) 675300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 675400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * If "chkzero" is set to 1, we perform a divide-by-zero check on 675500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * CC (a1). Useful for integer division and modulus. 675600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 675700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * For: add-int/lit8, rsub-int/lit8, mul-int/lit8, div-int/lit8, 675800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * rem-int/lit8, and-int/lit8, or-int/lit8, xor-int/lit8, 675900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * shl-int/lit8, shr-int/lit8, ushr-int/lit8 676000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 676100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* binop/lit8 vAA, vBB, #+CC */ 676200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lbu a3, 2(rPC) # a3 <- BB 676300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lb a1, 3(rPC) # a1 <- sign-extended CC 676400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze srl a2, rINST, 8 # a2 <- AA 676500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG a0, a3 # a0 <- vBB 676600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .if 0 676700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze beqz a1, common_errDivideByZero # is second operand zero? 676800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .endif 676900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze FETCH_ADVANCE_INST 2 # advance rPC, load rINST 677000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze # optional op 677100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze xor a0, a0, a1 # a0 <- op, a0-a3 changed 677200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_INST_OPCODE v0 # extract opcode from rINST 677300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze SET_VREG a0, a2 # vAA <- a0 677400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GOTO_OPCODE v0 # jump to next instruction 677500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 677600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 677700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 677800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 677900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 678000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_shl_int_lit8: /* 0xe0 */ 678100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_shl_int_lit8.S */ 678200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/binopLit8.S */ 678300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* 678400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Generic 32-bit "lit8" binary operation. Provide an "instr" line 678500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * that specifies an instruction that performs "result = a0 op a1". 678600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * This could be an MIPS instruction or a function call. (If the result 678700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * comes back in a register other than a0, you can override "result".) 678800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 678900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * If "chkzero" is set to 1, we perform a divide-by-zero check on 679000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * CC (a1). Useful for integer division and modulus. 679100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 679200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * For: add-int/lit8, rsub-int/lit8, mul-int/lit8, div-int/lit8, 679300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * rem-int/lit8, and-int/lit8, or-int/lit8, xor-int/lit8, 679400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * shl-int/lit8, shr-int/lit8, ushr-int/lit8 679500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 679600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* binop/lit8 vAA, vBB, #+CC */ 679700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lbu a3, 2(rPC) # a3 <- BB 679800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lb a1, 3(rPC) # a1 <- sign-extended CC 679900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze srl a2, rINST, 8 # a2 <- AA 680000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG a0, a3 # a0 <- vBB 680100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .if 0 680200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze beqz a1, common_errDivideByZero # is second operand zero? 680300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .endif 680400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze FETCH_ADVANCE_INST 2 # advance rPC, load rINST 680500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze # optional op 680600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze sll a0, a0, a1 # a0 <- op, a0-a3 changed 680700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_INST_OPCODE v0 # extract opcode from rINST 680800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze SET_VREG a0, a2 # vAA <- a0 680900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GOTO_OPCODE v0 # jump to next instruction 681000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 681100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 681200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 681300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 681400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 681500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_shr_int_lit8: /* 0xe1 */ 681600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_shr_int_lit8.S */ 681700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/binopLit8.S */ 681800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* 681900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Generic 32-bit "lit8" binary operation. Provide an "instr" line 682000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * that specifies an instruction that performs "result = a0 op a1". 682100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * This could be an MIPS instruction or a function call. (If the result 682200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * comes back in a register other than a0, you can override "result".) 682300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 682400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * If "chkzero" is set to 1, we perform a divide-by-zero check on 682500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * CC (a1). Useful for integer division and modulus. 682600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 682700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * For: add-int/lit8, rsub-int/lit8, mul-int/lit8, div-int/lit8, 682800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * rem-int/lit8, and-int/lit8, or-int/lit8, xor-int/lit8, 682900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * shl-int/lit8, shr-int/lit8, ushr-int/lit8 683000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 683100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* binop/lit8 vAA, vBB, #+CC */ 683200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lbu a3, 2(rPC) # a3 <- BB 683300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lb a1, 3(rPC) # a1 <- sign-extended CC 683400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze srl a2, rINST, 8 # a2 <- AA 683500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG a0, a3 # a0 <- vBB 683600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .if 0 683700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze beqz a1, common_errDivideByZero # is second operand zero? 683800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .endif 683900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze FETCH_ADVANCE_INST 2 # advance rPC, load rINST 684000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze # optional op 684100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze sra a0, a0, a1 # a0 <- op, a0-a3 changed 684200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_INST_OPCODE v0 # extract opcode from rINST 684300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze SET_VREG a0, a2 # vAA <- a0 684400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GOTO_OPCODE v0 # jump to next instruction 684500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 684600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 684700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 684800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 684900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 685000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_ushr_int_lit8: /* 0xe2 */ 685100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_ushr_int_lit8.S */ 685200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/binopLit8.S */ 685300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* 685400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Generic 32-bit "lit8" binary operation. Provide an "instr" line 685500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * that specifies an instruction that performs "result = a0 op a1". 685600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * This could be an MIPS instruction or a function call. (If the result 685700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * comes back in a register other than a0, you can override "result".) 685800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 685900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * If "chkzero" is set to 1, we perform a divide-by-zero check on 686000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * CC (a1). Useful for integer division and modulus. 686100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 686200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * For: add-int/lit8, rsub-int/lit8, mul-int/lit8, div-int/lit8, 686300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * rem-int/lit8, and-int/lit8, or-int/lit8, xor-int/lit8, 686400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * shl-int/lit8, shr-int/lit8, ushr-int/lit8 686500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 686600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* binop/lit8 vAA, vBB, #+CC */ 686700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lbu a3, 2(rPC) # a3 <- BB 686800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lb a1, 3(rPC) # a1 <- sign-extended CC 686900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze srl a2, rINST, 8 # a2 <- AA 687000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG a0, a3 # a0 <- vBB 687100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .if 0 687200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze beqz a1, common_errDivideByZero # is second operand zero? 687300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .endif 687400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze FETCH_ADVANCE_INST 2 # advance rPC, load rINST 687500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze # optional op 687600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze srl a0, a0, a1 # a0 <- op, a0-a3 changed 687700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_INST_OPCODE v0 # extract opcode from rINST 687800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze SET_VREG a0, a2 # vAA <- a0 687900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GOTO_OPCODE v0 # jump to next instruction 688000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 688100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 688200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 688300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 688400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 688500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_iget_quick: /* 0xe3 */ 688600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_iget_quick.S */ 688700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* For: iget-quick, iget-boolean-quick, iget-byte-quick, iget-char-quick, iget-short-quick */ 688800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* op vA, vB, offset//CCCC */ 688900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze srl a2, rINST, 12 # a2 <- B 689000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lhu a1, 2(rPC) # a1 <- field byte offset 689100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG_U a3, a2 # a3 <- object we're operating on 689200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ext a4, rINST, 8, 4 # a4 <- A 689300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, a1, a3 689400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze beqz a3, common_errNullObject # object was null 689500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lw a0, 0(a1) # a0 <- obj.field 689600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze FETCH_ADVANCE_INST 2 # advance rPC, load rINST 689700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze SET_VREG a0, a4 # fp[A] <- a0 689800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_INST_OPCODE v0 # extract opcode from rINST 689900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GOTO_OPCODE v0 # jump to next instruction 690000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 690100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 690200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 690300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_iget_wide_quick: /* 0xe4 */ 690400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_iget_wide_quick.S */ 690500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* iget-wide-quick vA, vB, offset//CCCC */ 690600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze srl a2, rINST, 12 # a2 <- B 690700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lhu a4, 2(rPC) # a4 <- field byte offset 690800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG_U a3, a2 # a3 <- object we're operating on 690900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ext a2, rINST, 8, 4 # a2 <- A 691000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze beqz a3, common_errNullObject # object was null 691100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a4, a3, a4 # create direct pointer 691200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lw a0, 0(a4) 691300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lw a1, 4(a4) 691400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dinsu a0, a1, 32, 32 691500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze FETCH_ADVANCE_INST 2 # advance rPC, load rINST 691600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze SET_VREG_WIDE a0, a2 691700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_INST_OPCODE v0 # extract opcode from rINST 691800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GOTO_OPCODE v0 # jump to next instruction 691900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 692000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 692100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 692200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_iget_object_quick: /* 0xe5 */ 692300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_iget_object_quick.S */ 692400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* For: iget-object-quick */ 692500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* op vA, vB, offset//CCCC */ 692600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern artIGetObjectFromMterp 692700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze srl a2, rINST, 12 # a2 <- B 692800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lhu a1, 2(rPC) # a1 <- field byte offset 692900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 693000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG_U a0, a2 # a0 <- object we're operating on 693100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jal artIGetObjectFromMterp # (obj, offset) 693200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ld a3, THREAD_EXCEPTION_OFFSET(rSELF) 693300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ext a2, rINST, 8, 4 # a2 <- A 693400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze PREFETCH_INST 2 693500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze bnez a3, MterpPossibleException # bail out 693600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze SET_VREG_OBJECT v0, a2 # fp[A] <- v0 693700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ADVANCE 2 # advance rPC 693800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_INST_OPCODE v0 # extract opcode from rINST 693900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GOTO_OPCODE v0 # jump to next instruction 694000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 694100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 694200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 694300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_iput_quick: /* 0xe6 */ 694400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_iput_quick.S */ 694500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* For: iput-quick, iput-boolean-quick, iput-byte-quick, iput-char-quick, iput-short-quick */ 694600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* op vA, vB, offset//CCCC */ 694700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze srl a2, rINST, 12 # a2 <- B 694800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lhu a1, 2(rPC) # a1 <- field byte offset 694900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG_U a3, a2 # a3 <- fp[B], the object pointer 695000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ext a2, rINST, 8, 4 # a2 <- A 695100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze beqz a3, common_errNullObject # object was null 695200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG a0, a2 # a0 <- fp[A] 695300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze FETCH_ADVANCE_INST 2 # advance rPC, load rINST 695400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, a1, a3 695500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze sw a0, 0(a1) # obj.field <- a0 695600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_INST_OPCODE v0 # extract opcode from rINST 695700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GOTO_OPCODE v0 # jump to next instruction 695800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 695900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 696000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 696100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_iput_wide_quick: /* 0xe7 */ 696200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_iput_wide_quick.S */ 696300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* iput-wide-quick vA, vB, offset//CCCC */ 696400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze srl a2, rINST, 12 # a2 <- B 696500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lhu a3, 2(rPC) # a3 <- field byte offset 696600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG_U a2, a2 # a2 <- fp[B], the object pointer 696700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ext a0, rINST, 8, 4 # a0 <- A 696800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze beqz a2, common_errNullObject # object was null 696900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG_WIDE a0, a0 # a0 <- fp[A] 697000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze FETCH_ADVANCE_INST 2 # advance rPC, load rINST 697100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, a2, a3 # create a direct pointer 697200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze sw a0, 0(a1) 697300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dsrl32 a0, a0, 0 697400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze sw a0, 4(a1) 697500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_INST_OPCODE v0 # extract opcode from rINST 697600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GOTO_OPCODE v0 # jump to next instruction 697700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 697800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 697900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 698000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_iput_object_quick: /* 0xe8 */ 698100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_iput_object_quick.S */ 698200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpIputObjectQuick 698300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 698400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a0, rFP, OFF_FP_SHADOWFRAME 698500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a1, rPC 698600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a2, rINST 698700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jal MterpIputObjectQuick 698800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze beqzc v0, MterpException 698900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze FETCH_ADVANCE_INST 2 # advance rPC, load rINST 699000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_INST_OPCODE v0 # extract opcode from rINST 699100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GOTO_OPCODE v0 # jump to next instruction 699200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 699300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 699400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 699500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_invoke_virtual_quick: /* 0xe9 */ 699600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_invoke_virtual_quick.S */ 699700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/invoke.S */ 699800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* 699900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Generic invoke handler wrapper. 700000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 700100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* op vB, {vD, vE, vF, vG, vA}, class@CCCC */ 700200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* op {vCCCC..v(CCCC+AA-1)}, meth@BBBB */ 700300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpInvokeVirtualQuick 7004db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze .extern MterpShouldSwitchInterpreters 700500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 700600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 700700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 700800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a2, rPC 700900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a3, rINST 701000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jal MterpInvokeVirtualQuick 701100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze beqzc v0, MterpException 701200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze FETCH_ADVANCE_INST 3 7013db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze jal MterpShouldSwitchInterpreters 7014db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze bnezc v0, MterpFallback 701500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_INST_OPCODE v0 701600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GOTO_OPCODE v0 701700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 701800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 701900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 702000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 702100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_invoke_virtual_range_quick: /* 0xea */ 702200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_invoke_virtual_range_quick.S */ 702300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/invoke.S */ 702400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* 702500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Generic invoke handler wrapper. 702600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 702700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* op vB, {vD, vE, vF, vG, vA}, class@CCCC */ 702800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* op {vCCCC..v(CCCC+AA-1)}, meth@BBBB */ 702900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpInvokeVirtualQuickRange 7030db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze .extern MterpShouldSwitchInterpreters 703100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 703200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 703300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 703400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a2, rPC 703500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a3, rINST 703600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jal MterpInvokeVirtualQuickRange 703700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze beqzc v0, MterpException 703800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze FETCH_ADVANCE_INST 3 7039db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze jal MterpShouldSwitchInterpreters 7040db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze bnezc v0, MterpFallback 704100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_INST_OPCODE v0 704200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GOTO_OPCODE v0 704300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 704400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 704500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 704600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 704700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_iput_boolean_quick: /* 0xeb */ 704800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_iput_boolean_quick.S */ 704900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_iput_quick.S */ 705000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* For: iput-quick, iput-boolean-quick, iput-byte-quick, iput-char-quick, iput-short-quick */ 705100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* op vA, vB, offset//CCCC */ 705200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze srl a2, rINST, 12 # a2 <- B 705300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lhu a1, 2(rPC) # a1 <- field byte offset 705400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG_U a3, a2 # a3 <- fp[B], the object pointer 705500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ext a2, rINST, 8, 4 # a2 <- A 705600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze beqz a3, common_errNullObject # object was null 705700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG a0, a2 # a0 <- fp[A] 705800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze FETCH_ADVANCE_INST 2 # advance rPC, load rINST 705900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, a1, a3 706000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze sb a0, 0(a1) # obj.field <- a0 706100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_INST_OPCODE v0 # extract opcode from rINST 706200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GOTO_OPCODE v0 # jump to next instruction 706300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 706400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 706500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 706600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 706700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_iput_byte_quick: /* 0xec */ 706800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_iput_byte_quick.S */ 706900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_iput_quick.S */ 707000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* For: iput-quick, iput-boolean-quick, iput-byte-quick, iput-char-quick, iput-short-quick */ 707100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* op vA, vB, offset//CCCC */ 707200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze srl a2, rINST, 12 # a2 <- B 707300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lhu a1, 2(rPC) # a1 <- field byte offset 707400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG_U a3, a2 # a3 <- fp[B], the object pointer 707500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ext a2, rINST, 8, 4 # a2 <- A 707600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze beqz a3, common_errNullObject # object was null 707700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG a0, a2 # a0 <- fp[A] 707800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze FETCH_ADVANCE_INST 2 # advance rPC, load rINST 707900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, a1, a3 708000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze sb a0, 0(a1) # obj.field <- a0 708100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_INST_OPCODE v0 # extract opcode from rINST 708200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GOTO_OPCODE v0 # jump to next instruction 708300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 708400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 708500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 708600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 708700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_iput_char_quick: /* 0xed */ 708800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_iput_char_quick.S */ 708900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_iput_quick.S */ 709000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* For: iput-quick, iput-boolean-quick, iput-byte-quick, iput-char-quick, iput-short-quick */ 709100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* op vA, vB, offset//CCCC */ 709200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze srl a2, rINST, 12 # a2 <- B 709300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lhu a1, 2(rPC) # a1 <- field byte offset 709400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG_U a3, a2 # a3 <- fp[B], the object pointer 709500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ext a2, rINST, 8, 4 # a2 <- A 709600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze beqz a3, common_errNullObject # object was null 709700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG a0, a2 # a0 <- fp[A] 709800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze FETCH_ADVANCE_INST 2 # advance rPC, load rINST 709900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, a1, a3 710000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze sh a0, 0(a1) # obj.field <- a0 710100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_INST_OPCODE v0 # extract opcode from rINST 710200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GOTO_OPCODE v0 # jump to next instruction 710300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 710400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 710500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 710600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 710700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_iput_short_quick: /* 0xee */ 710800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_iput_short_quick.S */ 710900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_iput_quick.S */ 711000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* For: iput-quick, iput-boolean-quick, iput-byte-quick, iput-char-quick, iput-short-quick */ 711100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* op vA, vB, offset//CCCC */ 711200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze srl a2, rINST, 12 # a2 <- B 711300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lhu a1, 2(rPC) # a1 <- field byte offset 711400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG_U a3, a2 # a3 <- fp[B], the object pointer 711500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ext a2, rINST, 8, 4 # a2 <- A 711600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze beqz a3, common_errNullObject # object was null 711700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG a0, a2 # a0 <- fp[A] 711800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze FETCH_ADVANCE_INST 2 # advance rPC, load rINST 711900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, a1, a3 712000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze sh a0, 0(a1) # obj.field <- a0 712100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_INST_OPCODE v0 # extract opcode from rINST 712200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GOTO_OPCODE v0 # jump to next instruction 712300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 712400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 712500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 712600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 712700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_iget_boolean_quick: /* 0xef */ 712800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_iget_boolean_quick.S */ 712900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_iget_quick.S */ 713000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* For: iget-quick, iget-boolean-quick, iget-byte-quick, iget-char-quick, iget-short-quick */ 713100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* op vA, vB, offset//CCCC */ 713200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze srl a2, rINST, 12 # a2 <- B 713300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lhu a1, 2(rPC) # a1 <- field byte offset 713400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG_U a3, a2 # a3 <- object we're operating on 713500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ext a4, rINST, 8, 4 # a4 <- A 713600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, a1, a3 713700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze beqz a3, common_errNullObject # object was null 713800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lbu a0, 0(a1) # a0 <- obj.field 713900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze FETCH_ADVANCE_INST 2 # advance rPC, load rINST 714000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze SET_VREG a0, a4 # fp[A] <- a0 714100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_INST_OPCODE v0 # extract opcode from rINST 714200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GOTO_OPCODE v0 # jump to next instruction 714300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 714400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 714500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 714600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 714700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_iget_byte_quick: /* 0xf0 */ 714800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_iget_byte_quick.S */ 714900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_iget_quick.S */ 715000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* For: iget-quick, iget-boolean-quick, iget-byte-quick, iget-char-quick, iget-short-quick */ 715100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* op vA, vB, offset//CCCC */ 715200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze srl a2, rINST, 12 # a2 <- B 715300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lhu a1, 2(rPC) # a1 <- field byte offset 715400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG_U a3, a2 # a3 <- object we're operating on 715500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ext a4, rINST, 8, 4 # a4 <- A 715600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, a1, a3 715700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze beqz a3, common_errNullObject # object was null 715800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lb a0, 0(a1) # a0 <- obj.field 715900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze FETCH_ADVANCE_INST 2 # advance rPC, load rINST 716000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze SET_VREG a0, a4 # fp[A] <- a0 716100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_INST_OPCODE v0 # extract opcode from rINST 716200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GOTO_OPCODE v0 # jump to next instruction 716300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 716400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 716500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 716600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 716700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_iget_char_quick: /* 0xf1 */ 716800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_iget_char_quick.S */ 716900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_iget_quick.S */ 717000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* For: iget-quick, iget-boolean-quick, iget-byte-quick, iget-char-quick, iget-short-quick */ 717100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* op vA, vB, offset//CCCC */ 717200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze srl a2, rINST, 12 # a2 <- B 717300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lhu a1, 2(rPC) # a1 <- field byte offset 717400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG_U a3, a2 # a3 <- object we're operating on 717500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ext a4, rINST, 8, 4 # a4 <- A 717600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, a1, a3 717700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze beqz a3, common_errNullObject # object was null 717800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lhu a0, 0(a1) # a0 <- obj.field 717900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze FETCH_ADVANCE_INST 2 # advance rPC, load rINST 718000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze SET_VREG a0, a4 # fp[A] <- a0 718100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_INST_OPCODE v0 # extract opcode from rINST 718200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GOTO_OPCODE v0 # jump to next instruction 718300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 718400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 718500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 718600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 718700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_iget_short_quick: /* 0xf2 */ 718800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_iget_short_quick.S */ 718900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_iget_quick.S */ 719000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* For: iget-quick, iget-boolean-quick, iget-byte-quick, iget-char-quick, iget-short-quick */ 719100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* op vA, vB, offset//CCCC */ 719200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze srl a2, rINST, 12 # a2 <- B 719300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lhu a1, 2(rPC) # a1 <- field byte offset 719400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_VREG_U a3, a2 # a3 <- object we're operating on 719500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ext a4, rINST, 8, 4 # a4 <- A 719600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, a1, a3 719700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze beqz a3, common_errNullObject # object was null 719800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lh a0, 0(a1) # a0 <- obj.field 719900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze FETCH_ADVANCE_INST 2 # advance rPC, load rINST 720000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze SET_VREG a0, a4 # fp[A] <- a0 720100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_INST_OPCODE v0 # extract opcode from rINST 720200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GOTO_OPCODE v0 # jump to next instruction 720300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 720400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 720500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 720600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 720700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_invoke_lambda: /* 0xf3 */ 720800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* Transfer stub to alternate interpreter */ 720900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze b MterpFallback 721000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 721100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 721200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 721300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_unused_f4: /* 0xf4 */ 721400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_unused_f4.S */ 721500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/unused.S */ 721600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 721700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Bail to reference interpreter to throw. 721800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 721900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze b MterpFallback 722000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 722100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 722200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 722300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 722400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_capture_variable: /* 0xf5 */ 722500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* Transfer stub to alternate interpreter */ 722600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze b MterpFallback 722700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 722800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 722900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 723000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_create_lambda: /* 0xf6 */ 723100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* Transfer stub to alternate interpreter */ 723200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze b MterpFallback 723300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 723400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 723500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 723600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_liberate_variable: /* 0xf7 */ 723700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* Transfer stub to alternate interpreter */ 723800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze b MterpFallback 723900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 724000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 724100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 724200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_box_lambda: /* 0xf8 */ 724300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* Transfer stub to alternate interpreter */ 724400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze b MterpFallback 724500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 724600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 724700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 724800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_unbox_lambda: /* 0xf9 */ 724900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* Transfer stub to alternate interpreter */ 725000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze b MterpFallback 725100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 725200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 725300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 725400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_unused_fa: /* 0xfa */ 725500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_unused_fa.S */ 725600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/unused.S */ 725700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 725800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Bail to reference interpreter to throw. 725900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 726000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze b MterpFallback 726100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 726200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 726300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 726400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 726500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_unused_fb: /* 0xfb */ 726600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_unused_fb.S */ 726700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/unused.S */ 726800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 726900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Bail to reference interpreter to throw. 727000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 727100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze b MterpFallback 727200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 727300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 727400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 727500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 727600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_unused_fc: /* 0xfc */ 727700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_unused_fc.S */ 727800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/unused.S */ 727900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 728000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Bail to reference interpreter to throw. 728100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 728200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze b MterpFallback 728300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 728400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 728500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 728600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 728700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_unused_fd: /* 0xfd */ 728800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_unused_fd.S */ 728900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/unused.S */ 729000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 729100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Bail to reference interpreter to throw. 729200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 729300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze b MterpFallback 729400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 729500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 729600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 729700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 729800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_unused_fe: /* 0xfe */ 729900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_unused_fe.S */ 730000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/unused.S */ 730100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 730200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Bail to reference interpreter to throw. 730300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 730400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze b MterpFallback 730500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 730600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 730700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 730800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 730900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_op_unused_ff: /* 0xff */ 731000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/op_unused_ff.S */ 731100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/unused.S */ 731200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 731300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Bail to reference interpreter to throw. 731400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 731500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze b MterpFallback 731600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 731700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 731800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 731900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .size artMterpAsmInstructionStart, .-artMterpAsmInstructionStart 732000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .global artMterpAsmInstructionEnd 732100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey FrunzeartMterpAsmInstructionEnd: 732200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 732300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 732400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * =========================================================================== 732500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Sister implementations 732600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * =========================================================================== 732700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 732800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .global artMterpAsmSisterStart 732900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .type artMterpAsmSisterStart, %function 733000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .text 733100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 4 733200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey FrunzeartMterpAsmSisterStart: 733300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 733400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* continuation for op_float_to_int */ 733500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.Lop_float_to_int_trunc: 733600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze trunc.w.s f0, f0 733700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze mfc1 t0, f0 733800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.Lop_float_to_int_done: 733900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* Can't include fcvtFooter.S after break */ 734000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_INST_OPCODE v0 # extract opcode from rINST 734100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze SET_VREG t0, a1 734200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GOTO_OPCODE v0 # jump to next instruction 734300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 734400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* continuation for op_float_to_long */ 734500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.Lop_float_to_long_trunc: 734600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze trunc.l.s f0, f0 734700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dmfc1 t0, f0 734800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.Lop_float_to_long_done: 734900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* Can't include fcvtFooter.S after break */ 735000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_INST_OPCODE v0 # extract opcode from rINST 735100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze SET_VREG_WIDE t0, a1 735200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GOTO_OPCODE v0 # jump to next instruction 735300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 735400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* continuation for op_double_to_int */ 735500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.Lop_double_to_int_trunc: 735600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze trunc.w.d f0, f0 735700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze mfc1 t0, f0 735800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.Lop_double_to_int_done: 735900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* Can't include fcvtFooter.S after break */ 736000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_INST_OPCODE v0 # extract opcode from rINST 736100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze SET_VREG t0, a1 736200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GOTO_OPCODE v0 # jump to next instruction 736300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 736400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* continuation for op_double_to_long */ 736500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.Lop_double_to_long_trunc: 736600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze trunc.l.d f0, f0 736700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dmfc1 t0, f0 736800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.Lop_double_to_long_done: 736900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* Can't include fcvtFooter.S after break */ 737000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_INST_OPCODE v0 # extract opcode from rINST 737100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze SET_VREG_WIDE t0, a1 737200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GOTO_OPCODE v0 # jump to next instruction 737300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 737400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .size artMterpAsmSisterStart, .-artMterpAsmSisterStart 737500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .global artMterpAsmSisterEnd 737600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey FrunzeartMterpAsmSisterEnd: 737700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 737800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 737900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .global artMterpAsmAltInstructionStart 738000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .type artMterpAsmAltInstructionStart, %function 738100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .text 738200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 738300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey FrunzeartMterpAsmAltInstructionStart = .L_ALT_op_nop 738400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 738500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 738600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_nop: /* 0x00 */ 738700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 738800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 738900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 739000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 739100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 739200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 739300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 739400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 739500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 739600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 739700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 739800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 739900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 740000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (0 * 128) # Addr of primary handler. 740100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 740200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 740300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 740400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 740500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_move: /* 0x01 */ 740600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 740700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 740800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 740900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 741000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 741100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 741200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 741300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 741400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 741500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 741600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 741700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 741800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 741900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (1 * 128) # Addr of primary handler. 742000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 742100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 742200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 742300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 742400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_move_from16: /* 0x02 */ 742500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 742600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 742700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 742800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 742900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 743000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 743100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 743200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 743300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 743400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 743500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 743600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 743700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 743800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (2 * 128) # Addr of primary handler. 743900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 744000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 744100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 744200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 744300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_move_16: /* 0x03 */ 744400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 744500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 744600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 744700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 744800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 744900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 745000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 745100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 745200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 745300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 745400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 745500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 745600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 745700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (3 * 128) # Addr of primary handler. 745800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 745900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 746000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 746100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 746200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_move_wide: /* 0x04 */ 746300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 746400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 746500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 746600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 746700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 746800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 746900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 747000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 747100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 747200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 747300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 747400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 747500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 747600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (4 * 128) # Addr of primary handler. 747700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 747800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 747900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 748000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 748100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_move_wide_from16: /* 0x05 */ 748200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 748300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 748400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 748500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 748600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 748700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 748800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 748900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 749000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 749100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 749200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 749300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 749400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 749500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (5 * 128) # Addr of primary handler. 749600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 749700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 749800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 749900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 750000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_move_wide_16: /* 0x06 */ 750100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 750200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 750300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 750400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 750500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 750600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 750700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 750800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 750900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 751000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 751100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 751200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 751300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 751400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (6 * 128) # Addr of primary handler. 751500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 751600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 751700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 751800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 751900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_move_object: /* 0x07 */ 752000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 752100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 752200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 752300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 752400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 752500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 752600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 752700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 752800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 752900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 753000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 753100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 753200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 753300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (7 * 128) # Addr of primary handler. 753400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 753500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 753600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 753700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 753800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_move_object_from16: /* 0x08 */ 753900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 754000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 754100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 754200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 754300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 754400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 754500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 754600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 754700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 754800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 754900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 755000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 755100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 755200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (8 * 128) # Addr of primary handler. 755300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 755400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 755500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 755600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 755700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_move_object_16: /* 0x09 */ 755800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 755900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 756000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 756100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 756200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 756300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 756400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 756500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 756600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 756700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 756800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 756900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 757000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 757100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (9 * 128) # Addr of primary handler. 757200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 757300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 757400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 757500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 757600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_move_result: /* 0x0a */ 757700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 757800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 757900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 758000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 758100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 758200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 758300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 758400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 758500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 758600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 758700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 758800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 758900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 759000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (10 * 128) # Addr of primary handler. 759100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 759200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 759300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 759400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 759500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_move_result_wide: /* 0x0b */ 759600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 759700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 759800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 759900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 760000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 760100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 760200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 760300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 760400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 760500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 760600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 760700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 760800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 760900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (11 * 128) # Addr of primary handler. 761000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 761100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 761200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 761300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 761400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_move_result_object: /* 0x0c */ 761500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 761600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 761700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 761800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 761900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 762000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 762100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 762200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 762300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 762400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 762500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 762600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 762700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 762800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (12 * 128) # Addr of primary handler. 762900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 763000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 763100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 763200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 763300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_move_exception: /* 0x0d */ 763400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 763500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 763600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 763700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 763800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 763900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 764000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 764100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 764200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 764300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 764400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 764500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 764600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 764700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (13 * 128) # Addr of primary handler. 764800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 764900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 765000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 765100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 765200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_return_void: /* 0x0e */ 765300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 765400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 765500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 765600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 765700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 765800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 765900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 766000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 766100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 766200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 766300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 766400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 766500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 766600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (14 * 128) # Addr of primary handler. 766700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 766800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 766900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 767000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 767100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_return: /* 0x0f */ 767200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 767300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 767400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 767500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 767600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 767700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 767800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 767900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 768000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 768100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 768200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 768300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 768400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 768500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (15 * 128) # Addr of primary handler. 768600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 768700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 768800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 768900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 769000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_return_wide: /* 0x10 */ 769100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 769200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 769300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 769400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 769500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 769600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 769700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 769800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 769900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 770000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 770100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 770200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 770300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 770400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (16 * 128) # Addr of primary handler. 770500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 770600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 770700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 770800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 770900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_return_object: /* 0x11 */ 771000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 771100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 771200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 771300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 771400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 771500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 771600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 771700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 771800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 771900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 772000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 772100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 772200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 772300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (17 * 128) # Addr of primary handler. 772400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 772500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 772600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 772700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 772800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_const_4: /* 0x12 */ 772900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 773000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 773100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 773200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 773300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 773400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 773500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 773600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 773700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 773800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 773900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 774000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 774100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 774200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (18 * 128) # Addr of primary handler. 774300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 774400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 774500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 774600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 774700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_const_16: /* 0x13 */ 774800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 774900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 775000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 775100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 775200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 775300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 775400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 775500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 775600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 775700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 775800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 775900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 776000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 776100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (19 * 128) # Addr of primary handler. 776200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 776300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 776400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 776500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 776600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_const: /* 0x14 */ 776700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 776800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 776900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 777000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 777100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 777200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 777300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 777400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 777500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 777600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 777700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 777800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 777900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 778000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (20 * 128) # Addr of primary handler. 778100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 778200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 778300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 778400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 778500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_const_high16: /* 0x15 */ 778600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 778700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 778800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 778900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 779000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 779100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 779200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 779300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 779400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 779500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 779600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 779700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 779800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 779900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (21 * 128) # Addr of primary handler. 780000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 780100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 780200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 780300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 780400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_const_wide_16: /* 0x16 */ 780500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 780600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 780700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 780800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 780900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 781000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 781100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 781200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 781300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 781400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 781500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 781600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 781700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 781800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (22 * 128) # Addr of primary handler. 781900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 782000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 782100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 782200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 782300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_const_wide_32: /* 0x17 */ 782400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 782500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 782600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 782700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 782800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 782900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 783000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 783100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 783200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 783300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 783400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 783500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 783600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 783700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (23 * 128) # Addr of primary handler. 783800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 783900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 784000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 784100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 784200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_const_wide: /* 0x18 */ 784300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 784400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 784500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 784600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 784700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 784800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 784900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 785000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 785100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 785200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 785300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 785400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 785500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 785600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (24 * 128) # Addr of primary handler. 785700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 785800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 785900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 786000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 786100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_const_wide_high16: /* 0x19 */ 786200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 786300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 786400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 786500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 786600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 786700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 786800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 786900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 787000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 787100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 787200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 787300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 787400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 787500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (25 * 128) # Addr of primary handler. 787600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 787700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 787800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 787900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 788000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_const_string: /* 0x1a */ 788100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 788200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 788300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 788400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 788500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 788600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 788700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 788800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 788900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 789000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 789100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 789200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 789300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 789400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (26 * 128) # Addr of primary handler. 789500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 789600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 789700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 789800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 789900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_const_string_jumbo: /* 0x1b */ 790000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 790100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 790200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 790300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 790400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 790500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 790600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 790700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 790800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 790900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 791000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 791100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 791200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 791300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (27 * 128) # Addr of primary handler. 791400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 791500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 791600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 791700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 791800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_const_class: /* 0x1c */ 791900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 792000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 792100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 792200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 792300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 792400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 792500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 792600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 792700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 792800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 792900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 793000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 793100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 793200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (28 * 128) # Addr of primary handler. 793300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 793400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 793500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 793600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 793700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_monitor_enter: /* 0x1d */ 793800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 793900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 794000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 794100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 794200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 794300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 794400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 794500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 794600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 794700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 794800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 794900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 795000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 795100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (29 * 128) # Addr of primary handler. 795200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 795300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 795400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 795500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 795600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_monitor_exit: /* 0x1e */ 795700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 795800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 795900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 796000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 796100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 796200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 796300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 796400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 796500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 796600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 796700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 796800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 796900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 797000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (30 * 128) # Addr of primary handler. 797100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 797200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 797300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 797400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 797500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_check_cast: /* 0x1f */ 797600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 797700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 797800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 797900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 798000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 798100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 798200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 798300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 798400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 798500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 798600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 798700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 798800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 798900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (31 * 128) # Addr of primary handler. 799000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 799100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 799200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 799300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 799400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_instance_of: /* 0x20 */ 799500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 799600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 799700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 799800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 799900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 800000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 800100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 800200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 800300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 800400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 800500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 800600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 800700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 800800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (32 * 128) # Addr of primary handler. 800900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 801000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 801100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 801200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 801300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_array_length: /* 0x21 */ 801400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 801500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 801600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 801700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 801800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 801900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 802000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 802100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 802200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 802300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 802400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 802500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 802600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 802700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (33 * 128) # Addr of primary handler. 802800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 802900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 803000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 803100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 803200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_new_instance: /* 0x22 */ 803300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 803400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 803500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 803600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 803700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 803800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 803900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 804000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 804100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 804200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 804300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 804400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 804500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 804600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (34 * 128) # Addr of primary handler. 804700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 804800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 804900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 805000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 805100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_new_array: /* 0x23 */ 805200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 805300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 805400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 805500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 805600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 805700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 805800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 805900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 806000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 806100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 806200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 806300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 806400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 806500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (35 * 128) # Addr of primary handler. 806600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 806700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 806800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 806900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 807000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_filled_new_array: /* 0x24 */ 807100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 807200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 807300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 807400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 807500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 807600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 807700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 807800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 807900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 808000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 808100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 808200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 808300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 808400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (36 * 128) # Addr of primary handler. 808500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 808600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 808700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 808800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 808900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_filled_new_array_range: /* 0x25 */ 809000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 809100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 809200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 809300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 809400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 809500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 809600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 809700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 809800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 809900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 810000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 810100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 810200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 810300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (37 * 128) # Addr of primary handler. 810400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 810500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 810600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 810700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 810800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_fill_array_data: /* 0x26 */ 810900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 811000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 811100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 811200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 811300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 811400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 811500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 811600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 811700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 811800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 811900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 812000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 812100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 812200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (38 * 128) # Addr of primary handler. 812300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 812400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 812500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 812600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 812700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_throw: /* 0x27 */ 812800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 812900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 813000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 813100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 813200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 813300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 813400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 813500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 813600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 813700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 813800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 813900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 814000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 814100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (39 * 128) # Addr of primary handler. 814200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 814300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 814400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 814500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 814600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_goto: /* 0x28 */ 814700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 814800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 814900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 815000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 815100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 815200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 815300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 815400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 815500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 815600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 815700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 815800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 815900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 816000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (40 * 128) # Addr of primary handler. 816100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 816200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 816300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 816400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 816500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_goto_16: /* 0x29 */ 816600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 816700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 816800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 816900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 817000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 817100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 817200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 817300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 817400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 817500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 817600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 817700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 817800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 817900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (41 * 128) # Addr of primary handler. 818000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 818100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 818200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 818300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 818400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_goto_32: /* 0x2a */ 818500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 818600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 818700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 818800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 818900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 819000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 819100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 819200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 819300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 819400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 819500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 819600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 819700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 819800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (42 * 128) # Addr of primary handler. 819900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 820000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 820100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 820200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 820300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_packed_switch: /* 0x2b */ 820400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 820500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 820600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 820700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 820800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 820900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 821000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 821100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 821200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 821300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 821400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 821500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 821600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 821700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (43 * 128) # Addr of primary handler. 821800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 821900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 822000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 822100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 822200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_sparse_switch: /* 0x2c */ 822300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 822400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 822500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 822600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 822700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 822800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 822900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 823000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 823100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 823200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 823300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 823400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 823500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 823600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (44 * 128) # Addr of primary handler. 823700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 823800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 823900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 824000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 824100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_cmpl_float: /* 0x2d */ 824200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 824300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 824400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 824500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 824600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 824700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 824800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 824900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 825000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 825100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 825200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 825300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 825400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 825500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (45 * 128) # Addr of primary handler. 825600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 825700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 825800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 825900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 826000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_cmpg_float: /* 0x2e */ 826100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 826200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 826300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 826400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 826500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 826600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 826700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 826800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 826900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 827000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 827100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 827200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 827300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 827400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (46 * 128) # Addr of primary handler. 827500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 827600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 827700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 827800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 827900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_cmpl_double: /* 0x2f */ 828000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 828100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 828200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 828300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 828400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 828500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 828600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 828700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 828800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 828900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 829000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 829100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 829200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 829300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (47 * 128) # Addr of primary handler. 829400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 829500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 829600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 829700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 829800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_cmpg_double: /* 0x30 */ 829900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 830000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 830100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 830200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 830300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 830400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 830500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 830600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 830700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 830800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 830900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 831000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 831100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 831200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (48 * 128) # Addr of primary handler. 831300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 831400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 831500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 831600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 831700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_cmp_long: /* 0x31 */ 831800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 831900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 832000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 832100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 832200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 832300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 832400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 832500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 832600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 832700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 832800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 832900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 833000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 833100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (49 * 128) # Addr of primary handler. 833200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 833300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 833400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 833500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 833600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_if_eq: /* 0x32 */ 833700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 833800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 833900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 834000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 834100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 834200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 834300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 834400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 834500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 834600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 834700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 834800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 834900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 835000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (50 * 128) # Addr of primary handler. 835100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 835200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 835300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 835400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 835500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_if_ne: /* 0x33 */ 835600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 835700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 835800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 835900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 836000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 836100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 836200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 836300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 836400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 836500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 836600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 836700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 836800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 836900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (51 * 128) # Addr of primary handler. 837000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 837100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 837200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 837300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 837400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_if_lt: /* 0x34 */ 837500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 837600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 837700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 837800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 837900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 838000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 838100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 838200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 838300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 838400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 838500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 838600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 838700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 838800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (52 * 128) # Addr of primary handler. 838900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 839000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 839100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 839200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 839300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_if_ge: /* 0x35 */ 839400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 839500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 839600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 839700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 839800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 839900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 840000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 840100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 840200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 840300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 840400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 840500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 840600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 840700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (53 * 128) # Addr of primary handler. 840800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 840900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 841000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 841100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 841200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_if_gt: /* 0x36 */ 841300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 841400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 841500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 841600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 841700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 841800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 841900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 842000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 842100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 842200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 842300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 842400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 842500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 842600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (54 * 128) # Addr of primary handler. 842700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 842800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 842900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 843000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 843100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_if_le: /* 0x37 */ 843200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 843300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 843400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 843500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 843600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 843700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 843800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 843900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 844000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 844100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 844200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 844300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 844400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 844500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (55 * 128) # Addr of primary handler. 844600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 844700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 844800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 844900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 845000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_if_eqz: /* 0x38 */ 845100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 845200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 845300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 845400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 845500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 845600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 845700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 845800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 845900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 846000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 846100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 846200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 846300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 846400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (56 * 128) # Addr of primary handler. 846500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 846600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 846700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 846800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 846900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_if_nez: /* 0x39 */ 847000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 847100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 847200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 847300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 847400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 847500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 847600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 847700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 847800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 847900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 848000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 848100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 848200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 848300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (57 * 128) # Addr of primary handler. 848400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 848500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 848600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 848700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 848800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_if_ltz: /* 0x3a */ 848900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 849000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 849100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 849200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 849300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 849400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 849500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 849600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 849700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 849800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 849900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 850000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 850100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 850200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (58 * 128) # Addr of primary handler. 850300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 850400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 850500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 850600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 850700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_if_gez: /* 0x3b */ 850800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 850900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 851000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 851100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 851200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 851300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 851400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 851500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 851600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 851700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 851800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 851900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 852000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 852100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (59 * 128) # Addr of primary handler. 852200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 852300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 852400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 852500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 852600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_if_gtz: /* 0x3c */ 852700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 852800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 852900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 853000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 853100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 853200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 853300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 853400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 853500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 853600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 853700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 853800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 853900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 854000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (60 * 128) # Addr of primary handler. 854100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 854200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 854300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 854400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 854500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_if_lez: /* 0x3d */ 854600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 854700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 854800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 854900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 855000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 855100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 855200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 855300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 855400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 855500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 855600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 855700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 855800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 855900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (61 * 128) # Addr of primary handler. 856000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 856100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 856200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 856300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 856400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_unused_3e: /* 0x3e */ 856500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 856600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 856700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 856800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 856900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 857000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 857100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 857200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 857300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 857400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 857500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 857600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 857700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 857800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (62 * 128) # Addr of primary handler. 857900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 858000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 858100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 858200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 858300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_unused_3f: /* 0x3f */ 858400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 858500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 858600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 858700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 858800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 858900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 859000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 859100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 859200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 859300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 859400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 859500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 859600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 859700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (63 * 128) # Addr of primary handler. 859800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 859900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 860000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 860100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 860200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_unused_40: /* 0x40 */ 860300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 860400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 860500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 860600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 860700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 860800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 860900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 861000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 861100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 861200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 861300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 861400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 861500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 861600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (64 * 128) # Addr of primary handler. 861700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 861800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 861900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 862000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 862100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_unused_41: /* 0x41 */ 862200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 862300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 862400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 862500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 862600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 862700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 862800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 862900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 863000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 863100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 863200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 863300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 863400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 863500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (65 * 128) # Addr of primary handler. 863600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 863700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 863800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 863900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 864000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_unused_42: /* 0x42 */ 864100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 864200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 864300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 864400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 864500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 864600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 864700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 864800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 864900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 865000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 865100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 865200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 865300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 865400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (66 * 128) # Addr of primary handler. 865500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 865600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 865700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 865800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 865900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_unused_43: /* 0x43 */ 866000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 866100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 866200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 866300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 866400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 866500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 866600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 866700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 866800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 866900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 867000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 867100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 867200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 867300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (67 * 128) # Addr of primary handler. 867400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 867500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 867600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 867700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 867800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_aget: /* 0x44 */ 867900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 868000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 868100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 868200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 868300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 868400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 868500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 868600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 868700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 868800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 868900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 869000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 869100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 869200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (68 * 128) # Addr of primary handler. 869300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 869400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 869500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 869600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 869700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_aget_wide: /* 0x45 */ 869800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 869900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 870000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 870100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 870200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 870300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 870400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 870500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 870600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 870700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 870800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 870900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 871000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 871100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (69 * 128) # Addr of primary handler. 871200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 871300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 871400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 871500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 871600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_aget_object: /* 0x46 */ 871700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 871800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 871900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 872000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 872100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 872200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 872300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 872400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 872500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 872600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 872700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 872800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 872900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 873000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (70 * 128) # Addr of primary handler. 873100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 873200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 873300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 873400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 873500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_aget_boolean: /* 0x47 */ 873600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 873700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 873800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 873900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 874000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 874100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 874200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 874300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 874400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 874500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 874600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 874700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 874800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 874900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (71 * 128) # Addr of primary handler. 875000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 875100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 875200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 875300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 875400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_aget_byte: /* 0x48 */ 875500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 875600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 875700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 875800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 875900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 876000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 876100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 876200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 876300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 876400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 876500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 876600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 876700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 876800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (72 * 128) # Addr of primary handler. 876900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 877000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 877100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 877200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 877300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_aget_char: /* 0x49 */ 877400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 877500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 877600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 877700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 877800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 877900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 878000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 878100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 878200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 878300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 878400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 878500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 878600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 878700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (73 * 128) # Addr of primary handler. 878800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 878900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 879000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 879100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 879200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_aget_short: /* 0x4a */ 879300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 879400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 879500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 879600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 879700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 879800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 879900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 880000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 880100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 880200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 880300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 880400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 880500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 880600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (74 * 128) # Addr of primary handler. 880700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 880800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 880900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 881000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 881100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_aput: /* 0x4b */ 881200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 881300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 881400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 881500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 881600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 881700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 881800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 881900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 882000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 882100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 882200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 882300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 882400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 882500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (75 * 128) # Addr of primary handler. 882600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 882700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 882800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 882900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 883000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_aput_wide: /* 0x4c */ 883100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 883200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 883300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 883400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 883500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 883600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 883700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 883800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 883900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 884000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 884100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 884200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 884300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 884400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (76 * 128) # Addr of primary handler. 884500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 884600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 884700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 884800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 884900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_aput_object: /* 0x4d */ 885000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 885100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 885200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 885300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 885400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 885500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 885600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 885700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 885800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 885900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 886000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 886100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 886200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 886300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (77 * 128) # Addr of primary handler. 886400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 886500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 886600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 886700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 886800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_aput_boolean: /* 0x4e */ 886900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 887000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 887100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 887200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 887300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 887400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 887500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 887600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 887700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 887800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 887900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 888000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 888100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 888200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (78 * 128) # Addr of primary handler. 888300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 888400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 888500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 888600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 888700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_aput_byte: /* 0x4f */ 888800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 888900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 889000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 889100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 889200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 889300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 889400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 889500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 889600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 889700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 889800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 889900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 890000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 890100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (79 * 128) # Addr of primary handler. 890200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 890300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 890400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 890500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 890600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_aput_char: /* 0x50 */ 890700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 890800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 890900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 891000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 891100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 891200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 891300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 891400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 891500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 891600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 891700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 891800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 891900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 892000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (80 * 128) # Addr of primary handler. 892100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 892200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 892300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 892400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 892500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_aput_short: /* 0x51 */ 892600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 892700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 892800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 892900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 893000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 893100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 893200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 893300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 893400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 893500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 893600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 893700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 893800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 893900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (81 * 128) # Addr of primary handler. 894000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 894100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 894200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 894300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 894400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_iget: /* 0x52 */ 894500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 894600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 894700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 894800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 894900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 895000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 895100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 895200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 895300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 895400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 895500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 895600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 895700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 895800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (82 * 128) # Addr of primary handler. 895900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 896000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 896100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 896200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 896300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_iget_wide: /* 0x53 */ 896400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 896500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 896600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 896700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 896800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 896900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 897000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 897100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 897200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 897300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 897400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 897500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 897600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 897700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (83 * 128) # Addr of primary handler. 897800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 897900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 898000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 898100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 898200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_iget_object: /* 0x54 */ 898300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 898400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 898500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 898600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 898700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 898800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 898900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 899000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 899100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 899200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 899300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 899400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 899500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 899600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (84 * 128) # Addr of primary handler. 899700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 899800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 899900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 900000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 900100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_iget_boolean: /* 0x55 */ 900200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 900300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 900400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 900500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 900600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 900700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 900800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 900900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 901000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 901100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 901200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 901300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 901400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 901500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (85 * 128) # Addr of primary handler. 901600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 901700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 901800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 901900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 902000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_iget_byte: /* 0x56 */ 902100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 902200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 902300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 902400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 902500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 902600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 902700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 902800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 902900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 903000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 903100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 903200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 903300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 903400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (86 * 128) # Addr of primary handler. 903500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 903600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 903700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 903800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 903900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_iget_char: /* 0x57 */ 904000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 904100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 904200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 904300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 904400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 904500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 904600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 904700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 904800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 904900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 905000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 905100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 905200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 905300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (87 * 128) # Addr of primary handler. 905400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 905500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 905600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 905700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 905800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_iget_short: /* 0x58 */ 905900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 906000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 906100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 906200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 906300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 906400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 906500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 906600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 906700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 906800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 906900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 907000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 907100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 907200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (88 * 128) # Addr of primary handler. 907300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 907400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 907500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 907600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 907700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_iput: /* 0x59 */ 907800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 907900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 908000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 908100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 908200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 908300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 908400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 908500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 908600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 908700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 908800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 908900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 909000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 909100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (89 * 128) # Addr of primary handler. 909200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 909300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 909400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 909500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 909600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_iput_wide: /* 0x5a */ 909700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 909800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 909900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 910000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 910100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 910200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 910300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 910400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 910500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 910600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 910700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 910800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 910900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 911000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (90 * 128) # Addr of primary handler. 911100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 911200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 911300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 911400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 911500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_iput_object: /* 0x5b */ 911600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 911700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 911800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 911900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 912000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 912100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 912200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 912300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 912400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 912500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 912600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 912700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 912800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 912900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (91 * 128) # Addr of primary handler. 913000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 913100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 913200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 913300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 913400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_iput_boolean: /* 0x5c */ 913500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 913600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 913700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 913800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 913900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 914000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 914100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 914200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 914300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 914400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 914500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 914600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 914700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 914800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (92 * 128) # Addr of primary handler. 914900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 915000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 915100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 915200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 915300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_iput_byte: /* 0x5d */ 915400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 915500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 915600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 915700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 915800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 915900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 916000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 916100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 916200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 916300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 916400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 916500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 916600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 916700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (93 * 128) # Addr of primary handler. 916800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 916900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 917000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 917100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 917200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_iput_char: /* 0x5e */ 917300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 917400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 917500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 917600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 917700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 917800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 917900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 918000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 918100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 918200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 918300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 918400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 918500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 918600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (94 * 128) # Addr of primary handler. 918700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 918800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 918900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 919000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 919100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_iput_short: /* 0x5f */ 919200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 919300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 919400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 919500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 919600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 919700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 919800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 919900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 920000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 920100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 920200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 920300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 920400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 920500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (95 * 128) # Addr of primary handler. 920600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 920700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 920800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 920900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 921000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_sget: /* 0x60 */ 921100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 921200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 921300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 921400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 921500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 921600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 921700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 921800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 921900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 922000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 922100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 922200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 922300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 922400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (96 * 128) # Addr of primary handler. 922500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 922600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 922700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 922800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 922900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_sget_wide: /* 0x61 */ 923000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 923100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 923200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 923300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 923400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 923500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 923600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 923700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 923800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 923900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 924000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 924100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 924200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 924300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (97 * 128) # Addr of primary handler. 924400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 924500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 924600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 924700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 924800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_sget_object: /* 0x62 */ 924900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 925000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 925100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 925200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 925300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 925400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 925500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 925600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 925700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 925800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 925900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 926000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 926100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 926200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (98 * 128) # Addr of primary handler. 926300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 926400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 926500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 926600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 926700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_sget_boolean: /* 0x63 */ 926800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 926900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 927000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 927100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 927200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 927300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 927400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 927500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 927600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 927700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 927800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 927900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 928000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 928100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (99 * 128) # Addr of primary handler. 928200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 928300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 928400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 928500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 928600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_sget_byte: /* 0x64 */ 928700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 928800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 928900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 929000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 929100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 929200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 929300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 929400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 929500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 929600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 929700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 929800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 929900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 930000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (100 * 128) # Addr of primary handler. 930100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 930200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 930300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 930400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 930500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_sget_char: /* 0x65 */ 930600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 930700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 930800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 930900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 931000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 931100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 931200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 931300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 931400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 931500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 931600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 931700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 931800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 931900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (101 * 128) # Addr of primary handler. 932000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 932100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 932200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 932300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 932400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_sget_short: /* 0x66 */ 932500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 932600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 932700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 932800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 932900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 933000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 933100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 933200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 933300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 933400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 933500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 933600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 933700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 933800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (102 * 128) # Addr of primary handler. 933900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 934000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 934100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 934200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 934300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_sput: /* 0x67 */ 934400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 934500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 934600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 934700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 934800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 934900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 935000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 935100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 935200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 935300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 935400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 935500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 935600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 935700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (103 * 128) # Addr of primary handler. 935800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 935900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 936000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 936100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 936200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_sput_wide: /* 0x68 */ 936300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 936400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 936500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 936600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 936700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 936800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 936900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 937000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 937100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 937200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 937300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 937400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 937500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 937600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (104 * 128) # Addr of primary handler. 937700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 937800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 937900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 938000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 938100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_sput_object: /* 0x69 */ 938200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 938300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 938400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 938500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 938600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 938700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 938800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 938900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 939000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 939100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 939200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 939300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 939400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 939500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (105 * 128) # Addr of primary handler. 939600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 939700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 939800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 939900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 940000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_sput_boolean: /* 0x6a */ 940100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 940200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 940300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 940400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 940500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 940600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 940700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 940800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 940900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 941000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 941100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 941200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 941300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 941400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (106 * 128) # Addr of primary handler. 941500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 941600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 941700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 941800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 941900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_sput_byte: /* 0x6b */ 942000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 942100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 942200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 942300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 942400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 942500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 942600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 942700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 942800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 942900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 943000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 943100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 943200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 943300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (107 * 128) # Addr of primary handler. 943400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 943500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 943600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 943700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 943800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_sput_char: /* 0x6c */ 943900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 944000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 944100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 944200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 944300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 944400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 944500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 944600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 944700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 944800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 944900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 945000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 945100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 945200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (108 * 128) # Addr of primary handler. 945300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 945400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 945500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 945600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 945700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_sput_short: /* 0x6d */ 945800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 945900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 946000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 946100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 946200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 946300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 946400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 946500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 946600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 946700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 946800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 946900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 947000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 947100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (109 * 128) # Addr of primary handler. 947200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 947300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 947400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 947500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 947600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_invoke_virtual: /* 0x6e */ 947700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 947800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 947900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 948000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 948100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 948200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 948300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 948400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 948500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 948600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 948700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 948800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 948900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 949000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (110 * 128) # Addr of primary handler. 949100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 949200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 949300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 949400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 949500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_invoke_super: /* 0x6f */ 949600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 949700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 949800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 949900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 950000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 950100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 950200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 950300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 950400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 950500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 950600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 950700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 950800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 950900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (111 * 128) # Addr of primary handler. 951000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 951100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 951200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 951300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 951400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_invoke_direct: /* 0x70 */ 951500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 951600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 951700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 951800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 951900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 952000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 952100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 952200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 952300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 952400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 952500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 952600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 952700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 952800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (112 * 128) # Addr of primary handler. 952900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 953000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 953100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 953200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 953300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_invoke_static: /* 0x71 */ 953400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 953500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 953600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 953700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 953800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 953900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 954000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 954100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 954200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 954300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 954400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 954500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 954600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 954700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (113 * 128) # Addr of primary handler. 954800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 954900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 955000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 955100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 955200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_invoke_interface: /* 0x72 */ 955300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 955400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 955500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 955600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 955700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 955800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 955900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 956000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 956100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 956200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 956300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 956400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 956500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 956600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (114 * 128) # Addr of primary handler. 956700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 956800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 956900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 957000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 957100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_return_void_no_barrier: /* 0x73 */ 957200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 957300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 957400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 957500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 957600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 957700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 957800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 957900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 958000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 958100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 958200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 958300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 958400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 958500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (115 * 128) # Addr of primary handler. 958600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 958700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 958800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 958900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 959000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_invoke_virtual_range: /* 0x74 */ 959100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 959200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 959300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 959400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 959500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 959600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 959700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 959800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 959900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 960000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 960100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 960200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 960300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 960400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (116 * 128) # Addr of primary handler. 960500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 960600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 960700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 960800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 960900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_invoke_super_range: /* 0x75 */ 961000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 961100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 961200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 961300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 961400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 961500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 961600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 961700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 961800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 961900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 962000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 962100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 962200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 962300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (117 * 128) # Addr of primary handler. 962400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 962500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 962600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 962700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 962800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_invoke_direct_range: /* 0x76 */ 962900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 963000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 963100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 963200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 963300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 963400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 963500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 963600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 963700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 963800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 963900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 964000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 964100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 964200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (118 * 128) # Addr of primary handler. 964300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 964400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 964500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 964600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 964700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_invoke_static_range: /* 0x77 */ 964800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 964900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 965000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 965100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 965200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 965300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 965400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 965500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 965600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 965700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 965800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 965900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 966000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 966100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (119 * 128) # Addr of primary handler. 966200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 966300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 966400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 966500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 966600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_invoke_interface_range: /* 0x78 */ 966700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 966800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 966900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 967000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 967100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 967200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 967300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 967400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 967500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 967600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 967700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 967800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 967900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 968000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (120 * 128) # Addr of primary handler. 968100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 968200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 968300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 968400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 968500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_unused_79: /* 0x79 */ 968600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 968700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 968800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 968900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 969000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 969100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 969200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 969300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 969400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 969500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 969600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 969700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 969800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 969900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (121 * 128) # Addr of primary handler. 970000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 970100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 970200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 970300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 970400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_unused_7a: /* 0x7a */ 970500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 970600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 970700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 970800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 970900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 971000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 971100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 971200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 971300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 971400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 971500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 971600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 971700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 971800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (122 * 128) # Addr of primary handler. 971900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 972000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 972100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 972200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 972300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_neg_int: /* 0x7b */ 972400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 972500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 972600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 972700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 972800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 972900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 973000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 973100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 973200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 973300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 973400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 973500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 973600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 973700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (123 * 128) # Addr of primary handler. 973800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 973900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 974000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 974100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 974200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_not_int: /* 0x7c */ 974300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 974400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 974500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 974600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 974700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 974800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 974900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 975000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 975100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 975200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 975300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 975400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 975500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 975600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (124 * 128) # Addr of primary handler. 975700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 975800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 975900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 976000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 976100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_neg_long: /* 0x7d */ 976200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 976300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 976400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 976500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 976600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 976700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 976800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 976900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 977000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 977100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 977200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 977300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 977400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 977500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (125 * 128) # Addr of primary handler. 977600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 977700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 977800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 977900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 978000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_not_long: /* 0x7e */ 978100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 978200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 978300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 978400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 978500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 978600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 978700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 978800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 978900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 979000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 979100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 979200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 979300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 979400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (126 * 128) # Addr of primary handler. 979500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 979600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 979700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 979800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 979900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_neg_float: /* 0x7f */ 980000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 980100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 980200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 980300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 980400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 980500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 980600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 980700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 980800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 980900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 981000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 981100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 981200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 981300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (127 * 128) # Addr of primary handler. 981400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 981500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 981600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 981700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 981800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_neg_double: /* 0x80 */ 981900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 982000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 982100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 982200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 982300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 982400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 982500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 982600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 982700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 982800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 982900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 983000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 983100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 983200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (128 * 128) # Addr of primary handler. 983300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 983400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 983500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 983600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 983700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_int_to_long: /* 0x81 */ 983800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 983900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 984000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 984100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 984200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 984300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 984400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 984500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 984600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 984700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 984800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 984900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 985000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 985100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (129 * 128) # Addr of primary handler. 985200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 985300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 985400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 985500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 985600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_int_to_float: /* 0x82 */ 985700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 985800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 985900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 986000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 986100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 986200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 986300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 986400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 986500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 986600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 986700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 986800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 986900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 987000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (130 * 128) # Addr of primary handler. 987100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 987200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 987300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 987400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 987500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_int_to_double: /* 0x83 */ 987600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 987700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 987800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 987900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 988000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 988100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 988200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 988300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 988400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 988500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 988600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 988700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 988800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 988900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (131 * 128) # Addr of primary handler. 989000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 989100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 989200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 989300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 989400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_long_to_int: /* 0x84 */ 989500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 989600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 989700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 989800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 989900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 990000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 990100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 990200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 990300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 990400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 990500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 990600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 990700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 990800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (132 * 128) # Addr of primary handler. 990900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 991000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 991100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 991200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 991300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_long_to_float: /* 0x85 */ 991400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 991500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 991600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 991700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 991800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 991900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 992000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 992100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 992200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 992300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 992400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 992500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 992600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 992700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (133 * 128) # Addr of primary handler. 992800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 992900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 993000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 993100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 993200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_long_to_double: /* 0x86 */ 993300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 993400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 993500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 993600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 993700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 993800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 993900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 994000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 994100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 994200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 994300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 994400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 994500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 994600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (134 * 128) # Addr of primary handler. 994700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 994800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 994900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 995000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 995100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_float_to_int: /* 0x87 */ 995200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 995300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 995400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 995500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 995600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 995700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 995800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 995900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 996000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 996100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 996200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 996300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 996400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 996500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (135 * 128) # Addr of primary handler. 996600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 996700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 996800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 996900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 997000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_float_to_long: /* 0x88 */ 997100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 997200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 997300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 997400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 997500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 997600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 997700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 997800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 997900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 998000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 998100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 998200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 998300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 998400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (136 * 128) # Addr of primary handler. 998500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 998600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 998700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 998800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 998900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_float_to_double: /* 0x89 */ 999000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 999100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 999200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 999300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 999400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 999500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 999600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 999700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 999800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 999900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 1000000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 1000100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 1000200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 1000300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (137 * 128) # Addr of primary handler. 1000400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 1000500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 1000600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 1000700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 1000800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_double_to_int: /* 0x8a */ 1000900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 1001000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 1001100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 1001200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 1001300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 1001400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 1001500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 1001600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 1001700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 1001800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 1001900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 1002000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 1002100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 1002200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (138 * 128) # Addr of primary handler. 1002300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 1002400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 1002500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 1002600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 1002700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_double_to_long: /* 0x8b */ 1002800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 1002900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 1003000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 1003100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 1003200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 1003300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 1003400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 1003500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 1003600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 1003700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 1003800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 1003900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 1004000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 1004100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (139 * 128) # Addr of primary handler. 1004200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 1004300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 1004400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 1004500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 1004600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_double_to_float: /* 0x8c */ 1004700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 1004800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 1004900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 1005000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 1005100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 1005200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 1005300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 1005400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 1005500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 1005600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 1005700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 1005800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 1005900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 1006000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (140 * 128) # Addr of primary handler. 1006100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 1006200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 1006300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 1006400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 1006500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_int_to_byte: /* 0x8d */ 1006600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 1006700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 1006800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 1006900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 1007000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 1007100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 1007200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 1007300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 1007400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 1007500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 1007600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 1007700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 1007800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 1007900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (141 * 128) # Addr of primary handler. 1008000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 1008100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 1008200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 1008300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 1008400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_int_to_char: /* 0x8e */ 1008500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 1008600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 1008700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 1008800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 1008900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 1009000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 1009100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 1009200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 1009300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 1009400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 1009500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 1009600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 1009700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 1009800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (142 * 128) # Addr of primary handler. 1009900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 1010000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 1010100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 1010200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 1010300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_int_to_short: /* 0x8f */ 1010400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 1010500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 1010600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 1010700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 1010800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 1010900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 1011000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 1011100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 1011200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 1011300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 1011400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 1011500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 1011600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 1011700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (143 * 128) # Addr of primary handler. 1011800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 1011900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 1012000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 1012100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 1012200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_add_int: /* 0x90 */ 1012300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 1012400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 1012500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 1012600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 1012700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 1012800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 1012900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 1013000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 1013100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 1013200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 1013300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 1013400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 1013500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 1013600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (144 * 128) # Addr of primary handler. 1013700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 1013800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 1013900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 1014000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 1014100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_sub_int: /* 0x91 */ 1014200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 1014300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 1014400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 1014500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 1014600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 1014700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 1014800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 1014900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 1015000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 1015100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 1015200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 1015300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 1015400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 1015500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (145 * 128) # Addr of primary handler. 1015600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 1015700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 1015800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 1015900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 1016000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_mul_int: /* 0x92 */ 1016100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 1016200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 1016300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 1016400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 1016500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 1016600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 1016700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 1016800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 1016900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 1017000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 1017100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 1017200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 1017300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 1017400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (146 * 128) # Addr of primary handler. 1017500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 1017600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 1017700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 1017800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 1017900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_div_int: /* 0x93 */ 1018000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 1018100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 1018200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 1018300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 1018400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 1018500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 1018600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 1018700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 1018800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 1018900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 1019000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 1019100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 1019200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 1019300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (147 * 128) # Addr of primary handler. 1019400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 1019500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 1019600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 1019700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 1019800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_rem_int: /* 0x94 */ 1019900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 1020000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 1020100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 1020200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 1020300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 1020400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 1020500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 1020600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 1020700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 1020800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 1020900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 1021000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 1021100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 1021200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (148 * 128) # Addr of primary handler. 1021300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 1021400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 1021500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 1021600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 1021700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_and_int: /* 0x95 */ 1021800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 1021900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 1022000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 1022100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 1022200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 1022300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 1022400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 1022500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 1022600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 1022700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 1022800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 1022900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 1023000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 1023100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (149 * 128) # Addr of primary handler. 1023200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 1023300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 1023400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 1023500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 1023600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_or_int: /* 0x96 */ 1023700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 1023800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 1023900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 1024000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 1024100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 1024200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 1024300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 1024400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 1024500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 1024600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 1024700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 1024800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 1024900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 1025000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (150 * 128) # Addr of primary handler. 1025100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 1025200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 1025300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 1025400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 1025500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_xor_int: /* 0x97 */ 1025600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 1025700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 1025800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 1025900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 1026000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 1026100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 1026200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 1026300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 1026400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 1026500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 1026600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 1026700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 1026800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 1026900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (151 * 128) # Addr of primary handler. 1027000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 1027100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 1027200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 1027300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 1027400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_shl_int: /* 0x98 */ 1027500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 1027600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 1027700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 1027800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 1027900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 1028000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 1028100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 1028200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 1028300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 1028400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 1028500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 1028600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 1028700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 1028800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (152 * 128) # Addr of primary handler. 1028900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 1029000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 1029100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 1029200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 1029300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_shr_int: /* 0x99 */ 1029400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 1029500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 1029600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 1029700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 1029800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 1029900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 1030000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 1030100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 1030200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 1030300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 1030400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 1030500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 1030600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 1030700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (153 * 128) # Addr of primary handler. 1030800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 1030900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 1031000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 1031100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 1031200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_ushr_int: /* 0x9a */ 1031300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 1031400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 1031500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 1031600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 1031700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 1031800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 1031900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 1032000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 1032100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 1032200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 1032300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 1032400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 1032500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 1032600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (154 * 128) # Addr of primary handler. 1032700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 1032800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 1032900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 1033000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 1033100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_add_long: /* 0x9b */ 1033200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 1033300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 1033400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 1033500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 1033600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 1033700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 1033800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 1033900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 1034000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 1034100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 1034200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 1034300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 1034400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 1034500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (155 * 128) # Addr of primary handler. 1034600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 1034700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 1034800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 1034900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 1035000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_sub_long: /* 0x9c */ 1035100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 1035200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 1035300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 1035400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 1035500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 1035600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 1035700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 1035800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 1035900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 1036000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 1036100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 1036200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 1036300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 1036400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (156 * 128) # Addr of primary handler. 1036500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 1036600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 1036700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 1036800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 1036900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_mul_long: /* 0x9d */ 1037000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 1037100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 1037200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 1037300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 1037400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 1037500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 1037600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 1037700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 1037800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 1037900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 1038000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 1038100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 1038200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 1038300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (157 * 128) # Addr of primary handler. 1038400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 1038500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 1038600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 1038700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 1038800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_div_long: /* 0x9e */ 1038900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 1039000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 1039100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 1039200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 1039300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 1039400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 1039500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 1039600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 1039700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 1039800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 1039900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 1040000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 1040100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 1040200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (158 * 128) # Addr of primary handler. 1040300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 1040400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 1040500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 1040600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 1040700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_rem_long: /* 0x9f */ 1040800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 1040900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 1041000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 1041100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 1041200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 1041300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 1041400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 1041500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 1041600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 1041700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 1041800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 1041900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 1042000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 1042100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (159 * 128) # Addr of primary handler. 1042200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 1042300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 1042400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 1042500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 1042600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_and_long: /* 0xa0 */ 1042700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 1042800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 1042900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 1043000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 1043100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 1043200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 1043300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 1043400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 1043500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 1043600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 1043700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 1043800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 1043900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 1044000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (160 * 128) # Addr of primary handler. 1044100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 1044200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 1044300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 1044400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 1044500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_or_long: /* 0xa1 */ 1044600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 1044700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 1044800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 1044900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 1045000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 1045100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 1045200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 1045300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 1045400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 1045500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 1045600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 1045700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 1045800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 1045900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (161 * 128) # Addr of primary handler. 1046000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 1046100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 1046200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 1046300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 1046400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_xor_long: /* 0xa2 */ 1046500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 1046600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 1046700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 1046800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 1046900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 1047000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 1047100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 1047200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 1047300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 1047400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 1047500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 1047600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 1047700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 1047800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (162 * 128) # Addr of primary handler. 1047900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 1048000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 1048100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 1048200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 1048300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_shl_long: /* 0xa3 */ 1048400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 1048500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 1048600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 1048700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 1048800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 1048900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 1049000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 1049100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 1049200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 1049300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 1049400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 1049500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 1049600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 1049700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (163 * 128) # Addr of primary handler. 1049800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 1049900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 1050000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 1050100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 1050200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_shr_long: /* 0xa4 */ 1050300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 1050400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 1050500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 1050600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 1050700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 1050800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 1050900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 1051000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 1051100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 1051200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 1051300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 1051400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 1051500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 1051600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (164 * 128) # Addr of primary handler. 1051700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 1051800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 1051900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 1052000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 1052100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_ushr_long: /* 0xa5 */ 1052200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 1052300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 1052400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 1052500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 1052600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 1052700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 1052800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 1052900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 1053000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 1053100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 1053200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 1053300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 1053400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 1053500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (165 * 128) # Addr of primary handler. 1053600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 1053700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 1053800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 1053900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 1054000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_add_float: /* 0xa6 */ 1054100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 1054200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 1054300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 1054400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 1054500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 1054600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 1054700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 1054800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 1054900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 1055000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 1055100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 1055200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 1055300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 1055400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (166 * 128) # Addr of primary handler. 1055500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 1055600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 1055700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 1055800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 1055900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_sub_float: /* 0xa7 */ 1056000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 1056100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 1056200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 1056300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 1056400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 1056500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 1056600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 1056700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 1056800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 1056900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 1057000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 1057100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 1057200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 1057300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (167 * 128) # Addr of primary handler. 1057400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 1057500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 1057600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 1057700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 1057800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_mul_float: /* 0xa8 */ 1057900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 1058000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 1058100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 1058200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 1058300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 1058400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 1058500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 1058600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 1058700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 1058800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 1058900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 1059000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 1059100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 1059200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (168 * 128) # Addr of primary handler. 1059300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 1059400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 1059500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 1059600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 1059700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_div_float: /* 0xa9 */ 1059800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 1059900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 1060000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 1060100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 1060200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 1060300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 1060400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 1060500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 1060600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 1060700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 1060800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 1060900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 1061000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 1061100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (169 * 128) # Addr of primary handler. 1061200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 1061300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 1061400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 1061500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 1061600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_rem_float: /* 0xaa */ 1061700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 1061800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 1061900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 1062000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 1062100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 1062200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 1062300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 1062400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 1062500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 1062600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 1062700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 1062800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 1062900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 1063000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (170 * 128) # Addr of primary handler. 1063100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 1063200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 1063300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 1063400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 1063500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_add_double: /* 0xab */ 1063600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 1063700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 1063800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 1063900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 1064000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 1064100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 1064200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 1064300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 1064400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 1064500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 1064600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 1064700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 1064800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 1064900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (171 * 128) # Addr of primary handler. 1065000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 1065100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 1065200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 1065300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 1065400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_sub_double: /* 0xac */ 1065500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 1065600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 1065700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 1065800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 1065900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 1066000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 1066100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 1066200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 1066300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 1066400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 1066500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 1066600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 1066700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 1066800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (172 * 128) # Addr of primary handler. 1066900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 1067000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 1067100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 1067200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 1067300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_mul_double: /* 0xad */ 1067400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 1067500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 1067600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 1067700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 1067800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 1067900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 1068000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 1068100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 1068200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 1068300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 1068400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 1068500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 1068600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 1068700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (173 * 128) # Addr of primary handler. 1068800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 1068900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 1069000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 1069100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 1069200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_div_double: /* 0xae */ 1069300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 1069400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 1069500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 1069600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 1069700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 1069800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 1069900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 1070000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 1070100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 1070200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 1070300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 1070400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 1070500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 1070600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (174 * 128) # Addr of primary handler. 1070700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 1070800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 1070900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 1071000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 1071100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_rem_double: /* 0xaf */ 1071200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 1071300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 1071400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 1071500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 1071600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 1071700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 1071800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 1071900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 1072000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 1072100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 1072200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 1072300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 1072400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 1072500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (175 * 128) # Addr of primary handler. 1072600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 1072700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 1072800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 1072900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 1073000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_add_int_2addr: /* 0xb0 */ 1073100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 1073200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 1073300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 1073400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 1073500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 1073600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 1073700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 1073800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 1073900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 1074000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 1074100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 1074200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 1074300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 1074400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (176 * 128) # Addr of primary handler. 1074500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 1074600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 1074700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 1074800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 1074900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_sub_int_2addr: /* 0xb1 */ 1075000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 1075100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 1075200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 1075300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 1075400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 1075500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 1075600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 1075700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 1075800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 1075900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 1076000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 1076100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 1076200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 1076300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (177 * 128) # Addr of primary handler. 1076400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 1076500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 1076600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 1076700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 1076800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_mul_int_2addr: /* 0xb2 */ 1076900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 1077000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 1077100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 1077200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 1077300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 1077400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 1077500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 1077600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 1077700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 1077800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 1077900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 1078000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 1078100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 1078200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (178 * 128) # Addr of primary handler. 1078300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 1078400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 1078500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 1078600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 1078700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_div_int_2addr: /* 0xb3 */ 1078800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 1078900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 1079000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 1079100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 1079200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 1079300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 1079400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 1079500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 1079600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 1079700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 1079800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 1079900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 1080000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 1080100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (179 * 128) # Addr of primary handler. 1080200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 1080300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 1080400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 1080500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 1080600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_rem_int_2addr: /* 0xb4 */ 1080700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 1080800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 1080900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 1081000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 1081100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 1081200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 1081300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 1081400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 1081500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 1081600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 1081700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 1081800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 1081900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 1082000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (180 * 128) # Addr of primary handler. 1082100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 1082200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 1082300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 1082400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 1082500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_and_int_2addr: /* 0xb5 */ 1082600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 1082700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 1082800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 1082900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 1083000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 1083100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 1083200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 1083300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 1083400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 1083500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 1083600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 1083700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 1083800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 1083900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (181 * 128) # Addr of primary handler. 1084000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 1084100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 1084200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 1084300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 1084400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_or_int_2addr: /* 0xb6 */ 1084500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 1084600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 1084700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 1084800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 1084900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 1085000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 1085100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 1085200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 1085300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 1085400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 1085500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 1085600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 1085700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 1085800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (182 * 128) # Addr of primary handler. 1085900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 1086000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 1086100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 1086200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 1086300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_xor_int_2addr: /* 0xb7 */ 1086400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 1086500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 1086600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 1086700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 1086800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 1086900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 1087000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 1087100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 1087200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 1087300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 1087400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 1087500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 1087600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 1087700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (183 * 128) # Addr of primary handler. 1087800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 1087900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 1088000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 1088100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 1088200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_shl_int_2addr: /* 0xb8 */ 1088300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 1088400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 1088500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 1088600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 1088700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 1088800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 1088900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 1089000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 1089100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 1089200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 1089300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 1089400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 1089500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 1089600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (184 * 128) # Addr of primary handler. 1089700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 1089800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 1089900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 1090000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 1090100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_shr_int_2addr: /* 0xb9 */ 1090200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 1090300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 1090400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 1090500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 1090600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 1090700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 1090800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 1090900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 1091000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 1091100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 1091200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 1091300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 1091400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 1091500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (185 * 128) # Addr of primary handler. 1091600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 1091700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 1091800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 1091900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 1092000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_ushr_int_2addr: /* 0xba */ 1092100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 1092200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 1092300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 1092400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 1092500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 1092600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 1092700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 1092800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 1092900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 1093000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 1093100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 1093200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 1093300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 1093400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (186 * 128) # Addr of primary handler. 1093500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 1093600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 1093700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 1093800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 1093900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_add_long_2addr: /* 0xbb */ 1094000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 1094100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 1094200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 1094300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 1094400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 1094500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 1094600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 1094700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 1094800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 1094900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 1095000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 1095100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 1095200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 1095300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (187 * 128) # Addr of primary handler. 1095400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 1095500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 1095600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 1095700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 1095800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_sub_long_2addr: /* 0xbc */ 1095900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 1096000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 1096100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 1096200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 1096300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 1096400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 1096500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 1096600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 1096700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 1096800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 1096900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 1097000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 1097100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 1097200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (188 * 128) # Addr of primary handler. 1097300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 1097400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 1097500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 1097600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 1097700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_mul_long_2addr: /* 0xbd */ 1097800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 1097900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 1098000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 1098100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 1098200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 1098300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 1098400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 1098500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 1098600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 1098700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 1098800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 1098900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 1099000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 1099100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (189 * 128) # Addr of primary handler. 1099200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 1099300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 1099400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 1099500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 1099600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_div_long_2addr: /* 0xbe */ 1099700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 1099800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 1099900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 1100000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 1100100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 1100200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 1100300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 1100400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 1100500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 1100600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 1100700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 1100800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 1100900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 1101000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (190 * 128) # Addr of primary handler. 1101100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 1101200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 1101300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 1101400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 1101500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_rem_long_2addr: /* 0xbf */ 1101600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 1101700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 1101800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 1101900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 1102000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 1102100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 1102200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 1102300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 1102400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 1102500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 1102600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 1102700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 1102800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 1102900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (191 * 128) # Addr of primary handler. 1103000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 1103100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 1103200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 1103300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 1103400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_and_long_2addr: /* 0xc0 */ 1103500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 1103600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 1103700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 1103800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 1103900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 1104000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 1104100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 1104200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 1104300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 1104400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 1104500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 1104600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 1104700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 1104800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (192 * 128) # Addr of primary handler. 1104900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 1105000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 1105100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 1105200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 1105300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_or_long_2addr: /* 0xc1 */ 1105400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 1105500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 1105600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 1105700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 1105800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 1105900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 1106000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 1106100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 1106200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 1106300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 1106400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 1106500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 1106600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 1106700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (193 * 128) # Addr of primary handler. 1106800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 1106900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 1107000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 1107100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 1107200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_xor_long_2addr: /* 0xc2 */ 1107300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 1107400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 1107500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 1107600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 1107700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 1107800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 1107900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 1108000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 1108100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 1108200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 1108300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 1108400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 1108500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 1108600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (194 * 128) # Addr of primary handler. 1108700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 1108800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 1108900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 1109000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 1109100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_shl_long_2addr: /* 0xc3 */ 1109200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 1109300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 1109400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 1109500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 1109600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 1109700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 1109800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 1109900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 1110000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 1110100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 1110200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 1110300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 1110400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 1110500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (195 * 128) # Addr of primary handler. 1110600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 1110700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 1110800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 1110900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 1111000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_shr_long_2addr: /* 0xc4 */ 1111100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 1111200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 1111300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 1111400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 1111500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 1111600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 1111700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 1111800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 1111900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 1112000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 1112100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 1112200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 1112300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 1112400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (196 * 128) # Addr of primary handler. 1112500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 1112600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 1112700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 1112800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 1112900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_ushr_long_2addr: /* 0xc5 */ 1113000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 1113100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 1113200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 1113300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 1113400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 1113500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 1113600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 1113700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 1113800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 1113900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 1114000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 1114100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 1114200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 1114300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (197 * 128) # Addr of primary handler. 1114400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 1114500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 1114600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 1114700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 1114800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_add_float_2addr: /* 0xc6 */ 1114900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 1115000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 1115100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 1115200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 1115300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 1115400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 1115500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 1115600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 1115700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 1115800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 1115900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 1116000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 1116100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 1116200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (198 * 128) # Addr of primary handler. 1116300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 1116400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 1116500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 1116600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 1116700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_sub_float_2addr: /* 0xc7 */ 1116800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 1116900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 1117000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 1117100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 1117200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 1117300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 1117400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 1117500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 1117600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 1117700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 1117800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 1117900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 1118000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 1118100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (199 * 128) # Addr of primary handler. 1118200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 1118300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 1118400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 1118500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 1118600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_mul_float_2addr: /* 0xc8 */ 1118700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 1118800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 1118900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 1119000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 1119100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 1119200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 1119300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 1119400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 1119500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 1119600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 1119700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 1119800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 1119900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 1120000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (200 * 128) # Addr of primary handler. 1120100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 1120200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 1120300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 1120400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 1120500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_div_float_2addr: /* 0xc9 */ 1120600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 1120700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 1120800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 1120900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 1121000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 1121100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 1121200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 1121300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 1121400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 1121500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 1121600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 1121700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 1121800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 1121900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (201 * 128) # Addr of primary handler. 1122000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 1122100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 1122200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 1122300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 1122400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_rem_float_2addr: /* 0xca */ 1122500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 1122600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 1122700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 1122800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 1122900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 1123000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 1123100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 1123200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 1123300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 1123400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 1123500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 1123600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 1123700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 1123800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (202 * 128) # Addr of primary handler. 1123900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 1124000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 1124100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 1124200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 1124300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_add_double_2addr: /* 0xcb */ 1124400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 1124500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 1124600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 1124700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 1124800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 1124900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 1125000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 1125100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 1125200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 1125300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 1125400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 1125500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 1125600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 1125700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (203 * 128) # Addr of primary handler. 1125800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 1125900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 1126000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 1126100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 1126200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_sub_double_2addr: /* 0xcc */ 1126300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 1126400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 1126500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 1126600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 1126700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 1126800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 1126900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 1127000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 1127100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 1127200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 1127300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 1127400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 1127500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 1127600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (204 * 128) # Addr of primary handler. 1127700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 1127800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 1127900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 1128000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 1128100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_mul_double_2addr: /* 0xcd */ 1128200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 1128300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 1128400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 1128500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 1128600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 1128700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 1128800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 1128900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 1129000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 1129100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 1129200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 1129300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 1129400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 1129500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (205 * 128) # Addr of primary handler. 1129600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 1129700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 1129800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 1129900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 1130000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_div_double_2addr: /* 0xce */ 1130100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 1130200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 1130300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 1130400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 1130500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 1130600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 1130700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 1130800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 1130900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 1131000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 1131100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 1131200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 1131300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 1131400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (206 * 128) # Addr of primary handler. 1131500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 1131600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 1131700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 1131800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 1131900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_rem_double_2addr: /* 0xcf */ 1132000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 1132100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 1132200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 1132300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 1132400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 1132500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 1132600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 1132700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 1132800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 1132900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 1133000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 1133100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 1133200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 1133300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (207 * 128) # Addr of primary handler. 1133400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 1133500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 1133600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 1133700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 1133800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_add_int_lit16: /* 0xd0 */ 1133900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 1134000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 1134100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 1134200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 1134300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 1134400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 1134500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 1134600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 1134700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 1134800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 1134900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 1135000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 1135100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 1135200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (208 * 128) # Addr of primary handler. 1135300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 1135400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 1135500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 1135600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 1135700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_rsub_int: /* 0xd1 */ 1135800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 1135900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 1136000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 1136100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 1136200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 1136300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 1136400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 1136500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 1136600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 1136700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 1136800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 1136900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 1137000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 1137100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (209 * 128) # Addr of primary handler. 1137200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 1137300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 1137400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 1137500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 1137600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_mul_int_lit16: /* 0xd2 */ 1137700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 1137800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 1137900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 1138000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 1138100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 1138200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 1138300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 1138400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 1138500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 1138600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 1138700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 1138800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 1138900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 1139000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (210 * 128) # Addr of primary handler. 1139100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 1139200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 1139300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 1139400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 1139500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_div_int_lit16: /* 0xd3 */ 1139600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 1139700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 1139800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 1139900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 1140000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 1140100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 1140200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 1140300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 1140400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 1140500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 1140600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 1140700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 1140800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 1140900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (211 * 128) # Addr of primary handler. 1141000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 1141100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 1141200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 1141300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 1141400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_rem_int_lit16: /* 0xd4 */ 1141500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 1141600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 1141700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 1141800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 1141900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 1142000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 1142100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 1142200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 1142300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 1142400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 1142500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 1142600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 1142700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 1142800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (212 * 128) # Addr of primary handler. 1142900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 1143000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 1143100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 1143200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 1143300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_and_int_lit16: /* 0xd5 */ 1143400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 1143500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 1143600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 1143700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 1143800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 1143900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 1144000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 1144100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 1144200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 1144300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 1144400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 1144500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 1144600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 1144700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (213 * 128) # Addr of primary handler. 1144800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 1144900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 1145000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 1145100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 1145200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_or_int_lit16: /* 0xd6 */ 1145300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 1145400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 1145500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 1145600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 1145700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 1145800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 1145900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 1146000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 1146100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 1146200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 1146300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 1146400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 1146500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 1146600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (214 * 128) # Addr of primary handler. 1146700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 1146800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 1146900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 1147000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 1147100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_xor_int_lit16: /* 0xd7 */ 1147200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 1147300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 1147400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 1147500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 1147600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 1147700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 1147800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 1147900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 1148000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 1148100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 1148200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 1148300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 1148400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 1148500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (215 * 128) # Addr of primary handler. 1148600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 1148700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 1148800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 1148900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 1149000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_add_int_lit8: /* 0xd8 */ 1149100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 1149200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 1149300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 1149400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 1149500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 1149600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 1149700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 1149800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 1149900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 1150000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 1150100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 1150200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 1150300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 1150400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (216 * 128) # Addr of primary handler. 1150500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 1150600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 1150700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 1150800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 1150900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_rsub_int_lit8: /* 0xd9 */ 1151000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 1151100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 1151200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 1151300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 1151400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 1151500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 1151600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 1151700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 1151800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 1151900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 1152000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 1152100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 1152200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 1152300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (217 * 128) # Addr of primary handler. 1152400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 1152500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 1152600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 1152700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 1152800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_mul_int_lit8: /* 0xda */ 1152900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 1153000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 1153100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 1153200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 1153300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 1153400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 1153500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 1153600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 1153700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 1153800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 1153900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 1154000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 1154100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 1154200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (218 * 128) # Addr of primary handler. 1154300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 1154400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 1154500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 1154600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 1154700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_div_int_lit8: /* 0xdb */ 1154800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 1154900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 1155000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 1155100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 1155200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 1155300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 1155400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 1155500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 1155600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 1155700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 1155800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 1155900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 1156000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 1156100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (219 * 128) # Addr of primary handler. 1156200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 1156300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 1156400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 1156500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 1156600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_rem_int_lit8: /* 0xdc */ 1156700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 1156800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 1156900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 1157000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 1157100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 1157200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 1157300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 1157400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 1157500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 1157600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 1157700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 1157800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 1157900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 1158000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (220 * 128) # Addr of primary handler. 1158100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 1158200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 1158300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 1158400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 1158500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_and_int_lit8: /* 0xdd */ 1158600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 1158700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 1158800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 1158900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 1159000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 1159100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 1159200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 1159300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 1159400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 1159500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 1159600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 1159700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 1159800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 1159900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (221 * 128) # Addr of primary handler. 1160000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 1160100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 1160200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 1160300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 1160400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_or_int_lit8: /* 0xde */ 1160500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 1160600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 1160700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 1160800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 1160900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 1161000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 1161100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 1161200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 1161300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 1161400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 1161500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 1161600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 1161700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 1161800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (222 * 128) # Addr of primary handler. 1161900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 1162000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 1162100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 1162200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 1162300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_xor_int_lit8: /* 0xdf */ 1162400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 1162500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 1162600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 1162700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 1162800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 1162900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 1163000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 1163100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 1163200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 1163300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 1163400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 1163500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 1163600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 1163700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (223 * 128) # Addr of primary handler. 1163800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 1163900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 1164000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 1164100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 1164200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_shl_int_lit8: /* 0xe0 */ 1164300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 1164400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 1164500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 1164600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 1164700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 1164800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 1164900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 1165000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 1165100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 1165200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 1165300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 1165400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 1165500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 1165600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (224 * 128) # Addr of primary handler. 1165700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 1165800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 1165900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 1166000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 1166100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_shr_int_lit8: /* 0xe1 */ 1166200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 1166300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 1166400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 1166500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 1166600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 1166700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 1166800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 1166900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 1167000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 1167100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 1167200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 1167300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 1167400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 1167500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (225 * 128) # Addr of primary handler. 1167600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 1167700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 1167800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 1167900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 1168000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_ushr_int_lit8: /* 0xe2 */ 1168100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 1168200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 1168300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 1168400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 1168500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 1168600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 1168700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 1168800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 1168900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 1169000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 1169100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 1169200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 1169300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 1169400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (226 * 128) # Addr of primary handler. 1169500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 1169600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 1169700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 1169800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 1169900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_iget_quick: /* 0xe3 */ 1170000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 1170100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 1170200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 1170300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 1170400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 1170500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 1170600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 1170700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 1170800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 1170900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 1171000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 1171100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 1171200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 1171300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (227 * 128) # Addr of primary handler. 1171400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 1171500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 1171600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 1171700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 1171800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_iget_wide_quick: /* 0xe4 */ 1171900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 1172000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 1172100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 1172200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 1172300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 1172400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 1172500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 1172600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 1172700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 1172800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 1172900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 1173000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 1173100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 1173200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (228 * 128) # Addr of primary handler. 1173300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 1173400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 1173500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 1173600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 1173700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_iget_object_quick: /* 0xe5 */ 1173800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 1173900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 1174000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 1174100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 1174200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 1174300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 1174400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 1174500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 1174600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 1174700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 1174800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 1174900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 1175000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 1175100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (229 * 128) # Addr of primary handler. 1175200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 1175300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 1175400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 1175500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 1175600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_iput_quick: /* 0xe6 */ 1175700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 1175800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 1175900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 1176000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 1176100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 1176200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 1176300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 1176400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 1176500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 1176600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 1176700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 1176800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 1176900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 1177000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (230 * 128) # Addr of primary handler. 1177100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 1177200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 1177300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 1177400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 1177500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_iput_wide_quick: /* 0xe7 */ 1177600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 1177700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 1177800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 1177900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 1178000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 1178100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 1178200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 1178300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 1178400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 1178500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 1178600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 1178700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 1178800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 1178900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (231 * 128) # Addr of primary handler. 1179000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 1179100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 1179200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 1179300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 1179400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_iput_object_quick: /* 0xe8 */ 1179500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 1179600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 1179700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 1179800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 1179900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 1180000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 1180100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 1180200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 1180300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 1180400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 1180500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 1180600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 1180700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 1180800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (232 * 128) # Addr of primary handler. 1180900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 1181000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 1181100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 1181200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 1181300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_invoke_virtual_quick: /* 0xe9 */ 1181400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 1181500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 1181600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 1181700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 1181800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 1181900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 1182000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 1182100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 1182200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 1182300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 1182400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 1182500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 1182600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 1182700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (233 * 128) # Addr of primary handler. 1182800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 1182900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 1183000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 1183100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 1183200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_invoke_virtual_range_quick: /* 0xea */ 1183300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 1183400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 1183500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 1183600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 1183700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 1183800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 1183900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 1184000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 1184100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 1184200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 1184300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 1184400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 1184500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 1184600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (234 * 128) # Addr of primary handler. 1184700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 1184800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 1184900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 1185000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 1185100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_iput_boolean_quick: /* 0xeb */ 1185200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 1185300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 1185400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 1185500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 1185600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 1185700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 1185800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 1185900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 1186000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 1186100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 1186200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 1186300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 1186400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 1186500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (235 * 128) # Addr of primary handler. 1186600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 1186700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 1186800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 1186900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 1187000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_iput_byte_quick: /* 0xec */ 1187100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 1187200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 1187300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 1187400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 1187500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 1187600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 1187700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 1187800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 1187900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 1188000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 1188100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 1188200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 1188300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 1188400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (236 * 128) # Addr of primary handler. 1188500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 1188600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 1188700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 1188800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 1188900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_iput_char_quick: /* 0xed */ 1189000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 1189100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 1189200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 1189300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 1189400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 1189500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 1189600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 1189700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 1189800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 1189900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 1190000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 1190100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 1190200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 1190300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (237 * 128) # Addr of primary handler. 1190400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 1190500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 1190600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 1190700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 1190800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_iput_short_quick: /* 0xee */ 1190900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 1191000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 1191100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 1191200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 1191300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 1191400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 1191500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 1191600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 1191700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 1191800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 1191900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 1192000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 1192100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 1192200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (238 * 128) # Addr of primary handler. 1192300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 1192400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 1192500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 1192600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 1192700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_iget_boolean_quick: /* 0xef */ 1192800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 1192900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 1193000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 1193100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 1193200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 1193300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 1193400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 1193500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 1193600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 1193700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 1193800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 1193900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 1194000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 1194100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (239 * 128) # Addr of primary handler. 1194200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 1194300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 1194400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 1194500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 1194600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_iget_byte_quick: /* 0xf0 */ 1194700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 1194800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 1194900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 1195000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 1195100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 1195200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 1195300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 1195400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 1195500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 1195600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 1195700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 1195800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 1195900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 1196000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (240 * 128) # Addr of primary handler. 1196100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 1196200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 1196300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 1196400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 1196500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_iget_char_quick: /* 0xf1 */ 1196600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 1196700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 1196800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 1196900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 1197000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 1197100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 1197200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 1197300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 1197400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 1197500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 1197600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 1197700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 1197800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 1197900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (241 * 128) # Addr of primary handler. 1198000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 1198100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 1198200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 1198300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 1198400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_iget_short_quick: /* 0xf2 */ 1198500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 1198600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 1198700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 1198800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 1198900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 1199000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 1199100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 1199200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 1199300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 1199400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 1199500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 1199600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 1199700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 1199800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (242 * 128) # Addr of primary handler. 1199900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 1200000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 1200100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 1200200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 1200300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_invoke_lambda: /* 0xf3 */ 1200400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 1200500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 1200600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 1200700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 1200800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 1200900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 1201000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 1201100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 1201200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 1201300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 1201400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 1201500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 1201600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 1201700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (243 * 128) # Addr of primary handler. 1201800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 1201900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 1202000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 1202100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 1202200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_unused_f4: /* 0xf4 */ 1202300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 1202400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 1202500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 1202600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 1202700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 1202800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 1202900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 1203000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 1203100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 1203200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 1203300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 1203400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 1203500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 1203600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (244 * 128) # Addr of primary handler. 1203700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 1203800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 1203900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 1204000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 1204100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_capture_variable: /* 0xf5 */ 1204200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 1204300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 1204400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 1204500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 1204600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 1204700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 1204800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 1204900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 1205000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 1205100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 1205200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 1205300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 1205400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 1205500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (245 * 128) # Addr of primary handler. 1205600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 1205700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 1205800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 1205900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 1206000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_create_lambda: /* 0xf6 */ 1206100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 1206200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 1206300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 1206400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 1206500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 1206600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 1206700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 1206800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 1206900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 1207000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 1207100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 1207200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 1207300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 1207400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (246 * 128) # Addr of primary handler. 1207500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 1207600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 1207700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 1207800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 1207900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_liberate_variable: /* 0xf7 */ 1208000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 1208100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 1208200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 1208300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 1208400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 1208500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 1208600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 1208700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 1208800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 1208900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 1209000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 1209100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 1209200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 1209300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (247 * 128) # Addr of primary handler. 1209400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 1209500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 1209600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 1209700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 1209800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_box_lambda: /* 0xf8 */ 1209900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 1210000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 1210100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 1210200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 1210300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 1210400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 1210500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 1210600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 1210700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 1210800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 1210900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 1211000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 1211100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 1211200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (248 * 128) # Addr of primary handler. 1211300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 1211400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 1211500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 1211600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 1211700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_unbox_lambda: /* 0xf9 */ 1211800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 1211900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 1212000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 1212100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 1212200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 1212300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 1212400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 1212500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 1212600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 1212700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 1212800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 1212900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 1213000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 1213100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (249 * 128) # Addr of primary handler. 1213200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 1213300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 1213400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 1213500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 1213600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_unused_fa: /* 0xfa */ 1213700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 1213800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 1213900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 1214000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 1214100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 1214200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 1214300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 1214400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 1214500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 1214600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 1214700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 1214800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 1214900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 1215000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (250 * 128) # Addr of primary handler. 1215100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 1215200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 1215300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 1215400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 1215500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_unused_fb: /* 0xfb */ 1215600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 1215700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 1215800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 1215900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 1216000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 1216100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 1216200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 1216300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 1216400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 1216500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 1216600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 1216700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 1216800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 1216900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (251 * 128) # Addr of primary handler. 1217000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 1217100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 1217200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 1217300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 1217400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_unused_fc: /* 0xfc */ 1217500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 1217600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 1217700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 1217800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 1217900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 1218000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 1218100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 1218200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 1218300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 1218400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 1218500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 1218600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 1218700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 1218800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (252 * 128) # Addr of primary handler. 1218900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 1219000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 1219100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 1219200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 1219300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_unused_fd: /* 0xfd */ 1219400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 1219500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 1219600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 1219700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 1219800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 1219900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 1220000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 1220100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 1220200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 1220300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 1220400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 1220500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 1220600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 1220700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (253 * 128) # Addr of primary handler. 1220800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 1220900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 1221000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 1221100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 1221200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_unused_fe: /* 0xfe */ 1221300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 1221400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 1221500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 1221600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 1221700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 1221800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 1221900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 1222000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 1222100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 1222200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 1222300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 1222400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 1222500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 1222600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (254 * 128) # Addr of primary handler. 1222700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 1222800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 1222900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* ------------------------------ */ 1223000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 1223100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L_ALT_op_unused_ff: /* 0xff */ 1223200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/alt_stub.S */ 1223300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 1223400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 1223500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * any interesting requests and then jump to the real instruction 1223600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * handler. Note that the call to MterpCheckBefore is done as a tail call. 1223700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 1223800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpCheckBefore 1223900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 1224000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 1224100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla ra, artMterpAsmInstructionStart 1224200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dla t9, MterpCheckBefore 1224300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 1224400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 1224500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu ra, ra, (255 * 128) # Addr of primary handler. 1224600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jalr zero, t9 # (self, shadow_frame) Note: tail call. 1224700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 1224800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .balign 128 1224900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .size artMterpAsmAltInstructionStart, .-artMterpAsmAltInstructionStart 1225000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .global artMterpAsmAltInstructionEnd 1225100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey FrunzeartMterpAsmAltInstructionEnd: 1225200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* File: mips64/footer.S */ 1225300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 1225400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * We've detected a condition that will result in an exception, but the exception 1225500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * has not yet been thrown. Just bail out to the reference interpreter to deal with it. 1225600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * TUNING: for consistency, we may want to just go ahead and handle these here. 1225700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 1225800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 1225900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpLogDivideByZeroException 1226000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunzecommon_errDivideByZero: 1226100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 1226200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze#if MTERP_LOGGING 1226300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 1226400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 1226500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jal MterpLogDivideByZeroException 1226600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze#endif 1226700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze b MterpCommonFallback 1226800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 1226900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpLogArrayIndexException 1227000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunzecommon_errArrayIndex: 1227100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 1227200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze#if MTERP_LOGGING 1227300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 1227400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 1227500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jal MterpLogArrayIndexException 1227600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze#endif 1227700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze b MterpCommonFallback 1227800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 1227900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpLogNullObjectException 1228000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunzecommon_errNullObject: 1228100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 1228200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze#if MTERP_LOGGING 1228300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 1228400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 1228500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jal MterpLogNullObjectException 1228600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze#endif 1228700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze b MterpCommonFallback 1228800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 1228900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 1229000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * If we're here, something is out of the ordinary. If there is a pending 1229100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * exception, handle it. Otherwise, roll back and retry with the reference 1229200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * interpreter. 1229300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 1229400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey FrunzeMterpPossibleException: 1229500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ld a0, THREAD_EXCEPTION_OFFSET(rSELF) 1229600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze beqzc a0, MterpFallback # If not, fall back to reference interpreter. 1229700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* intentional fallthrough - handle pending exception. */ 1229800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 1229900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * On return from a runtime helper routine, we've found a pending exception. 1230000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Can we handle it here - or need to bail out to caller? 1230100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 1230200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 1230300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpHandleException 12304db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze .extern MterpShouldSwitchInterpreters 1230500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey FrunzeMterpException: 1230600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 1230700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 1230800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jal MterpHandleException # (self, shadow_frame) 1230900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze beqzc v0, MterpExceptionReturn # no local catch, back to caller. 1231000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ld a0, OFF_FP_CODE_ITEM(rFP) 1231100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze lwu a1, OFF_FP_DEX_PC(rFP) 1231200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 1231300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu rPC, a0, CODEITEM_INSNS_OFFSET 1231400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze dlsa rPC, a1, rPC, 1 # generate new dex_pc_ptr 12315db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze /* Do we need to switch interpreters? */ 12316db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze jal MterpShouldSwitchInterpreters 12317db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze bnezc v0, MterpFallback 1231800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* resume execution at catch block */ 12319db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze EXPORT_PC 1232000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze FETCH_INST 1232100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_INST_OPCODE v0 1232200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GOTO_OPCODE v0 1232300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze /* NOTE: no fallthrough */ 1232400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 1232500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 1232600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Check for suspend check request. Assumes rINST already loaded, rPC advanced and 1232700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * still needs to get the opcode and branch to it, and flags are in ra. 1232800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 1232900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpSuspendCheck 1233000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey FrunzeMterpCheckSuspendAndContinue: 1233100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze REFRESH_IBASE 1233200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze and ra, ra, (THREAD_SUSPEND_REQUEST | THREAD_CHECKPOINT_REQUEST) 1233300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze bnez ra, check1 1233400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_INST_OPCODE v0 # extract opcode from rINST 1233500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GOTO_OPCODE v0 # jump to next instruction 1233600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunzecheck1: 1233700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 1233800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 1233900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jal MterpSuspendCheck # (self) 12340db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze bnezc v0, MterpFallback # Something in the environment changed, switch interpreters 1234100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GET_INST_OPCODE v0 # extract opcode from rINST 1234200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze GOTO_OPCODE v0 # jump to next instruction 1234300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 1234400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 12345db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze * On-stack replacement has happened, and now we've returned from the compiled method. 12346db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze */ 12347db045bea24d28ce6ad932fec4ce055af7be530e2Alexey FrunzeMterpOnStackReplacement: 12348db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze#if MTERP_LOGGING 12349db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze move a0, rSELF 12350db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 12351db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze move a2, rINST # rINST contains offset 12352db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze jal MterpLogOSR 12353db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze#endif 12354db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze li v0, 1 # Signal normal return 12355db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze b MterpDone 12356db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze 12357db045bea24d28ce6ad932fec4ce055af7be530e2Alexey Frunze/* 1235800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Bail out to reference interpreter. 1235900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 1236000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .extern MterpLogFallback 1236100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey FrunzeMterpFallback: 1236200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze EXPORT_PC 1236300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze#if MTERP_LOGGING 1236400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze move a0, rSELF 1236500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu a1, rFP, OFF_FP_SHADOWFRAME 1236600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jal MterpLogFallback 1236700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze#endif 1236800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey FrunzeMterpCommonFallback: 1236900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze li v0, 0 # signal retry with reference interpreter. 1237000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze b MterpDone 1237100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 1237200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 1237300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * We pushed some registers on the stack in ExecuteMterpImpl, then saved 1237400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * SP and RA. Here we restore SP, restore the registers, and then restore 1237500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * RA to PC. 1237600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * 1237700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * On entry: 1237800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * uint32_t* rFP (should still be live, pointer to base of vregs) 1237900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 1238000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey FrunzeMterpExceptionReturn: 1238100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze li v0, 1 # signal return to caller. 1238200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze b MterpDone 1238300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze/* 1238400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * Returned value is expected in a0 and if it's not 64-bit, the 32 most 1238500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze * significant bits of a0 must be 0. 1238600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze */ 1238700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey FrunzeMterpReturn: 1238800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ld a2, OFF_FP_RESULT_REGISTER(rFP) 1238900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze sd a0, 0(a2) 1239000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze li v0, 1 # signal return to caller. 1239100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey FrunzeMterpDone: 1239200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ld s5, STACK_OFFSET_S5(sp) 1239300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .cfi_restore 21 1239400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ld s4, STACK_OFFSET_S4(sp) 1239500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .cfi_restore 20 1239600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ld s3, STACK_OFFSET_S3(sp) 1239700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .cfi_restore 19 1239800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ld s2, STACK_OFFSET_S2(sp) 1239900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .cfi_restore 18 1240000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ld s1, STACK_OFFSET_S1(sp) 1240100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .cfi_restore 17 1240200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ld s0, STACK_OFFSET_S0(sp) 1240300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .cfi_restore 16 1240400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 1240500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ld ra, STACK_OFFSET_RA(sp) 1240600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .cfi_restore 31 1240700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 1240800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze ld t8, STACK_OFFSET_GP(sp) 1240900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .cpreturn 1241000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .cfi_restore 28 1241100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 1241200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .set noreorder 1241300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze jr ra 1241400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze daddu sp, sp, STACK_SIZE 1241500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .cfi_adjust_cfa_offset -STACK_SIZE 1241600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 1241700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .cfi_endproc 1241800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze .size ExecuteMterpImpl, .-ExecuteMterpImpl 1241900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze 12420