mga_drm.h revision d7db594b8d1dab36b711bd887a9dd21675c87243
1655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng/**************************************************************************** 2655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng **************************************************************************** 3655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng *** 4655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng *** This header was automatically generated from a Linux kernel header 5655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng *** of the same name, to make information necessary for userspace to 6655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng *** call into the kernel available to libc. It contains only constants, 7655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng *** structures, and macros generated from the original header, and thus, 8655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng *** contains no copyrightable information. 9655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng *** 10655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng *** To edit the content of this header, modify the corresponding 11655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng *** source file (e.g. under external/kernel-headers/original/) then 12655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng *** run bionic/libc/kernel/tools/update_all.py 13655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng *** 14655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng *** Any manual change here will be lost the next time this script will 15655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng *** be run. You've been warned! 16655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng *** 17655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng **************************************************************************** 18655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng ****************************************************************************/ 19655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#ifndef __MGA_DRM_H__ 20655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define __MGA_DRM_H__ 21655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#include <drm/drm.h> 22655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#ifndef __MGA_SAREA_DEFINES__ 23655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 24655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define __MGA_SAREA_DEFINES__ 25655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define MGA_F 0x1 26655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define MGA_A 0x2 27655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define MGA_S 0x4 28655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 29655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define MGA_T2 0x8 30655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define MGA_WARP_TGZ 0 31655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define MGA_WARP_TGZF (MGA_F) 32655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define MGA_WARP_TGZA (MGA_A) 33655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 34d7db594b8d1dab36b711bd887a9dd21675c87243Tao Bao#define MGA_WARP_TGZAF (MGA_F | MGA_A) 35655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define MGA_WARP_TGZS (MGA_S) 36d7db594b8d1dab36b711bd887a9dd21675c87243Tao Bao#define MGA_WARP_TGZSF (MGA_S | MGA_F) 37d7db594b8d1dab36b711bd887a9dd21675c87243Tao Bao#define MGA_WARP_TGZSA (MGA_S | MGA_A) 38655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 39d7db594b8d1dab36b711bd887a9dd21675c87243Tao Bao#define MGA_WARP_TGZSAF (MGA_S | MGA_F | MGA_A) 40655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define MGA_WARP_T2GZ (MGA_T2) 41d7db594b8d1dab36b711bd887a9dd21675c87243Tao Bao#define MGA_WARP_T2GZF (MGA_T2 | MGA_F) 42d7db594b8d1dab36b711bd887a9dd21675c87243Tao Bao#define MGA_WARP_T2GZA (MGA_T2 | MGA_A) 43655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 44d7db594b8d1dab36b711bd887a9dd21675c87243Tao Bao#define MGA_WARP_T2GZAF (MGA_T2 | MGA_A | MGA_F) 45d7db594b8d1dab36b711bd887a9dd21675c87243Tao Bao#define MGA_WARP_T2GZS (MGA_T2 | MGA_S) 46d7db594b8d1dab36b711bd887a9dd21675c87243Tao Bao#define MGA_WARP_T2GZSF (MGA_T2 | MGA_S | MGA_F) 47d7db594b8d1dab36b711bd887a9dd21675c87243Tao Bao#define MGA_WARP_T2GZSA (MGA_T2 | MGA_S | MGA_A) 48655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 49d7db594b8d1dab36b711bd887a9dd21675c87243Tao Bao#define MGA_WARP_T2GZSAF (MGA_T2 | MGA_S | MGA_F | MGA_A) 50655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define MGA_MAX_G200_PIPES 8 51655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define MGA_MAX_G400_PIPES 16 52655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define MGA_MAX_WARP_PIPES MGA_MAX_G400_PIPES 53655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 54655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define MGA_WARP_UCODE_SIZE 32768 55655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define MGA_CARD_TYPE_G200 1 56655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define MGA_CARD_TYPE_G400 2 57655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define MGA_CARD_TYPE_G450 3 58655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 59655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define MGA_CARD_TYPE_G550 4 60655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define MGA_FRONT 0x1 61655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define MGA_BACK 0x2 62655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define MGA_DEPTH 0x4 63655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 64655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define MGA_UPLOAD_CONTEXT 0x1 65655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define MGA_UPLOAD_TEX0 0x2 66655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define MGA_UPLOAD_TEX1 0x4 67655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define MGA_UPLOAD_PIPE 0x8 68655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 69655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define MGA_UPLOAD_TEX0IMAGE 0x10 70655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define MGA_UPLOAD_TEX1IMAGE 0x20 71655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define MGA_UPLOAD_2D 0x40 72655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define MGA_WAIT_AGE 0x80 73655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 74655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define MGA_UPLOAD_CLIPRECTS 0x100 75655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define MGA_BUFFER_SIZE (1 << 16) 76655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define MGA_NUM_BUFFERS 128 77655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define MGA_NR_SAREA_CLIPRECTS 8 78655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 79655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define MGA_CARD_HEAP 0 80655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define MGA_AGP_HEAP 1 81655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define MGA_NR_TEX_HEAPS 2 82655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define MGA_NR_TEX_REGIONS 16 83655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 84655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define MGA_LOG_MIN_TEX_REGION_SIZE 16 85655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define DRM_MGA_IDLE_RETRY 2048 86655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#endif 87655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Chengtypedef struct { 88655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 89d7db594b8d1dab36b711bd887a9dd21675c87243Tao Bao unsigned int dstorg; 90d7db594b8d1dab36b711bd887a9dd21675c87243Tao Bao unsigned int maccess; 91d7db594b8d1dab36b711bd887a9dd21675c87243Tao Bao unsigned int plnwt; 92d7db594b8d1dab36b711bd887a9dd21675c87243Tao Bao unsigned int dwgctl; 93655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 94d7db594b8d1dab36b711bd887a9dd21675c87243Tao Bao unsigned int alphactrl; 95d7db594b8d1dab36b711bd887a9dd21675c87243Tao Bao unsigned int fogcolor; 96d7db594b8d1dab36b711bd887a9dd21675c87243Tao Bao unsigned int wflag; 97d7db594b8d1dab36b711bd887a9dd21675c87243Tao Bao unsigned int tdualstage0; 98655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 99d7db594b8d1dab36b711bd887a9dd21675c87243Tao Bao unsigned int tdualstage1; 100d7db594b8d1dab36b711bd887a9dd21675c87243Tao Bao unsigned int fcol; 101d7db594b8d1dab36b711bd887a9dd21675c87243Tao Bao unsigned int stencil; 102d7db594b8d1dab36b711bd887a9dd21675c87243Tao Bao unsigned int stencilctl; 103655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 104655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng} drm_mga_context_regs_t; 105655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Chengtypedef struct { 106d7db594b8d1dab36b711bd887a9dd21675c87243Tao Bao unsigned int pitch; 107655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng} drm_mga_server_regs_t; 108655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 109655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Chengtypedef struct { 110d7db594b8d1dab36b711bd887a9dd21675c87243Tao Bao unsigned int texctl; 111d7db594b8d1dab36b711bd887a9dd21675c87243Tao Bao unsigned int texctl2; 112d7db594b8d1dab36b711bd887a9dd21675c87243Tao Bao unsigned int texfilter; 113655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 114d7db594b8d1dab36b711bd887a9dd21675c87243Tao Bao unsigned int texbordercol; 115d7db594b8d1dab36b711bd887a9dd21675c87243Tao Bao unsigned int texorg; 116d7db594b8d1dab36b711bd887a9dd21675c87243Tao Bao unsigned int texwidth; 117d7db594b8d1dab36b711bd887a9dd21675c87243Tao Bao unsigned int texheight; 118655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 119d7db594b8d1dab36b711bd887a9dd21675c87243Tao Bao unsigned int texorg1; 120d7db594b8d1dab36b711bd887a9dd21675c87243Tao Bao unsigned int texorg2; 121d7db594b8d1dab36b711bd887a9dd21675c87243Tao Bao unsigned int texorg3; 122d7db594b8d1dab36b711bd887a9dd21675c87243Tao Bao unsigned int texorg4; 123655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 124655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng} drm_mga_texture_regs_t; 125655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Chengtypedef struct { 126d7db594b8d1dab36b711bd887a9dd21675c87243Tao Bao unsigned int head; 127d7db594b8d1dab36b711bd887a9dd21675c87243Tao Bao unsigned int wrap; 128655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 129655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng} drm_mga_age_t; 130655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Chengtypedef struct _drm_mga_sarea { 131d7db594b8d1dab36b711bd887a9dd21675c87243Tao Bao drm_mga_context_regs_t context_state; 132d7db594b8d1dab36b711bd887a9dd21675c87243Tao Bao drm_mga_server_regs_t server_state; 133d7db594b8d1dab36b711bd887a9dd21675c87243Tao Bao/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 134d7db594b8d1dab36b711bd887a9dd21675c87243Tao Bao drm_mga_texture_regs_t tex_state[2]; 135d7db594b8d1dab36b711bd887a9dd21675c87243Tao Bao unsigned int warp_pipe; 136d7db594b8d1dab36b711bd887a9dd21675c87243Tao Bao unsigned int dirty; 137d7db594b8d1dab36b711bd887a9dd21675c87243Tao Bao unsigned int vertsize; 138d7db594b8d1dab36b711bd887a9dd21675c87243Tao Bao/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 139d7db594b8d1dab36b711bd887a9dd21675c87243Tao Bao struct drm_clip_rect boxes[MGA_NR_SAREA_CLIPRECTS]; 140d7db594b8d1dab36b711bd887a9dd21675c87243Tao Bao unsigned int nbox; 141d7db594b8d1dab36b711bd887a9dd21675c87243Tao Bao unsigned int req_drawable; 142d7db594b8d1dab36b711bd887a9dd21675c87243Tao Bao unsigned int req_draw_buffer; 143d7db594b8d1dab36b711bd887a9dd21675c87243Tao Bao/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 144d7db594b8d1dab36b711bd887a9dd21675c87243Tao Bao unsigned int exported_drawable; 145d7db594b8d1dab36b711bd887a9dd21675c87243Tao Bao unsigned int exported_index; 146d7db594b8d1dab36b711bd887a9dd21675c87243Tao Bao unsigned int exported_stamp; 147d7db594b8d1dab36b711bd887a9dd21675c87243Tao Bao unsigned int exported_buffers; 148d7db594b8d1dab36b711bd887a9dd21675c87243Tao Bao/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 149d7db594b8d1dab36b711bd887a9dd21675c87243Tao Bao unsigned int exported_nfront; 150d7db594b8d1dab36b711bd887a9dd21675c87243Tao Bao unsigned int exported_nback; 151d7db594b8d1dab36b711bd887a9dd21675c87243Tao Bao int exported_back_x, exported_front_x, exported_w; 152d7db594b8d1dab36b711bd887a9dd21675c87243Tao Bao int exported_back_y, exported_front_y, exported_h; 153d7db594b8d1dab36b711bd887a9dd21675c87243Tao Bao/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 154d7db594b8d1dab36b711bd887a9dd21675c87243Tao Bao struct drm_clip_rect exported_boxes[MGA_NR_SAREA_CLIPRECTS]; 155d7db594b8d1dab36b711bd887a9dd21675c87243Tao Bao unsigned int status[4]; 156d7db594b8d1dab36b711bd887a9dd21675c87243Tao Bao unsigned int last_wrap; 157d7db594b8d1dab36b711bd887a9dd21675c87243Tao Bao drm_mga_age_t last_frame; 158d7db594b8d1dab36b711bd887a9dd21675c87243Tao Bao/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 159d7db594b8d1dab36b711bd887a9dd21675c87243Tao Bao unsigned int last_enqueue; 160d7db594b8d1dab36b711bd887a9dd21675c87243Tao Bao unsigned int last_dispatch; 161d7db594b8d1dab36b711bd887a9dd21675c87243Tao Bao unsigned int last_quiescent; 162d7db594b8d1dab36b711bd887a9dd21675c87243Tao Bao struct drm_tex_region texList[MGA_NR_TEX_HEAPS][MGA_NR_TEX_REGIONS + 1]; 163d7db594b8d1dab36b711bd887a9dd21675c87243Tao Bao/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 164d7db594b8d1dab36b711bd887a9dd21675c87243Tao Bao unsigned int texAge[MGA_NR_TEX_HEAPS]; 165d7db594b8d1dab36b711bd887a9dd21675c87243Tao Bao int ctxOwner; 166655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng} drm_mga_sarea_t; 167655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define DRM_MGA_INIT 0x00 168655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 169655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define DRM_MGA_FLUSH 0x01 170655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define DRM_MGA_RESET 0x02 171655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define DRM_MGA_SWAP 0x03 172655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define DRM_MGA_CLEAR 0x04 173655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 174655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define DRM_MGA_VERTEX 0x05 175655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define DRM_MGA_INDICES 0x06 176655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define DRM_MGA_ILOAD 0x07 177655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define DRM_MGA_BLIT 0x08 178655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 179655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define DRM_MGA_GETPARAM 0x09 180655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define DRM_MGA_SET_FENCE 0x0a 181655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define DRM_MGA_WAIT_FENCE 0x0b 182655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define DRM_MGA_DMA_BOOTSTRAP 0x0c 183655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 184d7db594b8d1dab36b711bd887a9dd21675c87243Tao Bao#define DRM_IOCTL_MGA_INIT DRM_IOW(DRM_COMMAND_BASE + DRM_MGA_INIT, drm_mga_init_t) 185d7db594b8d1dab36b711bd887a9dd21675c87243Tao Bao#define DRM_IOCTL_MGA_FLUSH DRM_IOW(DRM_COMMAND_BASE + DRM_MGA_FLUSH, struct drm_lock) 186d7db594b8d1dab36b711bd887a9dd21675c87243Tao Bao#define DRM_IOCTL_MGA_RESET DRM_IO(DRM_COMMAND_BASE + DRM_MGA_RESET) 187d7db594b8d1dab36b711bd887a9dd21675c87243Tao Bao#define DRM_IOCTL_MGA_SWAP DRM_IO(DRM_COMMAND_BASE + DRM_MGA_SWAP) 188655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 189d7db594b8d1dab36b711bd887a9dd21675c87243Tao Bao#define DRM_IOCTL_MGA_CLEAR DRM_IOW(DRM_COMMAND_BASE + DRM_MGA_CLEAR, drm_mga_clear_t) 190d7db594b8d1dab36b711bd887a9dd21675c87243Tao Bao#define DRM_IOCTL_MGA_VERTEX DRM_IOW(DRM_COMMAND_BASE + DRM_MGA_VERTEX, drm_mga_vertex_t) 191d7db594b8d1dab36b711bd887a9dd21675c87243Tao Bao#define DRM_IOCTL_MGA_INDICES DRM_IOW(DRM_COMMAND_BASE + DRM_MGA_INDICES, drm_mga_indices_t) 192d7db594b8d1dab36b711bd887a9dd21675c87243Tao Bao#define DRM_IOCTL_MGA_ILOAD DRM_IOW(DRM_COMMAND_BASE + DRM_MGA_ILOAD, drm_mga_iload_t) 193655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 194d7db594b8d1dab36b711bd887a9dd21675c87243Tao Bao#define DRM_IOCTL_MGA_BLIT DRM_IOW(DRM_COMMAND_BASE + DRM_MGA_BLIT, drm_mga_blit_t) 195655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define DRM_IOCTL_MGA_GETPARAM DRM_IOWR(DRM_COMMAND_BASE + DRM_MGA_GETPARAM, drm_mga_getparam_t) 196d7db594b8d1dab36b711bd887a9dd21675c87243Tao Bao#define DRM_IOCTL_MGA_SET_FENCE DRM_IOW(DRM_COMMAND_BASE + DRM_MGA_SET_FENCE, __u32) 197655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define DRM_IOCTL_MGA_WAIT_FENCE DRM_IOWR(DRM_COMMAND_BASE + DRM_MGA_WAIT_FENCE, __u32) 198655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 199655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define DRM_IOCTL_MGA_DMA_BOOTSTRAP DRM_IOWR(DRM_COMMAND_BASE + DRM_MGA_DMA_BOOTSTRAP, drm_mga_dma_bootstrap_t) 200655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Chengtypedef struct _drm_mga_warp_index { 201d7db594b8d1dab36b711bd887a9dd21675c87243Tao Bao int installed; 202d7db594b8d1dab36b711bd887a9dd21675c87243Tao Bao unsigned long phys_addr; 203655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 204d7db594b8d1dab36b711bd887a9dd21675c87243Tao Bao int size; 205655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng} drm_mga_warp_index_t; 206655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Chengtypedef struct drm_mga_init { 207d7db594b8d1dab36b711bd887a9dd21675c87243Tao Bao enum { 208655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 209d7db594b8d1dab36b711bd887a9dd21675c87243Tao Bao MGA_INIT_DMA = 0x01, 210d7db594b8d1dab36b711bd887a9dd21675c87243Tao Bao MGA_CLEANUP_DMA = 0x02 211d7db594b8d1dab36b711bd887a9dd21675c87243Tao Bao } func; 212d7db594b8d1dab36b711bd887a9dd21675c87243Tao Bao unsigned long sarea_priv_offset; 213655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 214d7db594b8d1dab36b711bd887a9dd21675c87243Tao Bao int chipset; 215d7db594b8d1dab36b711bd887a9dd21675c87243Tao Bao int sgram; 216d7db594b8d1dab36b711bd887a9dd21675c87243Tao Bao unsigned int maccess; 217d7db594b8d1dab36b711bd887a9dd21675c87243Tao Bao unsigned int fb_cpp; 218655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 219d7db594b8d1dab36b711bd887a9dd21675c87243Tao Bao unsigned int front_offset, front_pitch; 220d7db594b8d1dab36b711bd887a9dd21675c87243Tao Bao unsigned int back_offset, back_pitch; 221d7db594b8d1dab36b711bd887a9dd21675c87243Tao Bao unsigned int depth_cpp; 222d7db594b8d1dab36b711bd887a9dd21675c87243Tao Bao unsigned int depth_offset, depth_pitch; 223655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 224d7db594b8d1dab36b711bd887a9dd21675c87243Tao Bao unsigned int texture_offset[MGA_NR_TEX_HEAPS]; 225d7db594b8d1dab36b711bd887a9dd21675c87243Tao Bao unsigned int texture_size[MGA_NR_TEX_HEAPS]; 226d7db594b8d1dab36b711bd887a9dd21675c87243Tao Bao unsigned long fb_offset; 227d7db594b8d1dab36b711bd887a9dd21675c87243Tao Bao unsigned long mmio_offset; 228655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 229d7db594b8d1dab36b711bd887a9dd21675c87243Tao Bao unsigned long status_offset; 230d7db594b8d1dab36b711bd887a9dd21675c87243Tao Bao unsigned long warp_offset; 231d7db594b8d1dab36b711bd887a9dd21675c87243Tao Bao unsigned long primary_offset; 232d7db594b8d1dab36b711bd887a9dd21675c87243Tao Bao unsigned long buffers_offset; 233655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 234655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng} drm_mga_init_t; 235655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Chengtypedef struct drm_mga_dma_bootstrap { 236d7db594b8d1dab36b711bd887a9dd21675c87243Tao Bao unsigned long texture_handle; 237d7db594b8d1dab36b711bd887a9dd21675c87243Tao Bao __u32 texture_size; 238655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 239d7db594b8d1dab36b711bd887a9dd21675c87243Tao Bao __u32 primary_size; 240d7db594b8d1dab36b711bd887a9dd21675c87243Tao Bao __u32 secondary_bin_count; 241d7db594b8d1dab36b711bd887a9dd21675c87243Tao Bao __u32 secondary_bin_size; 242d7db594b8d1dab36b711bd887a9dd21675c87243Tao Bao __u32 agp_mode; 243655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 244d7db594b8d1dab36b711bd887a9dd21675c87243Tao Bao __u8 agp_size; 245655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng} drm_mga_dma_bootstrap_t; 246655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Chengtypedef struct drm_mga_clear { 247d7db594b8d1dab36b711bd887a9dd21675c87243Tao Bao unsigned int flags; 248655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 249d7db594b8d1dab36b711bd887a9dd21675c87243Tao Bao unsigned int clear_color; 250d7db594b8d1dab36b711bd887a9dd21675c87243Tao Bao unsigned int clear_depth; 251d7db594b8d1dab36b711bd887a9dd21675c87243Tao Bao unsigned int color_mask; 252d7db594b8d1dab36b711bd887a9dd21675c87243Tao Bao unsigned int depth_mask; 253655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 254655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng} drm_mga_clear_t; 255655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Chengtypedef struct drm_mga_vertex { 256d7db594b8d1dab36b711bd887a9dd21675c87243Tao Bao int idx; 257d7db594b8d1dab36b711bd887a9dd21675c87243Tao Bao int used; 258655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 259d7db594b8d1dab36b711bd887a9dd21675c87243Tao Bao int discard; 260655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng} drm_mga_vertex_t; 261655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Chengtypedef struct drm_mga_indices { 262d7db594b8d1dab36b711bd887a9dd21675c87243Tao Bao int idx; 263655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 264d7db594b8d1dab36b711bd887a9dd21675c87243Tao Bao unsigned int start; 265d7db594b8d1dab36b711bd887a9dd21675c87243Tao Bao unsigned int end; 266d7db594b8d1dab36b711bd887a9dd21675c87243Tao Bao int discard; 267655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng} drm_mga_indices_t; 268655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 269655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Chengtypedef struct drm_mga_iload { 270d7db594b8d1dab36b711bd887a9dd21675c87243Tao Bao int idx; 271d7db594b8d1dab36b711bd887a9dd21675c87243Tao Bao unsigned int dstorg; 272d7db594b8d1dab36b711bd887a9dd21675c87243Tao Bao unsigned int length; 273655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 274655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng} drm_mga_iload_t; 275655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Chengtypedef struct _drm_mga_blit { 276d7db594b8d1dab36b711bd887a9dd21675c87243Tao Bao unsigned int planemask; 277d7db594b8d1dab36b711bd887a9dd21675c87243Tao Bao unsigned int srcorg; 278655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 279d7db594b8d1dab36b711bd887a9dd21675c87243Tao Bao unsigned int dstorg; 280d7db594b8d1dab36b711bd887a9dd21675c87243Tao Bao int src_pitch, dst_pitch; 281d7db594b8d1dab36b711bd887a9dd21675c87243Tao Bao int delta_sx, delta_sy; 282d7db594b8d1dab36b711bd887a9dd21675c87243Tao Bao int delta_dx, delta_dy; 283655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 284d7db594b8d1dab36b711bd887a9dd21675c87243Tao Bao int height, ydir; 285d7db594b8d1dab36b711bd887a9dd21675c87243Tao Bao int source_pitch, dest_pitch; 286655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng} drm_mga_blit_t; 287655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define MGA_PARAM_IRQ_NR 1 288655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 289655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define MGA_PARAM_CARD_TYPE 2 290655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Chengtypedef struct drm_mga_getparam { 291d7db594b8d1dab36b711bd887a9dd21675c87243Tao Bao int param; 292d7db594b8d1dab36b711bd887a9dd21675c87243Tao Bao void __user * value; 293655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 294655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng} drm_mga_getparam_t; 295655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#endif 296