MachineInstr.cpp revision 76d7e76c15c258ec4a71fd75a2a32bca3a5e5e27
1//===-- MachineInstr.cpp --------------------------------------------------===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file was developed by the LLVM research group and is distributed under 6// the University of Illinois Open Source License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// Methods common to all machine instructions. 11// 12//===----------------------------------------------------------------------===// 13 14#include "llvm/CodeGen/MachineInstr.h" 15#include "llvm/CodeGen/MachineFunction.h" 16#include "llvm/Target/TargetMachine.h" 17#include "llvm/Target/TargetInstrInfo.h" 18#include "llvm/Target/MRegisterInfo.h" 19#include "llvm/Support/LeakDetector.h" 20#include "llvm/Support/Streams.h" 21#include <ostream> 22using namespace llvm; 23 24/// MachineInstr ctor - This constructor creates a dummy MachineInstr with 25/// TID NULL and no operands. 26MachineInstr::MachineInstr() 27 : TID(0), NumImplicitOps(0), parent(0) { 28 // Make sure that we get added to a machine basicblock 29 LeakDetector::addGarbageObject(this); 30} 31 32void MachineInstr::addImplicitDefUseOperands() { 33 if (TID->ImplicitDefs) 34 for (const unsigned *ImpDefs = TID->ImplicitDefs; *ImpDefs; ++ImpDefs) { 35 MachineOperand Op; 36 Op.opType = MachineOperand::MO_Register; 37 Op.IsDef = true; 38 Op.IsImp = true; 39 Op.IsKill = false; 40 Op.IsDead = false; 41 Op.contents.RegNo = *ImpDefs; 42 Op.offset = 0; 43 Operands.push_back(Op); 44 } 45 if (TID->ImplicitUses) 46 for (const unsigned *ImpUses = TID->ImplicitUses; *ImpUses; ++ImpUses) { 47 MachineOperand Op; 48 Op.opType = MachineOperand::MO_Register; 49 Op.IsDef = false; 50 Op.IsImp = true; 51 Op.IsKill = false; 52 Op.IsDead = false; 53 Op.contents.RegNo = *ImpUses; 54 Op.offset = 0; 55 Operands.push_back(Op); 56 } 57} 58 59/// MachineInstr ctor - This constructor create a MachineInstr and add the 60/// implicit operands. It reserves space for number of operands specified by 61/// TargetInstrDescriptor or the numOperands if it is not zero. (for 62/// instructions with variable number of operands). 63MachineInstr::MachineInstr(const TargetInstrDescriptor &tid) 64 : TID(&tid), NumImplicitOps(0), parent(0) { 65 if (TID->ImplicitDefs) 66 for (const unsigned *ImpDefs = TID->ImplicitDefs; *ImpDefs; ++ImpDefs) 67 NumImplicitOps++; 68 if (TID->ImplicitUses) 69 for (const unsigned *ImpUses = TID->ImplicitUses; *ImpUses; ++ImpUses) 70 NumImplicitOps++; 71 Operands.reserve(NumImplicitOps + TID->numOperands); 72 addImplicitDefUseOperands(); 73 // Make sure that we get added to a machine basicblock 74 LeakDetector::addGarbageObject(this); 75} 76 77/// MachineInstr ctor - Work exactly the same as the ctor above, except that the 78/// MachineInstr is created and added to the end of the specified basic block. 79/// 80MachineInstr::MachineInstr(MachineBasicBlock *MBB, 81 const TargetInstrDescriptor &tid) 82 : TID(&tid), NumImplicitOps(0), parent(0) { 83 assert(MBB && "Cannot use inserting ctor with null basic block!"); 84 if (TID->ImplicitDefs) 85 for (const unsigned *ImpDefs = TID->ImplicitDefs; *ImpDefs; ++ImpDefs) 86 NumImplicitOps++; 87 if (TID->ImplicitUses) 88 for (const unsigned *ImpUses = TID->ImplicitUses; *ImpUses; ++ImpUses) 89 NumImplicitOps++; 90 Operands.reserve(NumImplicitOps + TID->numOperands); 91 addImplicitDefUseOperands(); 92 // Make sure that we get added to a machine basicblock 93 LeakDetector::addGarbageObject(this); 94 MBB->push_back(this); // Add instruction to end of basic block! 95} 96 97/// MachineInstr ctor - Copies MachineInstr arg exactly 98/// 99MachineInstr::MachineInstr(const MachineInstr &MI) { 100 TID = MI.getInstrDescriptor(); 101 NumImplicitOps = MI.NumImplicitOps; 102 Operands.reserve(MI.getNumOperands()); 103 104 // Add operands 105 for (unsigned i = 0; i != MI.getNumOperands(); ++i) 106 Operands.push_back(MI.getOperand(i)); 107 108 // Set parent, next, and prev to null 109 parent = 0; 110 prev = 0; 111 next = 0; 112} 113 114 115MachineInstr::~MachineInstr() { 116 LeakDetector::removeGarbageObject(this); 117} 118 119/// getOpcode - Returns the opcode of this MachineInstr. 120/// 121const int MachineInstr::getOpcode() const { 122 return TID->Opcode; 123} 124 125/// removeFromParent - This method unlinks 'this' from the containing basic 126/// block, and returns it, but does not delete it. 127MachineInstr *MachineInstr::removeFromParent() { 128 assert(getParent() && "Not embedded in a basic block!"); 129 getParent()->remove(this); 130 return this; 131} 132 133 134/// OperandComplete - Return true if it's illegal to add a new operand 135/// 136bool MachineInstr::OperandsComplete() const { 137 unsigned short NumOperands = TID->numOperands; 138 if ((TID->Flags & M_VARIABLE_OPS) == 0 && 139 getNumOperands()-NumImplicitOps >= NumOperands) 140 return true; // Broken: we have all the operands of this instruction! 141 return false; 142} 143 144/// isIdenticalTo - Return true if this operand is identical to the specified 145/// operand. 146bool MachineOperand::isIdenticalTo(const MachineOperand &Other) const { 147 if (getType() != Other.getType()) return false; 148 149 switch (getType()) { 150 default: assert(0 && "Unrecognized operand type"); 151 case MachineOperand::MO_Register: 152 return getReg() == Other.getReg() && isDef() == Other.isDef(); 153 case MachineOperand::MO_Immediate: 154 return getImm() == Other.getImm(); 155 case MachineOperand::MO_MachineBasicBlock: 156 return getMBB() == Other.getMBB(); 157 case MachineOperand::MO_FrameIndex: 158 return getFrameIndex() == Other.getFrameIndex(); 159 case MachineOperand::MO_ConstantPoolIndex: 160 return getConstantPoolIndex() == Other.getConstantPoolIndex() && 161 getOffset() == Other.getOffset(); 162 case MachineOperand::MO_JumpTableIndex: 163 return getJumpTableIndex() == Other.getJumpTableIndex(); 164 case MachineOperand::MO_GlobalAddress: 165 return getGlobal() == Other.getGlobal() && getOffset() == Other.getOffset(); 166 case MachineOperand::MO_ExternalSymbol: 167 return !strcmp(getSymbolName(), Other.getSymbolName()) && 168 getOffset() == Other.getOffset(); 169 } 170} 171 172/// findRegisterUseOperand() - Returns the MachineOperand that is a use of 173/// the specific register or NULL if it is not found. It further tightening 174/// the search criteria to a use that kills the register if isKill is true. 175MachineOperand *MachineInstr::findRegisterUseOperand(unsigned Reg, bool isKill){ 176 for (unsigned i = 0, e = getNumOperands(); i != e; ++i) { 177 MachineOperand &MO = getOperand(i); 178 if (MO.isReg() && MO.isUse() && MO.getReg() == Reg) 179 if (!isKill || MO.isKill()) 180 return &MO; 181 } 182 return NULL; 183} 184 185/// findRegisterDefOperand() - Returns the MachineOperand that is a def of 186/// the specific register or NULL if it is not found. 187MachineOperand *MachineInstr::findRegisterDefOperand(unsigned Reg) { 188 for (unsigned i = 0, e = getNumOperands(); i != e; ++i) { 189 MachineOperand &MO = getOperand(i); 190 if (MO.isReg() && MO.isDef() && MO.getReg() == Reg) 191 return &MO; 192 } 193 return NULL; 194} 195 196/// copyKillDeadInfo - Copies kill / dead operand properties from MI. 197/// 198void MachineInstr::copyKillDeadInfo(const MachineInstr *MI) { 199 for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) { 200 const MachineOperand &MO = MI->getOperand(i); 201 if (!MO.isReg() || (!MO.isKill() && !MO.isDead())) 202 continue; 203 for (unsigned j = 0, ee = getNumOperands(); j != ee; ++j) { 204 MachineOperand &MOp = getOperand(j); 205 if (!MOp.isIdenticalTo(MO)) 206 continue; 207 if (MO.isKill()) 208 MOp.setIsKill(); 209 else 210 MOp.setIsDead(); 211 break; 212 } 213 } 214} 215 216void MachineInstr::dump() const { 217 cerr << " " << *this; 218} 219 220static inline void OutputReg(std::ostream &os, unsigned RegNo, 221 const MRegisterInfo *MRI = 0) { 222 if (!RegNo || MRegisterInfo::isPhysicalRegister(RegNo)) { 223 if (MRI) 224 os << "%" << MRI->get(RegNo).Name; 225 else 226 os << "%mreg(" << RegNo << ")"; 227 } else 228 os << "%reg" << RegNo; 229} 230 231static void print(const MachineOperand &MO, std::ostream &OS, 232 const TargetMachine *TM) { 233 const MRegisterInfo *MRI = 0; 234 235 if (TM) MRI = TM->getRegisterInfo(); 236 237 switch (MO.getType()) { 238 case MachineOperand::MO_Register: 239 OutputReg(OS, MO.getReg(), MRI); 240 break; 241 case MachineOperand::MO_Immediate: 242 OS << MO.getImmedValue(); 243 break; 244 case MachineOperand::MO_MachineBasicBlock: 245 OS << "mbb<" 246 << ((Value*)MO.getMachineBasicBlock()->getBasicBlock())->getName() 247 << "," << (void*)MO.getMachineBasicBlock() << ">"; 248 break; 249 case MachineOperand::MO_FrameIndex: 250 OS << "<fi#" << MO.getFrameIndex() << ">"; 251 break; 252 case MachineOperand::MO_ConstantPoolIndex: 253 OS << "<cp#" << MO.getConstantPoolIndex() << ">"; 254 break; 255 case MachineOperand::MO_JumpTableIndex: 256 OS << "<jt#" << MO.getJumpTableIndex() << ">"; 257 break; 258 case MachineOperand::MO_GlobalAddress: 259 OS << "<ga:" << ((Value*)MO.getGlobal())->getName(); 260 if (MO.getOffset()) OS << "+" << MO.getOffset(); 261 OS << ">"; 262 break; 263 case MachineOperand::MO_ExternalSymbol: 264 OS << "<es:" << MO.getSymbolName(); 265 if (MO.getOffset()) OS << "+" << MO.getOffset(); 266 OS << ">"; 267 break; 268 default: 269 assert(0 && "Unrecognized operand type"); 270 } 271} 272 273void MachineInstr::print(std::ostream &OS, const TargetMachine *TM) const { 274 unsigned StartOp = 0; 275 276 // Specialize printing if op#0 is definition 277 if (getNumOperands() && getOperand(0).isReg() && getOperand(0).isDef()) { 278 ::print(getOperand(0), OS, TM); 279 if (getOperand(0).isDead()) 280 OS << "<dead>"; 281 OS << " = "; 282 ++StartOp; // Don't print this operand again! 283 } 284 285 if (TID) 286 OS << TID->Name; 287 288 for (unsigned i = StartOp, e = getNumOperands(); i != e; ++i) { 289 const MachineOperand& mop = getOperand(i); 290 if (i != StartOp) 291 OS << ","; 292 OS << " "; 293 ::print(mop, OS, TM); 294 295 if (mop.isReg()) { 296 if (mop.isDef() || mop.isKill() || mop.isDead() || mop.isImplicit()) { 297 OS << "<"; 298 bool NeedComma = false; 299 if (mop.isImplicit()) { 300 OS << (mop.isDef() ? "imp-def" : "imp-use"); 301 NeedComma = true; 302 } else if (mop.isDef()) { 303 OS << "def"; 304 NeedComma = true; 305 } 306 if (mop.isKill() || mop.isDead()) { 307 if (NeedComma) 308 OS << ","; 309 if (mop.isKill()) 310 OS << "kill"; 311 if (mop.isDead()) 312 OS << "dead"; 313 } 314 OS << ">"; 315 } 316 } 317 } 318 319 OS << "\n"; 320} 321 322void MachineInstr::print(std::ostream &os) const { 323 // If the instruction is embedded into a basic block, we can find the target 324 // info for the instruction. 325 if (const MachineBasicBlock *MBB = getParent()) { 326 const MachineFunction *MF = MBB->getParent(); 327 if (MF) 328 print(os, &MF->getTarget()); 329 else 330 print(os, 0); 331 } 332 333 // Otherwise, print it out in the "raw" format without symbolic register names 334 // and such. 335 os << getInstrDescriptor()->Name; 336 337 for (unsigned i = 0, N = getNumOperands(); i < N; i++) { 338 os << "\t" << getOperand(i); 339 if (getOperand(i).isReg() && getOperand(i).isDef()) 340 os << "<d>"; 341 } 342 343 os << "\n"; 344} 345 346void MachineOperand::print(std::ostream &OS) const { 347 switch (getType()) { 348 case MO_Register: 349 OutputReg(OS, getReg()); 350 break; 351 case MO_Immediate: 352 OS << (long)getImmedValue(); 353 break; 354 case MO_MachineBasicBlock: 355 OS << "<mbb:" 356 << ((Value*)getMachineBasicBlock()->getBasicBlock())->getName() 357 << "@" << (void*)getMachineBasicBlock() << ">"; 358 break; 359 case MO_FrameIndex: 360 OS << "<fi#" << getFrameIndex() << ">"; 361 break; 362 case MO_ConstantPoolIndex: 363 OS << "<cp#" << getConstantPoolIndex() << ">"; 364 break; 365 case MO_JumpTableIndex: 366 OS << "<jt#" << getJumpTableIndex() << ">"; 367 break; 368 case MO_GlobalAddress: 369 OS << "<ga:" << ((Value*)getGlobal())->getName() << ">"; 370 break; 371 case MO_ExternalSymbol: 372 OS << "<es:" << getSymbolName() << ">"; 373 break; 374 default: 375 assert(0 && "Unrecognized operand type"); 376 break; 377 } 378} 379 380