MachineInstr.cpp revision 8aa797aa51cd4ea1ec6f46f4891a6897944b75b2 
1//===-- MachineInstr.cpp --------------------------------------------------===//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// Methods common to all machine instructions.
11//
12//===----------------------------------------------------------------------===//
13
14#include "llvm/CodeGen/MachineInstr.h"
15#include "llvm/CodeGen/MachineFunction.h"
16#include "llvm/Target/TargetMachine.h"
17#include "llvm/Target/TargetInstrInfo.h"
18#include "llvm/Target/MRegisterInfo.h"
19#include "llvm/Support/LeakDetector.h"
20#include "llvm/Support/Streams.h"
21#include <ostream>
22using namespace llvm;
23
24//===----------------------------------------------------------------------===//
25// MachineOperand Implementation
26//===----------------------------------------------------------------------===//
27
28/// isIdenticalTo - Return true if this operand is identical to the specified
29/// operand.
30bool MachineOperand::isIdenticalTo(const MachineOperand &Other) const {
31  if (getType() != Other.getType()) return false;
32
33  switch (getType()) {
34  default: assert(0 && "Unrecognized operand type");
35  case MachineOperand::MO_Register:
36    return getReg() == Other.getReg() && isDef() == Other.isDef() &&
37           getSubReg() == Other.getSubReg();
38  case MachineOperand::MO_Immediate:
39    return getImm() == Other.getImm();
40  case MachineOperand::MO_MachineBasicBlock:
41    return getMBB() == Other.getMBB();
42  case MachineOperand::MO_FrameIndex:
43    return getIndex() == Other.getIndex();
44  case MachineOperand::MO_ConstantPoolIndex:
45    return getIndex() == Other.getIndex() && getOffset() == Other.getOffset();
46  case MachineOperand::MO_JumpTableIndex:
47    return getIndex() == Other.getIndex();
48  case MachineOperand::MO_GlobalAddress:
49    return getGlobal() == Other.getGlobal() && getOffset() == Other.getOffset();
50  case MachineOperand::MO_ExternalSymbol:
51    return !strcmp(getSymbolName(), Other.getSymbolName()) &&
52           getOffset() == Other.getOffset();
53  }
54}
55
56/// print - Print the specified machine operand.
57///
58void MachineOperand::print(std::ostream &OS, const TargetMachine *TM) const {
59  switch (getType()) {
60  case MachineOperand::MO_Register:
61    if (getReg() == 0 || MRegisterInfo::isVirtualRegister(getReg())) {
62      OS << "%reg" << getReg();
63    } else {
64      // If the instruction is embedded into a basic block, we can find the
65      // target
66      // info for the instruction.
67      if (TM == 0)
68        if (const MachineInstr *MI = getParent())
69          if (const MachineBasicBlock *MBB = MI->getParent())
70            if (const MachineFunction *MF = MBB->getParent())
71              TM = &MF->getTarget();
72
73      if (TM)
74        OS << "%" << TM->getRegisterInfo()->get(getReg()).Name;
75      else
76        OS << "%mreg" << getReg();
77    }
78
79    if (isDef() || isKill() || isDead() || isImplicit()) {
80      OS << "<";
81      bool NeedComma = false;
82      if (isImplicit()) {
83        OS << (isDef() ? "imp-def" : "imp-use");
84        NeedComma = true;
85      } else if (isDef()) {
86        OS << "def";
87        NeedComma = true;
88      }
89      if (isKill() || isDead()) {
90        if (NeedComma)    OS << ",";
91        if (isKill()) OS << "kill";
92        if (isDead()) OS << "dead";
93      }
94      OS << ">";
95    }
96    break;
97  case MachineOperand::MO_Immediate:
98    OS << getImm();
99    break;
100  case MachineOperand::MO_MachineBasicBlock:
101    OS << "mbb<"
102       << ((Value*)getMBB()->getBasicBlock())->getName()
103       << "," << (void*)getMBB() << ">";
104    break;
105  case MachineOperand::MO_FrameIndex:
106    OS << "<fi#" << getIndex() << ">";
107    break;
108  case MachineOperand::MO_ConstantPoolIndex:
109    OS << "<cp#" << getIndex();
110    if (getOffset()) OS << "+" << getOffset();
111    OS << ">";
112    break;
113  case MachineOperand::MO_JumpTableIndex:
114    OS << "<jt#" << getIndex() << ">";
115    break;
116  case MachineOperand::MO_GlobalAddress:
117    OS << "<ga:" << ((Value*)getGlobal())->getName();
118    if (getOffset()) OS << "+" << getOffset();
119    OS << ">";
120    break;
121  case MachineOperand::MO_ExternalSymbol:
122    OS << "<es:" << getSymbolName();
123    if (getOffset()) OS << "+" << getOffset();
124    OS << ">";
125    break;
126  default:
127    assert(0 && "Unrecognized operand type");
128  }
129}
130
131//===----------------------------------------------------------------------===//
132// MachineInstr Implementation
133//===----------------------------------------------------------------------===//
134
135/// MachineInstr ctor - This constructor creates a dummy MachineInstr with
136/// TID NULL and no operands.
137MachineInstr::MachineInstr()
138  : TID(0), NumImplicitOps(0), parent(0) {
139  // Make sure that we get added to a machine basicblock
140  LeakDetector::addGarbageObject(this);
141}
142
143void MachineInstr::addImplicitDefUseOperands() {
144  if (TID->ImplicitDefs)
145    for (const unsigned *ImpDefs = TID->ImplicitDefs; *ImpDefs; ++ImpDefs)
146      addOperand(MachineOperand::CreateReg(*ImpDefs, true, true));
147  if (TID->ImplicitUses)
148    for (const unsigned *ImpUses = TID->ImplicitUses; *ImpUses; ++ImpUses)
149      addOperand(MachineOperand::CreateReg(*ImpUses, false, true));
150}
151
152/// MachineInstr ctor - This constructor create a MachineInstr and add the
153/// implicit operands. It reserves space for number of operands specified by
154/// TargetInstrDescriptor or the numOperands if it is not zero. (for
155/// instructions with variable number of operands).
156MachineInstr::MachineInstr(const TargetInstrDescriptor &tid, bool NoImp)
157  : TID(&tid), NumImplicitOps(0), parent(0) {
158  if (!NoImp && TID->ImplicitDefs)
159    for (const unsigned *ImpDefs = TID->ImplicitDefs; *ImpDefs; ++ImpDefs)
160      NumImplicitOps++;
161  if (!NoImp && TID->ImplicitUses)
162    for (const unsigned *ImpUses = TID->ImplicitUses; *ImpUses; ++ImpUses)
163      NumImplicitOps++;
164  Operands.reserve(NumImplicitOps + TID->numOperands);
165  if (!NoImp)
166    addImplicitDefUseOperands();
167  // Make sure that we get added to a machine basicblock
168  LeakDetector::addGarbageObject(this);
169}
170
171/// MachineInstr ctor - Work exactly the same as the ctor above, except that the
172/// MachineInstr is created and added to the end of the specified basic block.
173///
174MachineInstr::MachineInstr(MachineBasicBlock *MBB,
175                           const TargetInstrDescriptor &tid)
176  : TID(&tid), NumImplicitOps(0), parent(0) {
177  assert(MBB && "Cannot use inserting ctor with null basic block!");
178  if (TID->ImplicitDefs)
179    for (const unsigned *ImpDefs = TID->ImplicitDefs; *ImpDefs; ++ImpDefs)
180      NumImplicitOps++;
181  if (TID->ImplicitUses)
182    for (const unsigned *ImpUses = TID->ImplicitUses; *ImpUses; ++ImpUses)
183      NumImplicitOps++;
184  Operands.reserve(NumImplicitOps + TID->numOperands);
185  addImplicitDefUseOperands();
186  // Make sure that we get added to a machine basicblock
187  LeakDetector::addGarbageObject(this);
188  MBB->push_back(this);  // Add instruction to end of basic block!
189}
190
191/// MachineInstr ctor - Copies MachineInstr arg exactly
192///
193MachineInstr::MachineInstr(const MachineInstr &MI) {
194  TID = MI.getInstrDescriptor();
195  NumImplicitOps = MI.NumImplicitOps;
196  Operands.reserve(MI.getNumOperands());
197
198  // Add operands
199  for (unsigned i = 0; i != MI.getNumOperands(); ++i) {
200    Operands.push_back(MI.getOperand(i));
201    Operands.back().ParentMI = this;
202  }
203
204  // Set parent, next, and prev to null
205  parent = 0;
206  prev = 0;
207  next = 0;
208}
209
210
211MachineInstr::~MachineInstr() {
212  LeakDetector::removeGarbageObject(this);
213#ifndef NDEBUG
214  for (unsigned i = 0, e = Operands.size(); i != e; ++i)
215    assert(Operands[i].ParentMI == this && "ParentMI mismatch!");
216#endif
217}
218
219/// getOpcode - Returns the opcode of this MachineInstr.
220///
221int MachineInstr::getOpcode() const {
222  return TID->Opcode;
223}
224
225/// removeFromParent - This method unlinks 'this' from the containing basic
226/// block, and returns it, but does not delete it.
227MachineInstr *MachineInstr::removeFromParent() {
228  assert(getParent() && "Not embedded in a basic block!");
229  getParent()->remove(this);
230  return this;
231}
232
233
234/// OperandComplete - Return true if it's illegal to add a new operand
235///
236bool MachineInstr::OperandsComplete() const {
237  unsigned short NumOperands = TID->numOperands;
238  if ((TID->Flags & M_VARIABLE_OPS) == 0 &&
239      getNumOperands()-NumImplicitOps >= NumOperands)
240    return true;  // Broken: we have all the operands of this instruction!
241  return false;
242}
243
244/// getNumExplicitOperands - Returns the number of non-implicit operands.
245///
246unsigned MachineInstr::getNumExplicitOperands() const {
247  unsigned NumOperands = TID->numOperands;
248  if ((TID->Flags & M_VARIABLE_OPS) == 0)
249    return NumOperands;
250
251  for (unsigned e = getNumOperands(); NumOperands != e; ++NumOperands) {
252    const MachineOperand &MO = getOperand(NumOperands);
253    if (!MO.isRegister() || !MO.isImplicit())
254      NumOperands++;
255  }
256  return NumOperands;
257}
258
259
260/// findRegisterUseOperandIdx() - Returns the MachineOperand that is a use of
261/// the specific register or -1 if it is not found. It further tightening
262/// the search criteria to a use that kills the register if isKill is true.
263int MachineInstr::findRegisterUseOperandIdx(unsigned Reg, bool isKill) const {
264  for (unsigned i = 0, e = getNumOperands(); i != e; ++i) {
265    const MachineOperand &MO = getOperand(i);
266    if (MO.isRegister() && MO.isUse() && MO.getReg() == Reg)
267      if (!isKill || MO.isKill())
268        return i;
269  }
270  return -1;
271}
272
273/// findRegisterDefOperand() - Returns the MachineOperand that is a def of
274/// the specific register or NULL if it is not found.
275MachineOperand *MachineInstr::findRegisterDefOperand(unsigned Reg) {
276  for (unsigned i = 0, e = getNumOperands(); i != e; ++i) {
277    MachineOperand &MO = getOperand(i);
278    if (MO.isRegister() && MO.isDef() && MO.getReg() == Reg)
279      return &MO;
280  }
281  return NULL;
282}
283
284/// findFirstPredOperandIdx() - Find the index of the first operand in the
285/// operand list that is used to represent the predicate. It returns -1 if
286/// none is found.
287int MachineInstr::findFirstPredOperandIdx() const {
288  const TargetInstrDescriptor *TID = getInstrDescriptor();
289  if (TID->Flags & M_PREDICABLE) {
290    for (unsigned i = 0, e = getNumOperands(); i != e; ++i)
291      if ((TID->OpInfo[i].Flags & M_PREDICATE_OPERAND))
292        return i;
293  }
294
295  return -1;
296}
297
298/// isRegReDefinedByTwoAddr - Returns true if the Reg re-definition is due
299/// to two addr elimination.
300bool MachineInstr::isRegReDefinedByTwoAddr(unsigned Reg) const {
301  const TargetInstrDescriptor *TID = getInstrDescriptor();
302  for (unsigned i = 0, e = getNumOperands(); i != e; ++i) {
303    const MachineOperand &MO1 = getOperand(i);
304    if (MO1.isRegister() && MO1.isDef() && MO1.getReg() == Reg) {
305      for (unsigned j = i+1; j < e; ++j) {
306        const MachineOperand &MO2 = getOperand(j);
307        if (MO2.isRegister() && MO2.isUse() && MO2.getReg() == Reg &&
308            TID->getOperandConstraint(j, TOI::TIED_TO) == (int)i)
309          return true;
310      }
311    }
312  }
313  return false;
314}
315
316/// copyKillDeadInfo - Copies kill / dead operand properties from MI.
317///
318void MachineInstr::copyKillDeadInfo(const MachineInstr *MI) {
319  for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
320    const MachineOperand &MO = MI->getOperand(i);
321    if (!MO.isRegister() || (!MO.isKill() && !MO.isDead()))
322      continue;
323    for (unsigned j = 0, ee = getNumOperands(); j != ee; ++j) {
324      MachineOperand &MOp = getOperand(j);
325      if (!MOp.isIdenticalTo(MO))
326        continue;
327      if (MO.isKill())
328        MOp.setIsKill();
329      else
330        MOp.setIsDead();
331      break;
332    }
333  }
334}
335
336/// copyPredicates - Copies predicate operand(s) from MI.
337void MachineInstr::copyPredicates(const MachineInstr *MI) {
338  const TargetInstrDescriptor *TID = MI->getInstrDescriptor();
339  if (TID->Flags & M_PREDICABLE) {
340    for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
341      if ((TID->OpInfo[i].Flags & M_PREDICATE_OPERAND)) {
342        // Predicated operands must be last operands.
343        addOperand(MI->getOperand(i));
344      }
345    }
346  }
347}
348
349void MachineInstr::dump() const {
350  cerr << "  " << *this;
351}
352
353void MachineInstr::print(std::ostream &OS, const TargetMachine *TM) const {
354  // Specialize printing if op#0 is definition
355  unsigned StartOp = 0;
356  if (getNumOperands() && getOperand(0).isRegister() && getOperand(0).isDef()) {
357    getOperand(0).print(OS, TM);
358    OS << " = ";
359    ++StartOp;   // Don't print this operand again!
360  }
361
362  OS << getInstrDescriptor()->Name;
363
364  for (unsigned i = StartOp, e = getNumOperands(); i != e; ++i) {
365    if (i != StartOp)
366      OS << ",";
367    OS << " ";
368    getOperand(i).print(OS, TM);
369  }
370
371  OS << "\n";
372}
373
374