MachineInstr.cpp revision ceb408f6a263e319683209ae5c6f8d1e3e4d9b69
1//===-- MachineInstr.cpp --------------------------------------------------===//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file was developed by the LLVM research group and is distributed under
6// the University of Illinois Open Source License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// Methods common to all machine instructions.
11//
12// FIXME: Now that MachineInstrs have parent pointers, they should always
13// print themselves using their MachineFunction's TargetMachine.
14//
15//===----------------------------------------------------------------------===//
16
17#include "llvm/CodeGen/MachineInstr.h"
18#include "llvm/CodeGen/MachineFunction.h"
19#include "llvm/Value.h"
20#include "llvm/Target/TargetMachine.h"
21#include "llvm/Target/TargetInstrInfo.h"
22#include "llvm/Target/MRegisterInfo.h"
23#include "llvm/Support/LeakDetector.h"
24#include <iostream>
25
26using namespace llvm;
27
28// Global variable holding an array of descriptors for machine instructions.
29// The actual object needs to be created separately for each target machine.
30// This variable is initialized and reset by class TargetInstrInfo.
31//
32// FIXME: This should be a property of the target so that more than one target
33// at a time can be active...
34//
35namespace llvm {
36  extern const TargetInstrDescriptor *TargetInstrDescriptors;
37}
38
39/// MachineInstr ctor - This constructor only does a _reserve_ of the operands,
40/// not a resize for them.  It is expected that if you use this that you call
41/// add* methods below to fill up the operands, instead of the Set methods.
42/// Eventually, the "resizing" ctors will be phased out.
43///
44MachineInstr::MachineInstr(short opcode, unsigned numOperands, bool XX, bool YY)
45  : Opcode(opcode), parent(0) {
46  operands.reserve(numOperands);
47  // Make sure that we get added to a machine basicblock
48  LeakDetector::addGarbageObject(this);
49}
50
51/// MachineInstr ctor - Work exactly the same as the ctor above, except that the
52/// MachineInstr is created and added to the end of the specified basic block.
53///
54MachineInstr::MachineInstr(MachineBasicBlock *MBB, short opcode,
55                           unsigned numOperands)
56  : Opcode(opcode), parent(0) {
57  assert(MBB && "Cannot use inserting ctor with null basic block!");
58  operands.reserve(numOperands);
59  // Make sure that we get added to a machine basicblock
60  LeakDetector::addGarbageObject(this);
61  MBB->push_back(this);  // Add instruction to end of basic block!
62}
63
64/// MachineInstr ctor - Copies MachineInstr arg exactly
65///
66MachineInstr::MachineInstr(const MachineInstr &MI) {
67  Opcode = MI.getOpcode();
68  operands.reserve(MI.getNumOperands());
69
70  // Add operands
71  for (unsigned i = 0; i < MI.getNumOperands(); ++i)
72    operands.push_back(MachineOperand(MI.getOperand(i)));
73
74  // Set parent, next, and prev to null
75  parent = 0;
76  prev = 0;
77  next = 0;
78}
79
80
81MachineInstr::~MachineInstr() {
82  LeakDetector::removeGarbageObject(this);
83}
84
85/// clone - Create a copy of 'this' instruction that is identical in all ways
86/// except the following: the new instruction has no parent and it has no name
87///
88MachineInstr* MachineInstr::clone() const {
89  return new MachineInstr(*this);
90}
91
92/// removeFromParent - This method unlinks 'this' from the containing basic
93/// block, and returns it, but does not delete it.
94MachineInstr *MachineInstr::removeFromParent() {
95  assert(getParent() && "Not embedded in a basic block!");
96  getParent()->remove(this);
97  return this;
98}
99
100
101/// OperandComplete - Return true if it's illegal to add a new operand
102///
103bool MachineInstr::OperandsComplete() const {
104  int NumOperands = TargetInstrDescriptors[Opcode].numOperands;
105  if (NumOperands >= 0 && getNumOperands() >= (unsigned)NumOperands)
106    return true;  // Broken: we have all the operands of this instruction!
107  return false;
108}
109
110void
111MachineInstr::SetMachineOperandConst(unsigned i,
112                                     MachineOperand::MachineOperandType opTy,
113                                     int intValue) {
114  assert(i < getNumOperands());
115  operands[i].opType = opTy;
116  operands[i].contents.immedVal = intValue;
117  operands[i].extra.regNum = -1;
118  operands[i].flags = 0;
119}
120
121void MachineInstr::SetMachineOperandReg(unsigned i, int regNum) {
122  assert(i < getNumOperands());
123
124  operands[i].opType = MachineOperand::MO_VirtualRegister;
125  operands[i].contents.GV = NULL;
126  operands[i].extra.regNum = regNum;
127}
128
129void MachineInstr::dump() const {
130  std::cerr << "  " << *this;
131}
132
133static inline std::ostream& OutputValue(std::ostream &os, const Value* val) {
134  os << "(val ";
135  os << (void*) val;                // print address always
136  if (val && val->hasName())
137    os << " " << val->getName();    // print name also, if available
138  os << ")";
139  return os;
140}
141
142static inline void OutputReg(std::ostream &os, unsigned RegNo,
143                             const MRegisterInfo *MRI = 0) {
144  if (!RegNo || MRegisterInfo::isPhysicalRegister(RegNo)) {
145    if (MRI)
146      os << "%" << MRI->get(RegNo).Name;
147    else
148      os << "%mreg(" << RegNo << ")";
149  } else
150    os << "%reg" << RegNo;
151}
152
153static void print(const MachineOperand &MO, std::ostream &OS,
154                  const TargetMachine *TM) {
155  const MRegisterInfo *MRI = 0;
156
157  if (TM) MRI = TM->getRegisterInfo();
158
159  switch (MO.getType()) {
160  case MachineOperand::MO_VirtualRegister:
161    OutputReg(OS, MO.getReg(), MRI);
162    break;
163  case MachineOperand::MO_SignExtendedImmed:
164    OS << (long)MO.getImmedValue();
165    break;
166  case MachineOperand::MO_UnextendedImmed:
167    OS << (long)MO.getImmedValue();
168    break;
169  case MachineOperand::MO_MachineBasicBlock:
170    OS << "mbb<"
171       << ((Value*)MO.getMachineBasicBlock()->getBasicBlock())->getName()
172       << "," << (void*)MO.getMachineBasicBlock() << ">";
173    break;
174  case MachineOperand::MO_FrameIndex:
175    OS << "<fi#" << MO.getFrameIndex() << ">";
176    break;
177  case MachineOperand::MO_ConstantPoolIndex:
178    OS << "<cp#" << MO.getConstantPoolIndex() << ">";
179    break;
180  case MachineOperand::MO_JumpTableIndex:
181    OS << "<jt#" << MO.getJumpTableIndex() << ">";
182    break;
183  case MachineOperand::MO_GlobalAddress:
184    OS << "<ga:" << ((Value*)MO.getGlobal())->getName();
185    if (MO.getOffset()) OS << "+" << MO.getOffset();
186    OS << ">";
187    break;
188  case MachineOperand::MO_ExternalSymbol:
189    OS << "<es:" << MO.getSymbolName();
190    if (MO.getOffset()) OS << "+" << MO.getOffset();
191    OS << ">";
192    break;
193  default:
194    assert(0 && "Unrecognized operand type");
195  }
196}
197
198void MachineInstr::print(std::ostream &OS, const TargetMachine *TM) const {
199  unsigned StartOp = 0;
200
201   // Specialize printing if op#0 is definition
202  if (getNumOperands() && getOperand(0).isDef() && !getOperand(0).isUse()) {
203    ::print(getOperand(0), OS, TM);
204    OS << " = ";
205    ++StartOp;   // Don't print this operand again!
206  }
207
208  // Must check if Target machine is not null because machine BB could not
209  // be attached to a Machine function yet
210  if (TM)
211    OS << TM->getInstrInfo()->getName(getOpcode());
212
213  for (unsigned i = StartOp, e = getNumOperands(); i != e; ++i) {
214    const MachineOperand& mop = getOperand(i);
215    if (i != StartOp)
216      OS << ",";
217    OS << " ";
218    ::print(mop, OS, TM);
219
220    if (mop.isDef())
221      if (mop.isUse())
222        OS << "<def&use>";
223      else
224        OS << "<def>";
225  }
226
227  OS << "\n";
228}
229
230std::ostream &llvm::operator<<(std::ostream &os, const MachineInstr &MI) {
231  // If the instruction is embedded into a basic block, we can find the target
232  // info for the instruction.
233  if (const MachineBasicBlock *MBB = MI.getParent()) {
234    const MachineFunction *MF = MBB->getParent();
235    if (MF)
236      MI.print(os, &MF->getTarget());
237    else
238      MI.print(os, 0);
239    return os;
240  }
241
242  // Otherwise, print it out in the "raw" format without symbolic register names
243  // and such.
244  os << TargetInstrDescriptors[MI.getOpcode()].Name;
245
246  for (unsigned i = 0, N = MI.getNumOperands(); i < N; i++) {
247    os << "\t" << MI.getOperand(i);
248    if (MI.getOperand(i).isDef())
249      if (MI.getOperand(i).isUse())
250        os << "<d&u>";
251      else
252        os << "<d>";
253  }
254
255  return os << "\n";
256}
257
258std::ostream &llvm::operator<<(std::ostream &OS, const MachineOperand &MO) {
259  switch (MO.getType()) {
260  case MachineOperand::MO_VirtualRegister:
261    OutputReg(OS, MO.getReg());
262    break;
263  case MachineOperand::MO_SignExtendedImmed:
264    OS << (long)MO.getImmedValue();
265    break;
266  case MachineOperand::MO_UnextendedImmed:
267    OS << (long)MO.getImmedValue();
268    break;
269  case MachineOperand::MO_MachineBasicBlock:
270    OS << "<mbb:"
271       << ((Value*)MO.getMachineBasicBlock()->getBasicBlock())->getName()
272       << "@" << (void*)MO.getMachineBasicBlock() << ">";
273    break;
274  case MachineOperand::MO_FrameIndex:
275    OS << "<fi#" << MO.getFrameIndex() << ">";
276    break;
277  case MachineOperand::MO_ConstantPoolIndex:
278    OS << "<cp#" << MO.getConstantPoolIndex() << ">";
279    break;
280  case MachineOperand::MO_JumpTableIndex:
281    OS << "<jt#" << MO.getJumpTableIndex() << ">";
282    break;
283  case MachineOperand::MO_GlobalAddress:
284    OS << "<ga:" << ((Value*)MO.getGlobal())->getName() << ">";
285    break;
286  case MachineOperand::MO_ExternalSymbol:
287    OS << "<es:" << MO.getSymbolName() << ">";
288    break;
289  default:
290    assert(0 && "Unrecognized operand type");
291    break;
292  }
293
294  return OS;
295}
296