1//===-- PPCMCTargetDesc.h - PowerPC Target Descriptions ---------*- C++ -*-===//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// This file provides PowerPC specific target descriptions.
11//
12//===----------------------------------------------------------------------===//
13
14#ifndef LLVM_LIB_TARGET_POWERPC_MCTARGETDESC_PPCMCTARGETDESC_H
15#define LLVM_LIB_TARGET_POWERPC_MCTARGETDESC_PPCMCTARGETDESC_H
16
17// GCC #defines PPC on Linux but we use it as our namespace name
18#undef PPC
19
20#include "llvm/Support/DataTypes.h"
21#include "llvm/Support/MathExtras.h"
22
23namespace llvm {
24class MCAsmBackend;
25class MCCodeEmitter;
26class MCContext;
27class MCInstrInfo;
28class MCObjectWriter;
29class MCRegisterInfo;
30class MCSubtargetInfo;
31class Target;
32class Triple;
33class StringRef;
34class raw_pwrite_stream;
35class raw_ostream;
36
37extern Target ThePPC32Target;
38extern Target ThePPC64Target;
39extern Target ThePPC64LETarget;
40
41MCCodeEmitter *createPPCMCCodeEmitter(const MCInstrInfo &MCII,
42                                      const MCRegisterInfo &MRI,
43                                      MCContext &Ctx);
44
45MCAsmBackend *createPPCAsmBackend(const Target &T, const MCRegisterInfo &MRI,
46                                  const Triple &TT, StringRef CPU);
47
48/// Construct an PPC ELF object writer.
49MCObjectWriter *createPPCELFObjectWriter(raw_pwrite_stream &OS, bool Is64Bit,
50                                         bool IsLittleEndian, uint8_t OSABI);
51/// Construct a PPC Mach-O object writer.
52MCObjectWriter *createPPCMachObjectWriter(raw_pwrite_stream &OS, bool Is64Bit,
53                                          uint32_t CPUType,
54                                          uint32_t CPUSubtype);
55
56/// Returns true iff Val consists of one contiguous run of 1s with any number of
57/// 0s on either side.  The 1s are allowed to wrap from LSB to MSB, so
58/// 0x000FFF0, 0x0000FFFF, and 0xFF0000FF are all runs.  0x0F0F0000 is not,
59/// since all 1s are not contiguous.
60static inline bool isRunOfOnes(unsigned Val, unsigned &MB, unsigned &ME) {
61  if (!Val)
62    return false;
63
64  if (isShiftedMask_32(Val)) {
65    // look for the first non-zero bit
66    MB = countLeadingZeros(Val);
67    // look for the first zero bit after the run of ones
68    ME = countLeadingZeros((Val - 1) ^ Val);
69    return true;
70  } else {
71    Val = ~Val; // invert mask
72    if (isShiftedMask_32(Val)) {
73      // effectively look for the first zero bit
74      ME = countLeadingZeros(Val) - 1;
75      // effectively look for the first one bit after the run of zeros
76      MB = countLeadingZeros((Val - 1) ^ Val) + 1;
77      return true;
78    }
79  }
80  // no run present
81  return false;
82}
83
84} // End llvm namespace
85
86// Generated files will use "namespace PPC". To avoid symbol clash,
87// undefine PPC here. PPC may be predefined on some hosts.
88#undef PPC
89
90// Defines symbolic names for PowerPC registers.  This defines a mapping from
91// register name to register number.
92//
93#define GET_REGINFO_ENUM
94#include "PPCGenRegisterInfo.inc"
95
96// Defines symbolic names for the PowerPC instructions.
97//
98#define GET_INSTRINFO_ENUM
99#include "PPCGenInstrInfo.inc"
100
101#define GET_SUBTARGETINFO_ENUM
102#include "PPCGenSubtargetInfo.inc"
103
104#endif
105