PPCFrameLowering.h revision a1514e24cc24b050f53a12650e047799358833a1 
1//===-- PPCFrameLowering.h - Define frame lowering for PowerPC --*- C++ -*-===//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10//
11//===----------------------------------------------------------------------===//
12
13#ifndef POWERPC_FRAMEINFO_H
14#define POWERPC_FRAMEINFO_H
15
16#include "PPC.h"
17#include "PPCSubtarget.h"
18#include "llvm/ADT/STLExtras.h"
19#include "llvm/Target/TargetFrameLowering.h"
20#include "llvm/Target/TargetMachine.h"
21
22namespace llvm {
23  class PPCSubtarget;
24
25class PPCFrameLowering: public TargetFrameLowering {
26  const PPCSubtarget &Subtarget;
27
28public:
29  PPCFrameLowering(const PPCSubtarget &sti)
30    : TargetFrameLowering(TargetFrameLowering::StackGrowsDown, 16, 0),
31      Subtarget(sti) {
32  }
33
34  void determineFrameLayout(MachineFunction &MF) const;
35
36  /// emitProlog/emitEpilog - These methods insert prolog and epilog code into
37  /// the function.
38  void emitPrologue(MachineFunction &MF) const;
39  void emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const;
40
41  bool hasFP(const MachineFunction &MF) const;
42  bool needsFP(const MachineFunction &MF) const;
43
44  void processFunctionBeforeCalleeSavedScan(MachineFunction &MF,
45                                            RegScavenger *RS = NULL) const;
46  void processFunctionBeforeFrameFinalized(MachineFunction &MF) const;
47
48  bool spillCalleeSavedRegisters(MachineBasicBlock &MBB,
49                                 MachineBasicBlock::iterator MI,
50                                 const std::vector<CalleeSavedInfo> &CSI,
51                                 const TargetRegisterInfo *TRI) const;
52
53  bool restoreCalleeSavedRegisters(MachineBasicBlock &MBB,
54                                   MachineBasicBlock::iterator MI,
55                                   const std::vector<CalleeSavedInfo> &CSI,
56                                   const TargetRegisterInfo *TRI) const;
57
58  /// targetHandlesStackFrameRounding - Returns true if the target is
59  /// responsible for rounding up the stack frame (probably at emitPrologue
60  /// time).
61  bool targetHandlesStackFrameRounding() const { return true; }
62
63  /// getReturnSaveOffset - Return the previous frame offset to save the
64  /// return address.
65  static unsigned getReturnSaveOffset(bool isPPC64, bool isDarwinABI) {
66    if (isDarwinABI)
67      return isPPC64 ? 16 : 8;
68    // SVR4 ABI:
69    return isPPC64 ? 16 : 4;
70  }
71
72  /// getFramePointerSaveOffset - Return the previous frame offset to save the
73  /// frame pointer.
74  static unsigned getFramePointerSaveOffset(bool isPPC64, bool isDarwinABI) {
75    // For the Darwin ABI:
76    // We cannot use the TOC save slot (offset +20) in the PowerPC linkage area
77    // for saving the frame pointer (if needed.)  While the published ABI has
78    // not used this slot since at least MacOSX 10.2, there is older code
79    // around that does use it, and that needs to continue to work.
80    if (isDarwinABI)
81      return isPPC64 ? -8U : -4U;
82
83    // SVR4 ABI: First slot in the general register save area.
84    return isPPC64 ? -8U : -4U;
85  }
86
87  /// getLinkageSize - Return the size of the PowerPC ABI linkage area.
88  ///
89  static unsigned getLinkageSize(bool isPPC64, bool isDarwinABI) {
90    if (isDarwinABI || isPPC64)
91      return 6 * (isPPC64 ? 8 : 4);
92
93    // SVR4 ABI:
94    return 8;
95  }
96
97  /// getMinCallArgumentsSize - Return the size of the minium PowerPC ABI
98  /// argument area.
99  static unsigned getMinCallArgumentsSize(bool isPPC64, bool isDarwinABI) {
100    // For the Darwin ABI / 64-bit SVR4 ABI:
101    // The prolog code of the callee may store up to 8 GPR argument registers to
102    // the stack, allowing va_start to index over them in memory if its varargs.
103    // Because we cannot tell if this is needed on the caller side, we have to
104    // conservatively assume that it is needed.  As such, make sure we have at
105    // least enough stack space for the caller to store the 8 GPRs.
106    if (isDarwinABI || isPPC64)
107      return 8 * (isPPC64 ? 8 : 4);
108
109    // 32-bit SVR4 ABI:
110    // There is no default stack allocated for the 8 first GPR arguments.
111    return 0;
112  }
113
114  /// getMinCallFrameSize - Return the minimum size a call frame can be using
115  /// the PowerPC ABI.
116  static unsigned getMinCallFrameSize(bool isPPC64, bool isDarwinABI) {
117    // The call frame needs to be at least big enough for linkage and 8 args.
118    return getLinkageSize(isPPC64, isDarwinABI) +
119           getMinCallArgumentsSize(isPPC64, isDarwinABI);
120  }
121
122  // With the SVR4 ABI, callee-saved registers have fixed offsets on the stack.
123  const SpillSlot *
124  getCalleeSavedSpillSlots(unsigned &NumEntries) const {
125    if (Subtarget.isDarwinABI()) {
126      NumEntries = 1;
127      if (Subtarget.isPPC64()) {
128        static const SpillSlot darwin64Offsets = {PPC::X31, -8};
129        return &darwin64Offsets;
130      } else {
131        static const SpillSlot darwinOffsets = {PPC::R31, -4};
132        return &darwinOffsets;
133      }
134    }
135
136    // Early exit if not using the SVR4 ABI.
137    if (!Subtarget.isSVR4ABI()) {
138      NumEntries = 0;
139      return 0;
140    }
141
142    static const SpillSlot Offsets[] = {
143      // Floating-point register save area offsets.
144      {PPC::F31, -8},
145      {PPC::F30, -16},
146      {PPC::F29, -24},
147      {PPC::F28, -32},
148      {PPC::F27, -40},
149      {PPC::F26, -48},
150      {PPC::F25, -56},
151      {PPC::F24, -64},
152      {PPC::F23, -72},
153      {PPC::F22, -80},
154      {PPC::F21, -88},
155      {PPC::F20, -96},
156      {PPC::F19, -104},
157      {PPC::F18, -112},
158      {PPC::F17, -120},
159      {PPC::F16, -128},
160      {PPC::F15, -136},
161      {PPC::F14, -144},
162
163      // General register save area offsets.
164      {PPC::R31, -4},
165      {PPC::R30, -8},
166      {PPC::R29, -12},
167      {PPC::R28, -16},
168      {PPC::R27, -20},
169      {PPC::R26, -24},
170      {PPC::R25, -28},
171      {PPC::R24, -32},
172      {PPC::R23, -36},
173      {PPC::R22, -40},
174      {PPC::R21, -44},
175      {PPC::R20, -48},
176      {PPC::R19, -52},
177      {PPC::R18, -56},
178      {PPC::R17, -60},
179      {PPC::R16, -64},
180      {PPC::R15, -68},
181      {PPC::R14, -72},
182
183      // CR save area offset.  We map each of the nonvolatile CR fields
184      // to the slot for CR2, which is the first of the nonvolatile CR
185      // fields to be assigned, so that we only allocate one save slot.
186      // See PPCRegisterInfo::hasReservedSpillSlot() for more information.
187      {PPC::CR2, -4},
188
189      // VRSAVE save area offset.
190      {PPC::VRSAVE, -4},
191
192      // Vector register save area
193      {PPC::V31, -16},
194      {PPC::V30, -32},
195      {PPC::V29, -48},
196      {PPC::V28, -64},
197      {PPC::V27, -80},
198      {PPC::V26, -96},
199      {PPC::V25, -112},
200      {PPC::V24, -128},
201      {PPC::V23, -144},
202      {PPC::V22, -160},
203      {PPC::V21, -176},
204      {PPC::V20, -192}
205    };
206
207    static const SpillSlot Offsets64[] = {
208      // Floating-point register save area offsets.
209      {PPC::F31, -8},
210      {PPC::F30, -16},
211      {PPC::F29, -24},
212      {PPC::F28, -32},
213      {PPC::F27, -40},
214      {PPC::F26, -48},
215      {PPC::F25, -56},
216      {PPC::F24, -64},
217      {PPC::F23, -72},
218      {PPC::F22, -80},
219      {PPC::F21, -88},
220      {PPC::F20, -96},
221      {PPC::F19, -104},
222      {PPC::F18, -112},
223      {PPC::F17, -120},
224      {PPC::F16, -128},
225      {PPC::F15, -136},
226      {PPC::F14, -144},
227
228      // General register save area offsets.
229      {PPC::X31, -8},
230      {PPC::X30, -16},
231      {PPC::X29, -24},
232      {PPC::X28, -32},
233      {PPC::X27, -40},
234      {PPC::X26, -48},
235      {PPC::X25, -56},
236      {PPC::X24, -64},
237      {PPC::X23, -72},
238      {PPC::X22, -80},
239      {PPC::X21, -88},
240      {PPC::X20, -96},
241      {PPC::X19, -104},
242      {PPC::X18, -112},
243      {PPC::X17, -120},
244      {PPC::X16, -128},
245      {PPC::X15, -136},
246      {PPC::X14, -144},
247
248      // VRSAVE save area offset.
249      {PPC::VRSAVE, -4},
250
251      // Vector register save area
252      {PPC::V31, -16},
253      {PPC::V30, -32},
254      {PPC::V29, -48},
255      {PPC::V28, -64},
256      {PPC::V27, -80},
257      {PPC::V26, -96},
258      {PPC::V25, -112},
259      {PPC::V24, -128},
260      {PPC::V23, -144},
261      {PPC::V22, -160},
262      {PPC::V21, -176},
263      {PPC::V20, -192}
264    };
265
266    if (Subtarget.isPPC64()) {
267      NumEntries = array_lengthof(Offsets64);
268
269      return Offsets64;
270    } else {
271      NumEntries = array_lengthof(Offsets);
272
273      return Offsets;
274    }
275  }
276};
277
278} // End llvm namespace
279
280#endif
281