r300_state.c revision 21ba2cd63239eed4930959218cf5b03c56b26065
113cd4c8960688af11ad23b4c946149015c80d54Joshua Brindle/* 213cd4c8960688af11ad23b4c946149015c80d54Joshua Brindle * Copyright 2008 Corbin Simpson <MostAwesomeDude@gmail.com> 313cd4c8960688af11ad23b4c946149015c80d54Joshua Brindle * Copyright 2009 Marek Olšák <maraeo@gmail.com> 413cd4c8960688af11ad23b4c946149015c80d54Joshua Brindle * 513cd4c8960688af11ad23b4c946149015c80d54Joshua Brindle * Permission is hereby granted, free of charge, to any person obtaining a 613cd4c8960688af11ad23b4c946149015c80d54Joshua Brindle * copy of this software and associated documentation files (the "Software"), 713cd4c8960688af11ad23b4c946149015c80d54Joshua Brindle * to deal in the Software without restriction, including without limitation 813cd4c8960688af11ad23b4c946149015c80d54Joshua Brindle * on the rights to use, copy, modify, merge, publish, distribute, sub 913cd4c8960688af11ad23b4c946149015c80d54Joshua Brindle * license, and/or sell copies of the Software, and to permit persons to whom 1013cd4c8960688af11ad23b4c946149015c80d54Joshua Brindle * the Software is furnished to do so, subject to the following conditions: 1113cd4c8960688af11ad23b4c946149015c80d54Joshua Brindle * 1213cd4c8960688af11ad23b4c946149015c80d54Joshua Brindle * The above copyright notice and this permission notice (including the next 1313cd4c8960688af11ad23b4c946149015c80d54Joshua Brindle * paragraph) shall be included in all copies or substantial portions of the 1413cd4c8960688af11ad23b4c946149015c80d54Joshua Brindle * Software. 1513cd4c8960688af11ad23b4c946149015c80d54Joshua Brindle * 1613cd4c8960688af11ad23b4c946149015c80d54Joshua Brindle * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 1713cd4c8960688af11ad23b4c946149015c80d54Joshua Brindle * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 1813cd4c8960688af11ad23b4c946149015c80d54Joshua Brindle * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL 1913cd4c8960688af11ad23b4c946149015c80d54Joshua Brindle * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, 2013cd4c8960688af11ad23b4c946149015c80d54Joshua Brindle * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR 2113cd4c8960688af11ad23b4c946149015c80d54Joshua Brindle * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE 2213cd4c8960688af11ad23b4c946149015c80d54Joshua Brindle * USE OR OTHER DEALINGS IN THE SOFTWARE. */ 2313cd4c8960688af11ad23b4c946149015c80d54Joshua Brindle 2413cd4c8960688af11ad23b4c946149015c80d54Joshua Brindle#include "draw/draw_context.h" 2513cd4c8960688af11ad23b4c946149015c80d54Joshua Brindle 2613cd4c8960688af11ad23b4c946149015c80d54Joshua Brindle#include "util/u_math.h" 2713cd4c8960688af11ad23b4c946149015c80d54Joshua Brindle#include "util/u_memory.h" 2813cd4c8960688af11ad23b4c946149015c80d54Joshua Brindle#include "util/u_pack_color.h" 2913cd4c8960688af11ad23b4c946149015c80d54Joshua Brindle 3013cd4c8960688af11ad23b4c946149015c80d54Joshua Brindle#include "tgsi/tgsi_parse.h" 3113cd4c8960688af11ad23b4c946149015c80d54Joshua Brindle 3213cd4c8960688af11ad23b4c946149015c80d54Joshua Brindle#include "pipe/p_config.h" 3313cd4c8960688af11ad23b4c946149015c80d54Joshua Brindle 3413cd4c8960688af11ad23b4c946149015c80d54Joshua Brindle#include "r300_context.h" 3513cd4c8960688af11ad23b4c946149015c80d54Joshua Brindle#include "r300_reg.h" 3613cd4c8960688af11ad23b4c946149015c80d54Joshua Brindle#include "r300_screen.h" 3713cd4c8960688af11ad23b4c946149015c80d54Joshua Brindle#include "r300_screen_buffer.h" 3813cd4c8960688af11ad23b4c946149015c80d54Joshua Brindle#include "r300_state_inlines.h" 3913cd4c8960688af11ad23b4c946149015c80d54Joshua Brindle#include "r300_fs.h" 4013cd4c8960688af11ad23b4c946149015c80d54Joshua Brindle#include "r300_vs.h" 4113cd4c8960688af11ad23b4c946149015c80d54Joshua Brindle#include "r300_winsys.h" 4213cd4c8960688af11ad23b4c946149015c80d54Joshua Brindle 4313cd4c8960688af11ad23b4c946149015c80d54Joshua Brindle/* r300_state: Functions used to intialize state context by translating 4413cd4c8960688af11ad23b4c946149015c80d54Joshua Brindle * Gallium state objects into semi-native r300 state objects. */ 4513cd4c8960688af11ad23b4c946149015c80d54Joshua Brindle 4613cd4c8960688af11ad23b4c946149015c80d54Joshua Brindle#define UPDATE_STATE(cso, atom) \ 4713cd4c8960688af11ad23b4c946149015c80d54Joshua Brindle if (cso != atom.state) { \ 4813cd4c8960688af11ad23b4c946149015c80d54Joshua Brindle atom.state = cso; \ 4913cd4c8960688af11ad23b4c946149015c80d54Joshua Brindle atom.dirty = TRUE; \ 5013cd4c8960688af11ad23b4c946149015c80d54Joshua Brindle } 5113cd4c8960688af11ad23b4c946149015c80d54Joshua Brindle 5213cd4c8960688af11ad23b4c946149015c80d54Joshua Brindlestatic boolean blend_discard_if_src_alpha_0(unsigned srcRGB, unsigned srcA, 5313cd4c8960688af11ad23b4c946149015c80d54Joshua Brindle unsigned dstRGB, unsigned dstA) 5413cd4c8960688af11ad23b4c946149015c80d54Joshua Brindle{ 5513cd4c8960688af11ad23b4c946149015c80d54Joshua Brindle /* If the blend equation is ADD or REVERSE_SUBTRACT, 5613cd4c8960688af11ad23b4c946149015c80d54Joshua Brindle * SRC_ALPHA == 0, and the following state is set, the colorbuffer 5713cd4c8960688af11ad23b4c946149015c80d54Joshua Brindle * will not be changed. 5813cd4c8960688af11ad23b4c946149015c80d54Joshua Brindle * Notice that the dst factors are the src factors inverted. */ 5913cd4c8960688af11ad23b4c946149015c80d54Joshua Brindle return (srcRGB == PIPE_BLENDFACTOR_SRC_ALPHA || 6013cd4c8960688af11ad23b4c946149015c80d54Joshua Brindle srcRGB == PIPE_BLENDFACTOR_SRC_ALPHA_SATURATE || 6113cd4c8960688af11ad23b4c946149015c80d54Joshua Brindle srcRGB == PIPE_BLENDFACTOR_ZERO) && 6213cd4c8960688af11ad23b4c946149015c80d54Joshua Brindle (srcA == PIPE_BLENDFACTOR_SRC_COLOR || 6313cd4c8960688af11ad23b4c946149015c80d54Joshua Brindle srcA == PIPE_BLENDFACTOR_SRC_ALPHA || 6413cd4c8960688af11ad23b4c946149015c80d54Joshua Brindle srcA == PIPE_BLENDFACTOR_SRC_ALPHA_SATURATE || 6513cd4c8960688af11ad23b4c946149015c80d54Joshua Brindle srcA == PIPE_BLENDFACTOR_ZERO) && 6613cd4c8960688af11ad23b4c946149015c80d54Joshua Brindle (dstRGB == PIPE_BLENDFACTOR_INV_SRC_ALPHA || 6713cd4c8960688af11ad23b4c946149015c80d54Joshua Brindle dstRGB == PIPE_BLENDFACTOR_ONE) && 6813cd4c8960688af11ad23b4c946149015c80d54Joshua Brindle (dstA == PIPE_BLENDFACTOR_INV_SRC_COLOR || 6913cd4c8960688af11ad23b4c946149015c80d54Joshua Brindle dstA == PIPE_BLENDFACTOR_INV_SRC_ALPHA || 7013cd4c8960688af11ad23b4c946149015c80d54Joshua Brindle dstA == PIPE_BLENDFACTOR_ONE); 7113cd4c8960688af11ad23b4c946149015c80d54Joshua Brindle} 7213cd4c8960688af11ad23b4c946149015c80d54Joshua Brindle 7313cd4c8960688af11ad23b4c946149015c80d54Joshua Brindlestatic boolean blend_discard_if_src_alpha_1(unsigned srcRGB, unsigned srcA, 7413cd4c8960688af11ad23b4c946149015c80d54Joshua Brindle unsigned dstRGB, unsigned dstA) 7513cd4c8960688af11ad23b4c946149015c80d54Joshua Brindle{ 7613cd4c8960688af11ad23b4c946149015c80d54Joshua Brindle /* If the blend equation is ADD or REVERSE_SUBTRACT, 7713cd4c8960688af11ad23b4c946149015c80d54Joshua Brindle * SRC_ALPHA == 1, and the following state is set, the colorbuffer 7813cd4c8960688af11ad23b4c946149015c80d54Joshua Brindle * will not be changed. 7913cd4c8960688af11ad23b4c946149015c80d54Joshua Brindle * Notice that the dst factors are the src factors inverted. */ 8013cd4c8960688af11ad23b4c946149015c80d54Joshua Brindle return (srcRGB == PIPE_BLENDFACTOR_INV_SRC_ALPHA || 8113cd4c8960688af11ad23b4c946149015c80d54Joshua Brindle srcRGB == PIPE_BLENDFACTOR_ZERO) && 8213cd4c8960688af11ad23b4c946149015c80d54Joshua Brindle (srcA == PIPE_BLENDFACTOR_INV_SRC_COLOR || 8313cd4c8960688af11ad23b4c946149015c80d54Joshua Brindle srcA == PIPE_BLENDFACTOR_INV_SRC_ALPHA || 8413cd4c8960688af11ad23b4c946149015c80d54Joshua Brindle srcA == PIPE_BLENDFACTOR_ZERO) && 8513cd4c8960688af11ad23b4c946149015c80d54Joshua Brindle (dstRGB == PIPE_BLENDFACTOR_SRC_ALPHA || 8613cd4c8960688af11ad23b4c946149015c80d54Joshua Brindle dstRGB == PIPE_BLENDFACTOR_ONE) && 8713cd4c8960688af11ad23b4c946149015c80d54Joshua Brindle (dstA == PIPE_BLENDFACTOR_SRC_COLOR || 8813cd4c8960688af11ad23b4c946149015c80d54Joshua Brindle dstA == PIPE_BLENDFACTOR_SRC_ALPHA || 89e37fa2f63be89afab9b5f5ddfedbd589d0676c4eCaleb Case dstA == PIPE_BLENDFACTOR_ONE); 90e37fa2f63be89afab9b5f5ddfedbd589d0676c4eCaleb Case} 9113cd4c8960688af11ad23b4c946149015c80d54Joshua Brindle 9213cd4c8960688af11ad23b4c946149015c80d54Joshua Brindlestatic boolean blend_discard_if_src_color_0(unsigned srcRGB, unsigned srcA, 9313cd4c8960688af11ad23b4c946149015c80d54Joshua Brindle unsigned dstRGB, unsigned dstA) 9413cd4c8960688af11ad23b4c946149015c80d54Joshua Brindle{ 9513cd4c8960688af11ad23b4c946149015c80d54Joshua Brindle /* If the blend equation is ADD or REVERSE_SUBTRACT, 9613cd4c8960688af11ad23b4c946149015c80d54Joshua Brindle * SRC_COLOR == (0,0,0), and the following state is set, the colorbuffer 9713cd4c8960688af11ad23b4c946149015c80d54Joshua Brindle * will not be changed. 9813cd4c8960688af11ad23b4c946149015c80d54Joshua Brindle * Notice that the dst factors are the src factors inverted. */ 9913cd4c8960688af11ad23b4c946149015c80d54Joshua Brindle return (srcRGB == PIPE_BLENDFACTOR_SRC_COLOR || 10013cd4c8960688af11ad23b4c946149015c80d54Joshua Brindle srcRGB == PIPE_BLENDFACTOR_ZERO) && 10113cd4c8960688af11ad23b4c946149015c80d54Joshua Brindle (srcA == PIPE_BLENDFACTOR_ZERO) && 10213cd4c8960688af11ad23b4c946149015c80d54Joshua Brindle (dstRGB == PIPE_BLENDFACTOR_INV_SRC_COLOR || 10313cd4c8960688af11ad23b4c946149015c80d54Joshua Brindle dstRGB == PIPE_BLENDFACTOR_ONE) && 10413cd4c8960688af11ad23b4c946149015c80d54Joshua Brindle (dstA == PIPE_BLENDFACTOR_ONE); 10513cd4c8960688af11ad23b4c946149015c80d54Joshua Brindle} 10613cd4c8960688af11ad23b4c946149015c80d54Joshua Brindle 10713cd4c8960688af11ad23b4c946149015c80d54Joshua Brindlestatic boolean blend_discard_if_src_color_1(unsigned srcRGB, unsigned srcA, 10813cd4c8960688af11ad23b4c946149015c80d54Joshua Brindle unsigned dstRGB, unsigned dstA) 10913cd4c8960688af11ad23b4c946149015c80d54Joshua Brindle{ 11013cd4c8960688af11ad23b4c946149015c80d54Joshua Brindle /* If the blend equation is ADD or REVERSE_SUBTRACT, 11113cd4c8960688af11ad23b4c946149015c80d54Joshua Brindle * SRC_COLOR == (1,1,1), and the following state is set, the colorbuffer 11213cd4c8960688af11ad23b4c946149015c80d54Joshua Brindle * will not be changed. 113 * Notice that the dst factors are the src factors inverted. */ 114 return (srcRGB == PIPE_BLENDFACTOR_INV_SRC_COLOR || 115 srcRGB == PIPE_BLENDFACTOR_ZERO) && 116 (srcA == PIPE_BLENDFACTOR_ZERO) && 117 (dstRGB == PIPE_BLENDFACTOR_SRC_COLOR || 118 dstRGB == PIPE_BLENDFACTOR_ONE) && 119 (dstA == PIPE_BLENDFACTOR_ONE); 120} 121 122static boolean blend_discard_if_src_alpha_color_0(unsigned srcRGB, unsigned srcA, 123 unsigned dstRGB, unsigned dstA) 124{ 125 /* If the blend equation is ADD or REVERSE_SUBTRACT, 126 * SRC_ALPHA_COLOR == (0,0,0,0), and the following state is set, 127 * the colorbuffer will not be changed. 128 * Notice that the dst factors are the src factors inverted. */ 129 return (srcRGB == PIPE_BLENDFACTOR_SRC_COLOR || 130 srcRGB == PIPE_BLENDFACTOR_SRC_ALPHA || 131 srcRGB == PIPE_BLENDFACTOR_SRC_ALPHA_SATURATE || 132 srcRGB == PIPE_BLENDFACTOR_ZERO) && 133 (srcA == PIPE_BLENDFACTOR_SRC_COLOR || 134 srcA == PIPE_BLENDFACTOR_SRC_ALPHA || 135 srcA == PIPE_BLENDFACTOR_SRC_ALPHA_SATURATE || 136 srcA == PIPE_BLENDFACTOR_ZERO) && 137 (dstRGB == PIPE_BLENDFACTOR_INV_SRC_COLOR || 138 dstRGB == PIPE_BLENDFACTOR_INV_SRC_ALPHA || 139 dstRGB == PIPE_BLENDFACTOR_ONE) && 140 (dstA == PIPE_BLENDFACTOR_INV_SRC_COLOR || 141 dstA == PIPE_BLENDFACTOR_INV_SRC_ALPHA || 142 dstA == PIPE_BLENDFACTOR_ONE); 143} 144 145static boolean blend_discard_if_src_alpha_color_1(unsigned srcRGB, unsigned srcA, 146 unsigned dstRGB, unsigned dstA) 147{ 148 /* If the blend equation is ADD or REVERSE_SUBTRACT, 149 * SRC_ALPHA_COLOR == (1,1,1,1), and the following state is set, 150 * the colorbuffer will not be changed. 151 * Notice that the dst factors are the src factors inverted. */ 152 return (srcRGB == PIPE_BLENDFACTOR_INV_SRC_COLOR || 153 srcRGB == PIPE_BLENDFACTOR_INV_SRC_ALPHA || 154 srcRGB == PIPE_BLENDFACTOR_ZERO) && 155 (srcA == PIPE_BLENDFACTOR_INV_SRC_COLOR || 156 srcA == PIPE_BLENDFACTOR_INV_SRC_ALPHA || 157 srcA == PIPE_BLENDFACTOR_ZERO) && 158 (dstRGB == PIPE_BLENDFACTOR_SRC_COLOR || 159 dstRGB == PIPE_BLENDFACTOR_SRC_ALPHA || 160 dstRGB == PIPE_BLENDFACTOR_ONE) && 161 (dstA == PIPE_BLENDFACTOR_SRC_COLOR || 162 dstA == PIPE_BLENDFACTOR_SRC_ALPHA || 163 dstA == PIPE_BLENDFACTOR_ONE); 164} 165 166static unsigned bgra_cmask(unsigned mask) 167{ 168 /* Gallium uses RGBA color ordering while R300 expects BGRA. */ 169 170 return ((mask & PIPE_MASK_R) << 2) | 171 ((mask & PIPE_MASK_B) >> 2) | 172 (mask & (PIPE_MASK_G | PIPE_MASK_A)); 173} 174 175/* Create a new blend state based on the CSO blend state. 176 * 177 * This encompasses alpha blending, logic/raster ops, and blend dithering. */ 178static void* r300_create_blend_state(struct pipe_context* pipe, 179 const struct pipe_blend_state* state) 180{ 181 struct r300_screen* r300screen = r300_screen(pipe->screen); 182 struct r300_blend_state* blend = CALLOC_STRUCT(r300_blend_state); 183 184 if (state->rt[0].blend_enable) 185 { 186 unsigned eqRGB = state->rt[0].rgb_func; 187 unsigned srcRGB = state->rt[0].rgb_src_factor; 188 unsigned dstRGB = state->rt[0].rgb_dst_factor; 189 190 unsigned eqA = state->rt[0].alpha_func; 191 unsigned srcA = state->rt[0].alpha_src_factor; 192 unsigned dstA = state->rt[0].alpha_dst_factor; 193 194 /* despite the name, ALPHA_BLEND_ENABLE has nothing to do with alpha, 195 * this is just the crappy D3D naming */ 196 blend->blend_control = R300_ALPHA_BLEND_ENABLE | 197 r300_translate_blend_function(eqRGB) | 198 ( r300_translate_blend_factor(srcRGB) << R300_SRC_BLEND_SHIFT) | 199 ( r300_translate_blend_factor(dstRGB) << R300_DST_BLEND_SHIFT); 200 201 /* Optimization: some operations do not require the destination color. 202 * 203 * When SRC_ALPHA_SATURATE is used, colorbuffer reads must be enabled, 204 * otherwise blending gives incorrect results. It seems to be 205 * a hardware bug. */ 206 if (eqRGB == PIPE_BLEND_MIN || eqA == PIPE_BLEND_MIN || 207 eqRGB == PIPE_BLEND_MAX || eqA == PIPE_BLEND_MAX || 208 dstRGB != PIPE_BLENDFACTOR_ZERO || 209 dstA != PIPE_BLENDFACTOR_ZERO || 210 srcRGB == PIPE_BLENDFACTOR_DST_COLOR || 211 srcRGB == PIPE_BLENDFACTOR_DST_ALPHA || 212 srcRGB == PIPE_BLENDFACTOR_INV_DST_COLOR || 213 srcRGB == PIPE_BLENDFACTOR_INV_DST_ALPHA || 214 srcA == PIPE_BLENDFACTOR_DST_COLOR || 215 srcA == PIPE_BLENDFACTOR_DST_ALPHA || 216 srcA == PIPE_BLENDFACTOR_INV_DST_COLOR || 217 srcA == PIPE_BLENDFACTOR_INV_DST_ALPHA || 218 srcRGB == PIPE_BLENDFACTOR_SRC_ALPHA_SATURATE) { 219 /* Enable reading from the colorbuffer. */ 220 blend->blend_control |= R300_READ_ENABLE; 221 222 if (r300screen->caps.is_r500) { 223 /* Optimization: Depending on incoming pixels, we can 224 * conditionally disable the reading in hardware... */ 225 if (eqRGB != PIPE_BLEND_MIN && eqA != PIPE_BLEND_MIN && 226 eqRGB != PIPE_BLEND_MAX && eqA != PIPE_BLEND_MAX) { 227 /* Disable reading if SRC_ALPHA == 0. */ 228 if ((dstRGB == PIPE_BLENDFACTOR_SRC_ALPHA || 229 dstRGB == PIPE_BLENDFACTOR_ZERO) && 230 (dstA == PIPE_BLENDFACTOR_SRC_COLOR || 231 dstA == PIPE_BLENDFACTOR_SRC_ALPHA || 232 dstA == PIPE_BLENDFACTOR_ZERO)) { 233 blend->blend_control |= R500_SRC_ALPHA_0_NO_READ; 234 } 235 236 /* Disable reading if SRC_ALPHA == 1. */ 237 if ((dstRGB == PIPE_BLENDFACTOR_INV_SRC_ALPHA || 238 dstRGB == PIPE_BLENDFACTOR_ZERO) && 239 (dstA == PIPE_BLENDFACTOR_INV_SRC_COLOR || 240 dstA == PIPE_BLENDFACTOR_INV_SRC_ALPHA || 241 dstA == PIPE_BLENDFACTOR_ZERO)) { 242 blend->blend_control |= R500_SRC_ALPHA_1_NO_READ; 243 } 244 } 245 } 246 } 247 248 /* Optimization: discard pixels which don't change the colorbuffer. 249 * 250 * The code below is non-trivial and some math is involved. 251 * 252 * Discarding pixels must be disabled when FP16 AA is enabled. 253 * This is a hardware bug. Also, this implementation wouldn't work 254 * with FP blending enabled and equation clamping disabled. 255 * 256 * Equations other than ADD are rarely used and therefore won't be 257 * optimized. */ 258 if ((eqRGB == PIPE_BLEND_ADD || eqRGB == PIPE_BLEND_REVERSE_SUBTRACT) && 259 (eqA == PIPE_BLEND_ADD || eqA == PIPE_BLEND_REVERSE_SUBTRACT)) { 260 /* ADD: X+Y 261 * REVERSE_SUBTRACT: Y-X 262 * 263 * The idea is: 264 * If X = src*srcFactor = 0 and Y = dst*dstFactor = 1, 265 * then CB will not be changed. 266 * 267 * Given the srcFactor and dstFactor variables, we can derive 268 * what src and dst should be equal to and discard appropriate 269 * pixels. 270 */ 271 if (blend_discard_if_src_alpha_0(srcRGB, srcA, dstRGB, dstA)) { 272 blend->blend_control |= R300_DISCARD_SRC_PIXELS_SRC_ALPHA_0; 273 } else if (blend_discard_if_src_alpha_1(srcRGB, srcA, 274 dstRGB, dstA)) { 275 blend->blend_control |= R300_DISCARD_SRC_PIXELS_SRC_ALPHA_1; 276 } else if (blend_discard_if_src_color_0(srcRGB, srcA, 277 dstRGB, dstA)) { 278 blend->blend_control |= R300_DISCARD_SRC_PIXELS_SRC_COLOR_0; 279 } else if (blend_discard_if_src_color_1(srcRGB, srcA, 280 dstRGB, dstA)) { 281 blend->blend_control |= R300_DISCARD_SRC_PIXELS_SRC_COLOR_1; 282 } else if (blend_discard_if_src_alpha_color_0(srcRGB, srcA, 283 dstRGB, dstA)) { 284 blend->blend_control |= 285 R300_DISCARD_SRC_PIXELS_SRC_ALPHA_COLOR_0; 286 } else if (blend_discard_if_src_alpha_color_1(srcRGB, srcA, 287 dstRGB, dstA)) { 288 blend->blend_control |= 289 R300_DISCARD_SRC_PIXELS_SRC_ALPHA_COLOR_1; 290 } 291 } 292 293 /* separate alpha */ 294 if (srcA != srcRGB || dstA != dstRGB || eqA != eqRGB) { 295 blend->blend_control |= R300_SEPARATE_ALPHA_ENABLE; 296 blend->alpha_blend_control = 297 r300_translate_blend_function(eqA) | 298 (r300_translate_blend_factor(srcA) << R300_SRC_BLEND_SHIFT) | 299 (r300_translate_blend_factor(dstA) << R300_DST_BLEND_SHIFT); 300 } 301 } 302 303 /* PIPE_LOGICOP_* don't need to be translated, fortunately. */ 304 if (state->logicop_enable) { 305 blend->rop = R300_RB3D_ROPCNTL_ROP_ENABLE | 306 (state->logicop_func) << R300_RB3D_ROPCNTL_ROP_SHIFT; 307 } 308 309 /* Color channel masks for all MRTs. */ 310 blend->color_channel_mask = bgra_cmask(state->rt[0].colormask); 311 if (r300screen->caps.is_r500 && state->independent_blend_enable) { 312 if (state->rt[1].blend_enable) { 313 blend->color_channel_mask |= bgra_cmask(state->rt[1].colormask) << 4; 314 } 315 if (state->rt[2].blend_enable) { 316 blend->color_channel_mask |= bgra_cmask(state->rt[2].colormask) << 8; 317 } 318 if (state->rt[3].blend_enable) { 319 blend->color_channel_mask |= bgra_cmask(state->rt[3].colormask) << 12; 320 } 321 } 322 323 /* Neither fglrx nor classic r300 ever set this, regardless of dithering 324 * state. Since it's an optional implementation detail, we can leave it 325 * out and never dither. 326 * 327 * This could be revisited if we ever get quality or conformance hints. 328 * 329 if (state->dither) { 330 blend->dither = R300_RB3D_DITHER_CTL_DITHER_MODE_LUT | 331 R300_RB3D_DITHER_CTL_ALPHA_DITHER_MODE_LUT; 332 } 333 */ 334 335 return (void*)blend; 336} 337 338/* Bind blend state. */ 339static void r300_bind_blend_state(struct pipe_context* pipe, 340 void* state) 341{ 342 struct r300_context* r300 = r300_context(pipe); 343 344 UPDATE_STATE(state, r300->blend_state); 345} 346 347/* Free blend state. */ 348static void r300_delete_blend_state(struct pipe_context* pipe, 349 void* state) 350{ 351 FREE(state); 352} 353 354/* Convert float to 10bit integer */ 355static unsigned float_to_fixed10(float f) 356{ 357 return CLAMP((unsigned)(f * 1023.9f), 0, 1023); 358} 359 360/* Set blend color. 361 * Setup both R300 and R500 registers, figure out later which one to write. */ 362static void r300_set_blend_color(struct pipe_context* pipe, 363 const struct pipe_blend_color* color) 364{ 365 struct r300_context* r300 = r300_context(pipe); 366 struct r300_blend_color_state* state = 367 (struct r300_blend_color_state*)r300->blend_color_state.state; 368 union util_color uc; 369 370 util_pack_color(color->color, PIPE_FORMAT_B8G8R8A8_UNORM, &uc); 371 state->blend_color = uc.ui; 372 373 /* XXX if FP16 blending is enabled, we should use the FP16 format */ 374 state->blend_color_red_alpha = 375 float_to_fixed10(color->color[0]) | 376 (float_to_fixed10(color->color[3]) << 16); 377 state->blend_color_green_blue = 378 float_to_fixed10(color->color[2]) | 379 (float_to_fixed10(color->color[1]) << 16); 380 381 r300->blend_color_state.size = r300->screen->caps.is_r500 ? 3 : 2; 382 r300->blend_color_state.dirty = TRUE; 383} 384 385static void r300_set_clip_state(struct pipe_context* pipe, 386 const struct pipe_clip_state* state) 387{ 388 struct r300_context* r300 = r300_context(pipe); 389 390 r300->clip = *state; 391 392 if (r300->screen->caps.has_tcl) { 393 memcpy(r300->clip_state.state, state, sizeof(struct pipe_clip_state)); 394 r300->clip_state.size = 29; 395 } else { 396 draw_flush(r300->draw); 397 draw_set_clip_state(r300->draw, state); 398 r300->clip_state.size = 2; 399 } 400 401 r300->clip_state.dirty = TRUE; 402} 403 404/* Create a new depth, stencil, and alpha state based on the CSO dsa state. 405 * 406 * This contains the depth buffer, stencil buffer, alpha test, and such. 407 * On the Radeon, depth and stencil buffer setup are intertwined, which is 408 * the reason for some of the strange-looking assignments across registers. */ 409static void* 410 r300_create_dsa_state(struct pipe_context* pipe, 411 const struct pipe_depth_stencil_alpha_state* state) 412{ 413 struct r300_capabilities *caps = &r300_screen(pipe->screen)->caps; 414 struct r300_dsa_state* dsa = CALLOC_STRUCT(r300_dsa_state); 415 416 /* Depth test setup. */ 417 if (state->depth.enabled) { 418 dsa->z_buffer_control |= R300_Z_ENABLE; 419 420 if (state->depth.writemask) { 421 dsa->z_buffer_control |= R300_Z_WRITE_ENABLE; 422 } 423 424 dsa->z_stencil_control |= 425 (r300_translate_depth_stencil_function(state->depth.func) << 426 R300_Z_FUNC_SHIFT); 427 } 428 429 /* Stencil buffer setup. */ 430 if (state->stencil[0].enabled) { 431 dsa->z_buffer_control |= R300_STENCIL_ENABLE; 432 dsa->z_stencil_control |= 433 (r300_translate_depth_stencil_function(state->stencil[0].func) << 434 R300_S_FRONT_FUNC_SHIFT) | 435 (r300_translate_stencil_op(state->stencil[0].fail_op) << 436 R300_S_FRONT_SFAIL_OP_SHIFT) | 437 (r300_translate_stencil_op(state->stencil[0].zpass_op) << 438 R300_S_FRONT_ZPASS_OP_SHIFT) | 439 (r300_translate_stencil_op(state->stencil[0].zfail_op) << 440 R300_S_FRONT_ZFAIL_OP_SHIFT); 441 442 dsa->stencil_ref_mask = 443 (state->stencil[0].valuemask << R300_STENCILMASK_SHIFT) | 444 (state->stencil[0].writemask << R300_STENCILWRITEMASK_SHIFT); 445 446 if (state->stencil[1].enabled) { 447 dsa->two_sided = TRUE; 448 449 dsa->z_buffer_control |= R300_STENCIL_FRONT_BACK; 450 dsa->z_stencil_control |= 451 (r300_translate_depth_stencil_function(state->stencil[1].func) << 452 R300_S_BACK_FUNC_SHIFT) | 453 (r300_translate_stencil_op(state->stencil[1].fail_op) << 454 R300_S_BACK_SFAIL_OP_SHIFT) | 455 (r300_translate_stencil_op(state->stencil[1].zpass_op) << 456 R300_S_BACK_ZPASS_OP_SHIFT) | 457 (r300_translate_stencil_op(state->stencil[1].zfail_op) << 458 R300_S_BACK_ZFAIL_OP_SHIFT); 459 460 dsa->stencil_ref_bf = 461 (state->stencil[1].valuemask << R300_STENCILMASK_SHIFT) | 462 (state->stencil[1].writemask << R300_STENCILWRITEMASK_SHIFT); 463 464 if (caps->is_r500) { 465 dsa->z_buffer_control |= R500_STENCIL_REFMASK_FRONT_BACK; 466 } else { 467 dsa->stencil_ref_bf_fallback = 468 (state->stencil[0].valuemask != state->stencil[1].valuemask || 469 state->stencil[0].writemask != state->stencil[1].writemask); 470 } 471 } 472 } 473 474 /* Alpha test setup. */ 475 if (state->alpha.enabled) { 476 dsa->alpha_function = 477 r300_translate_alpha_function(state->alpha.func) | 478 R300_FG_ALPHA_FUNC_ENABLE; 479 480 /* We could use 10bit alpha ref but who needs that? */ 481 dsa->alpha_function |= float_to_ubyte(state->alpha.ref_value); 482 483 if (caps->is_r500) 484 dsa->alpha_function |= R500_FG_ALPHA_FUNC_8BIT; 485 } 486 487 return (void*)dsa; 488} 489 490static void r300_update_stencil_ref_fallback_status(struct r300_context *r300) 491{ 492 struct r300_dsa_state *dsa = (struct r300_dsa_state*)r300->dsa_state.state; 493 494 if (r300->screen->caps.is_r500) { 495 return; 496 } 497 498 r300->stencil_ref_bf_fallback = 499 dsa->stencil_ref_bf_fallback || 500 (dsa->two_sided && 501 r300->stencil_ref.ref_value[0] != r300->stencil_ref.ref_value[1]); 502} 503 504/* Bind DSA state. */ 505static void r300_bind_dsa_state(struct pipe_context* pipe, 506 void* state) 507{ 508 struct r300_context* r300 = r300_context(pipe); 509 510 if (!state) { 511 return; 512 } 513 514 UPDATE_STATE(state, r300->dsa_state); 515 516 r300_update_stencil_ref_fallback_status(r300); 517} 518 519/* Free DSA state. */ 520static void r300_delete_dsa_state(struct pipe_context* pipe, 521 void* state) 522{ 523 FREE(state); 524} 525 526static void r300_set_stencil_ref(struct pipe_context* pipe, 527 const struct pipe_stencil_ref* sr) 528{ 529 struct r300_context* r300 = r300_context(pipe); 530 531 r300->stencil_ref = *sr; 532 r300->dsa_state.dirty = TRUE; 533 534 r300_update_stencil_ref_fallback_status(r300); 535} 536 537/* This switcheroo is needed just because of goddamned MACRO_SWITCH. */ 538static void r300_fb_update_tiling_flags(struct r300_context *r300, 539 const struct pipe_framebuffer_state *old_state, 540 const struct pipe_framebuffer_state *new_state) 541{ 542 struct r300_texture *tex; 543 unsigned i, j, level; 544 545 /* Reset tiling flags for old surfaces to default values. */ 546 for (i = 0; i < old_state->nr_cbufs; i++) { 547 for (j = 0; j < new_state->nr_cbufs; j++) { 548 if (old_state->cbufs[i]->texture == new_state->cbufs[j]->texture) { 549 break; 550 } 551 } 552 /* If not binding the surface again... */ 553 if (j != new_state->nr_cbufs) { 554 continue; 555 } 556 557 tex = r300_texture(old_state->cbufs[i]->texture); 558 559 if (tex) { 560 r300->rws->buffer_set_tiling(r300->rws, tex->buffer, 561 tex->pitch[0], 562 tex->microtile, 563 tex->macrotile); 564 } 565 } 566 if (old_state->zsbuf && 567 (!new_state->zsbuf || 568 old_state->zsbuf->texture != new_state->zsbuf->texture)) { 569 tex = r300_texture(old_state->zsbuf->texture); 570 571 if (tex) { 572 r300->rws->buffer_set_tiling(r300->rws, tex->buffer, 573 tex->pitch[0], 574 tex->microtile, 575 tex->macrotile); 576 } 577 } 578 579 /* Set tiling flags for new surfaces. */ 580 for (i = 0; i < new_state->nr_cbufs; i++) { 581 tex = r300_texture(new_state->cbufs[i]->texture); 582 level = new_state->cbufs[i]->level; 583 584 r300->rws->buffer_set_tiling(r300->rws, tex->buffer, 585 tex->pitch[level], 586 tex->microtile, 587 tex->mip_macrotile[level]); 588 } 589 if (new_state->zsbuf) { 590 tex = r300_texture(new_state->zsbuf->texture); 591 level = new_state->zsbuf->level; 592 593 r300->rws->buffer_set_tiling(r300->rws, tex->buffer, 594 tex->pitch[level], 595 tex->microtile, 596 tex->mip_macrotile[level]); 597 } 598} 599 600static void 601 r300_set_framebuffer_state(struct pipe_context* pipe, 602 const struct pipe_framebuffer_state* state) 603{ 604 struct r300_context* r300 = r300_context(pipe); 605 struct pipe_framebuffer_state *old_state = r300->fb_state.state; 606 unsigned max_width, max_height; 607 uint32_t zbuffer_bpp = 0; 608 609 if (state->nr_cbufs > 4) { 610 fprintf(stderr, "r300: Implementation error: Too many MRTs in %s, " 611 "refusing to bind framebuffer state!\n", __FUNCTION__); 612 return; 613 } 614 615 if (r300->screen->caps.is_r500) { 616 max_width = max_height = 4096; 617 } else if (r300->screen->caps.is_r400) { 618 max_width = max_height = 4021; 619 } else { 620 max_width = max_height = 2560; 621 } 622 623 if (state->width > max_width || state->height > max_height) { 624 fprintf(stderr, "r300: Implementation error: Render targets are too " 625 "big in %s, refusing to bind framebuffer state!\n", __FUNCTION__); 626 return; 627 } 628 629 if (r300->draw) { 630 draw_flush(r300->draw); 631 } 632 633 r300->fb_state.dirty = TRUE; 634 635 /* If nr_cbufs is changed from zero to non-zero or vice versa... */ 636 if (!!old_state->nr_cbufs != !!state->nr_cbufs) { 637 r300->blend_state.dirty = TRUE; 638 } 639 /* If zsbuf is set from NULL to non-NULL or vice versa.. */ 640 if (!!old_state->zsbuf != !!state->zsbuf) { 641 r300->dsa_state.dirty = TRUE; 642 } 643 if (!r300->scissor_enabled) { 644 r300->scissor_state.dirty = TRUE; 645 } 646 647 r300_fb_update_tiling_flags(r300, r300->fb_state.state, state); 648 649 memcpy(r300->fb_state.state, state, sizeof(struct pipe_framebuffer_state)); 650 651 r300->fb_state.size = (10 * state->nr_cbufs) + (2 * (4 - state->nr_cbufs)) + 652 (state->zsbuf ? 10 : 0) + 8; 653 654 /* Polygon offset depends on the zbuffer bit depth. */ 655 if (state->zsbuf && r300->polygon_offset_enabled) { 656 switch (util_format_get_blocksize(state->zsbuf->texture->format)) { 657 case 2: 658 zbuffer_bpp = 16; 659 break; 660 case 4: 661 zbuffer_bpp = 24; 662 break; 663 } 664 665 if (r300->zbuffer_bpp != zbuffer_bpp) { 666 r300->zbuffer_bpp = zbuffer_bpp; 667 r300->rs_state.dirty = TRUE; 668 } 669 } 670} 671 672/* Create fragment shader state. */ 673static void* r300_create_fs_state(struct pipe_context* pipe, 674 const struct pipe_shader_state* shader) 675{ 676 struct r300_fragment_shader* fs = NULL; 677 678 fs = (struct r300_fragment_shader*)CALLOC_STRUCT(r300_fragment_shader); 679 680 /* Copy state directly into shader. */ 681 fs->state = *shader; 682 fs->state.tokens = tgsi_dup_tokens(shader->tokens); 683 684 tgsi_scan_shader(shader->tokens, &fs->info); 685 r300_shader_read_fs_inputs(&fs->info, &fs->inputs); 686 687 return (void*)fs; 688} 689 690/* Bind fragment shader state. */ 691static void r300_bind_fs_state(struct pipe_context* pipe, void* shader) 692{ 693 struct r300_context* r300 = r300_context(pipe); 694 struct r300_fragment_shader* fs = (struct r300_fragment_shader*)shader; 695 696 if (fs == NULL) { 697 r300->fs = NULL; 698 return; 699 } 700 701 r300->fs = fs; 702 r300_pick_fragment_shader(r300); 703 704 r300->rs_block_state.dirty = TRUE; /* Will be updated before the emission. */ 705 706 if (r300->vs_state.state && r300_vertex_shader_setup_wpos(r300)) { 707 r300->vap_output_state.dirty = TRUE; 708 } 709 710 r300->dirty_state |= R300_NEW_FRAGMENT_SHADER | R300_NEW_FRAGMENT_SHADER_CONSTANTS; 711} 712 713/* Delete fragment shader state. */ 714static void r300_delete_fs_state(struct pipe_context* pipe, void* shader) 715{ 716 struct r300_fragment_shader* fs = (struct r300_fragment_shader*)shader; 717 struct r300_fragment_shader_code *tmp, *ptr = fs->first; 718 719 while (ptr) { 720 tmp = ptr; 721 ptr = ptr->next; 722 rc_constants_destroy(&tmp->code.constants); 723 FREE(tmp); 724 } 725 FREE((void*)fs->state.tokens); 726 FREE(shader); 727} 728 729static void r300_set_polygon_stipple(struct pipe_context* pipe, 730 const struct pipe_poly_stipple* state) 731{ 732 /* XXX no idea how to set this up, but not terribly important */ 733} 734 735/* Create a new rasterizer state based on the CSO rasterizer state. 736 * 737 * This is a very large chunk of state, and covers most of the graphics 738 * backend (GB), geometry assembly (GA), and setup unit (SU) blocks. 739 * 740 * In a not entirely unironic sidenote, this state has nearly nothing to do 741 * with the actual block on the Radeon called the rasterizer (RS). */ 742static void* r300_create_rs_state(struct pipe_context* pipe, 743 const struct pipe_rasterizer_state* state) 744{ 745 struct r300_rs_state* rs = CALLOC_STRUCT(r300_rs_state); 746 747 /* Copy rasterizer state for Draw. */ 748 rs->rs = *state; 749 750#ifdef PIPE_ARCH_LITTLE_ENDIAN 751 rs->vap_control_status = R300_VC_NO_SWAP; 752#else 753 rs->vap_control_status = R300_VC_32BIT_SWAP; 754#endif 755 756 /* If no TCL engine is present, turn off the HW TCL. */ 757 if (!r300_screen(pipe->screen)->caps.has_tcl) { 758 rs->vap_control_status |= R300_VAP_TCL_BYPASS; 759 } 760 761 rs->point_size = pack_float_16_6x(state->point_size) | 762 (pack_float_16_6x(state->point_size) << R300_POINTSIZE_X_SHIFT); 763 764 rs->line_control = pack_float_16_6x(state->line_width) | 765 R300_GA_LINE_CNTL_END_TYPE_COMP; 766 767 /* Enable polygon mode */ 768 if (state->fill_cw != PIPE_POLYGON_MODE_FILL || 769 state->fill_ccw != PIPE_POLYGON_MODE_FILL) { 770 rs->polygon_mode = R300_GA_POLY_MODE_DUAL; 771 } 772 773 /* Radeons don't think in "CW/CCW", they think in "front/back". */ 774 if (state->front_winding == PIPE_WINDING_CW) { 775 rs->cull_mode = R300_FRONT_FACE_CW; 776 777 /* Polygon offset */ 778 if (state->offset_cw) { 779 rs->polygon_offset_enable |= R300_FRONT_ENABLE; 780 } 781 if (state->offset_ccw) { 782 rs->polygon_offset_enable |= R300_BACK_ENABLE; 783 } 784 785 /* Polygon mode */ 786 if (rs->polygon_mode) { 787 rs->polygon_mode |= 788 r300_translate_polygon_mode_front(state->fill_cw); 789 rs->polygon_mode |= 790 r300_translate_polygon_mode_back(state->fill_ccw); 791 } 792 } else { 793 rs->cull_mode = R300_FRONT_FACE_CCW; 794 795 /* Polygon offset */ 796 if (state->offset_ccw) { 797 rs->polygon_offset_enable |= R300_FRONT_ENABLE; 798 } 799 if (state->offset_cw) { 800 rs->polygon_offset_enable |= R300_BACK_ENABLE; 801 } 802 803 /* Polygon mode */ 804 if (rs->polygon_mode) { 805 rs->polygon_mode |= 806 r300_translate_polygon_mode_front(state->fill_ccw); 807 rs->polygon_mode |= 808 r300_translate_polygon_mode_back(state->fill_cw); 809 } 810 } 811 if (state->front_winding & state->cull_mode) { 812 rs->cull_mode |= R300_CULL_FRONT; 813 } 814 if (~(state->front_winding) & state->cull_mode) { 815 rs->cull_mode |= R300_CULL_BACK; 816 } 817 818 if (rs->polygon_offset_enable) { 819 rs->depth_offset = state->offset_units; 820 rs->depth_scale = state->offset_scale; 821 } 822 823 if (state->line_stipple_enable) { 824 rs->line_stipple_config = 825 R300_GA_LINE_STIPPLE_CONFIG_LINE_RESET_LINE | 826 (fui((float)state->line_stipple_factor) & 827 R300_GA_LINE_STIPPLE_CONFIG_STIPPLE_SCALE_MASK); 828 /* XXX this might need to be scaled up */ 829 rs->line_stipple_value = state->line_stipple_pattern; 830 } 831 832 if (state->flatshade) { 833 rs->color_control = R300_SHADE_MODEL_FLAT; 834 } else { 835 rs->color_control = R300_SHADE_MODEL_SMOOTH; 836 } 837 838 return (void*)rs; 839} 840 841/* Bind rasterizer state. */ 842static void r300_bind_rs_state(struct pipe_context* pipe, void* state) 843{ 844 struct r300_context* r300 = r300_context(pipe); 845 struct r300_rs_state* rs = (struct r300_rs_state*)state; 846 boolean scissor_was_enabled = r300->scissor_enabled; 847 848 if (r300->draw) { 849 draw_flush(r300->draw); 850 draw_set_rasterizer_state(r300->draw, &rs->rs); 851 } 852 853 if (rs) { 854 r300->polygon_offset_enabled = rs->rs.offset_cw || rs->rs.offset_ccw; 855 r300->scissor_enabled = rs->rs.scissor; 856 } else { 857 r300->polygon_offset_enabled = FALSE; 858 r300->scissor_enabled = FALSE; 859 } 860 861 UPDATE_STATE(state, r300->rs_state); 862 r300->rs_state.size = 17 + (r300->polygon_offset_enabled ? 5 : 0); 863 864 if (scissor_was_enabled != r300->scissor_enabled) { 865 r300->scissor_state.dirty = TRUE; 866 } 867} 868 869/* Free rasterizer state. */ 870static void r300_delete_rs_state(struct pipe_context* pipe, void* state) 871{ 872 FREE(state); 873} 874 875static void* 876 r300_create_sampler_state(struct pipe_context* pipe, 877 const struct pipe_sampler_state* state) 878{ 879 struct r300_context* r300 = r300_context(pipe); 880 struct r300_sampler_state* sampler = CALLOC_STRUCT(r300_sampler_state); 881 boolean is_r500 = r300->screen->caps.is_r500; 882 int lod_bias; 883 union util_color uc; 884 885 sampler->state = *state; 886 887 sampler->filter0 |= 888 (r300_translate_wrap(state->wrap_s) << R300_TX_WRAP_S_SHIFT) | 889 (r300_translate_wrap(state->wrap_t) << R300_TX_WRAP_T_SHIFT) | 890 (r300_translate_wrap(state->wrap_r) << R300_TX_WRAP_R_SHIFT); 891 892 sampler->filter0 |= r300_translate_tex_filters(state->min_img_filter, 893 state->mag_img_filter, 894 state->min_mip_filter, 895 state->max_anisotropy > 0); 896 897 sampler->filter0 |= r300_anisotropy(state->max_anisotropy); 898 899 /* Unfortunately, r300-r500 don't support floating-point mipmap lods. */ 900 /* We must pass these to the merge function to clamp them properly. */ 901 sampler->min_lod = MAX2((unsigned)state->min_lod, 0); 902 sampler->max_lod = MAX2((unsigned)ceilf(state->max_lod), 0); 903 904 lod_bias = CLAMP((int)(state->lod_bias * 32), -(1 << 9), (1 << 9) - 1); 905 906 sampler->filter1 |= lod_bias << R300_LOD_BIAS_SHIFT; 907 908 /* This is very high quality anisotropic filtering for R5xx. 909 * It's good for benchmarking the performance of texturing but 910 * in practice we don't want to slow down the driver because it's 911 * a pretty good performance killer. Feel free to play with it. */ 912 if (DBG_ON(r300, DBG_ANISOHQ) && is_r500) { 913 sampler->filter1 |= r500_anisotropy(state->max_anisotropy); 914 } 915 916 util_pack_color(state->border_color, PIPE_FORMAT_B8G8R8A8_UNORM, &uc); 917 sampler->border_color = uc.ui; 918 919 /* R500-specific fixups and optimizations */ 920 if (r300->screen->caps.is_r500) { 921 sampler->filter1 |= R500_BORDER_FIX; 922 } 923 924 return (void*)sampler; 925} 926 927static void r300_bind_sampler_states(struct pipe_context* pipe, 928 unsigned count, 929 void** states) 930{ 931 struct r300_context* r300 = r300_context(pipe); 932 struct r300_textures_state* state = 933 (struct r300_textures_state*)r300->textures_state.state; 934 unsigned tex_units = r300->screen->caps.num_tex_units; 935 936 if (count > tex_units) { 937 return; 938 } 939 940 memcpy(state->sampler_states, states, sizeof(void*) * count); 941 state->sampler_count = count; 942 943 r300->textures_state.dirty = TRUE; 944 945 /* Pick a fragment shader based on the texture compare state. */ 946 if (r300->fs && count) { 947 if (r300_pick_fragment_shader(r300)) { 948 r300->dirty_state |= R300_NEW_FRAGMENT_SHADER | 949 R300_NEW_FRAGMENT_SHADER_CONSTANTS; 950 } 951 } 952} 953 954static void r300_lacks_vertex_textures(struct pipe_context* pipe, 955 unsigned count, 956 void** states) 957{ 958} 959 960static void r300_delete_sampler_state(struct pipe_context* pipe, void* state) 961{ 962 FREE(state); 963} 964 965static void r300_set_fragment_sampler_views(struct pipe_context* pipe, 966 unsigned count, 967 struct pipe_sampler_view** views) 968{ 969 struct r300_context* r300 = r300_context(pipe); 970 struct r300_textures_state* state = 971 (struct r300_textures_state*)r300->textures_state.state; 972 struct r300_texture *texture; 973 unsigned i; 974 unsigned tex_units = r300->screen->caps.num_tex_units; 975 boolean is_r500 = r300->screen->caps.is_r500; 976 boolean dirty_tex = FALSE; 977 978 if (count > tex_units) { 979 return; 980 } 981 982 for (i = 0; i < count; i++) { 983 if (state->fragment_sampler_views[i] != views[i]) { 984 pipe_sampler_view_reference(&state->fragment_sampler_views[i], 985 views[i]); 986 987 if (!views[i]) { 988 continue; 989 } 990 991 /* A new sampler view (= texture)... */ 992 dirty_tex = TRUE; 993 994 /* R300-specific - set the texrect factor in the fragment shader */ 995 texture = r300_texture(views[i]->texture); 996 if (!is_r500 && texture->uses_pitch) { 997 /* XXX It would be nice to re-emit just 1 constant, 998 * XXX not all of them */ 999 r300->dirty_state |= R300_NEW_FRAGMENT_SHADER_CONSTANTS; 1000 } 1001 } 1002 } 1003 1004 for (i = count; i < tex_units; i++) { 1005 if (state->fragment_sampler_views[i]) { 1006 pipe_sampler_view_reference(&state->fragment_sampler_views[i], 1007 NULL); 1008 } 1009 } 1010 1011 state->texture_count = count; 1012 1013 r300->textures_state.dirty = TRUE; 1014 1015 if (dirty_tex) { 1016 r300->texture_cache_inval.dirty = TRUE; 1017 } 1018} 1019 1020static struct pipe_sampler_view * 1021r300_create_sampler_view(struct pipe_context *pipe, 1022 struct pipe_resource *texture, 1023 const struct pipe_sampler_view *templ) 1024{ 1025 struct pipe_sampler_view *view = CALLOC_STRUCT(pipe_sampler_view); 1026 1027 if (view) { 1028 *view = *templ; 1029 view->reference.count = 1; 1030 view->texture = NULL; 1031 pipe_resource_reference(&view->texture, texture); 1032 view->context = pipe; 1033 } 1034 1035 return view; 1036} 1037 1038static void 1039r300_sampler_view_destroy(struct pipe_context *pipe, 1040 struct pipe_sampler_view *view) 1041{ 1042 pipe_resource_reference(&view->texture, NULL); 1043 FREE(view); 1044} 1045 1046static void r300_set_scissor_state(struct pipe_context* pipe, 1047 const struct pipe_scissor_state* state) 1048{ 1049 struct r300_context* r300 = r300_context(pipe); 1050 1051 memcpy(r300->scissor_state.state, state, 1052 sizeof(struct pipe_scissor_state)); 1053 1054 if (r300->scissor_enabled) { 1055 r300->scissor_state.dirty = TRUE; 1056 } 1057} 1058 1059static void r300_set_viewport_state(struct pipe_context* pipe, 1060 const struct pipe_viewport_state* state) 1061{ 1062 struct r300_context* r300 = r300_context(pipe); 1063 struct r300_viewport_state* viewport = 1064 (struct r300_viewport_state*)r300->viewport_state.state; 1065 1066 r300->viewport = *state; 1067 1068 /* Do the transform in HW. */ 1069 viewport->vte_control = R300_VTX_W0_FMT; 1070 1071 if (state->scale[0] != 1.0f) { 1072 viewport->xscale = state->scale[0]; 1073 viewport->vte_control |= R300_VPORT_X_SCALE_ENA; 1074 } 1075 if (state->scale[1] != 1.0f) { 1076 viewport->yscale = state->scale[1]; 1077 viewport->vte_control |= R300_VPORT_Y_SCALE_ENA; 1078 } 1079 if (state->scale[2] != 1.0f) { 1080 viewport->zscale = state->scale[2]; 1081 viewport->vte_control |= R300_VPORT_Z_SCALE_ENA; 1082 } 1083 if (state->translate[0] != 0.0f) { 1084 viewport->xoffset = state->translate[0]; 1085 viewport->vte_control |= R300_VPORT_X_OFFSET_ENA; 1086 } 1087 if (state->translate[1] != 0.0f) { 1088 viewport->yoffset = state->translate[1]; 1089 viewport->vte_control |= R300_VPORT_Y_OFFSET_ENA; 1090 } 1091 if (state->translate[2] != 0.0f) { 1092 viewport->zoffset = state->translate[2]; 1093 viewport->vte_control |= R300_VPORT_Z_OFFSET_ENA; 1094 } 1095 1096 r300->viewport_state.dirty = TRUE; 1097 if (r300->fs && r300->fs->inputs.wpos != ATTR_UNUSED) { 1098 r300->dirty_state |= R300_NEW_FRAGMENT_SHADER_CONSTANTS; 1099 } 1100} 1101 1102static void r300_set_vertex_buffers(struct pipe_context* pipe, 1103 unsigned count, 1104 const struct pipe_vertex_buffer* buffers) 1105{ 1106 struct r300_context* r300 = r300_context(pipe); 1107 struct pipe_vertex_buffer *vbo; 1108 unsigned i, max_index = (1 << 24) - 1; 1109 boolean any_user_buffer = FALSE; 1110 1111 if (count == r300->vertex_buffer_count && 1112 memcmp(r300->vertex_buffer, buffers, 1113 sizeof(struct pipe_vertex_buffer) * count) == 0) { 1114 return; 1115 } 1116 1117 /* Check if the stride is aligned to the size of DWORD. */ 1118 for (i = 0; i < count; i++) { 1119 if (buffers[i].buffer) { 1120 if (buffers[i].stride % 4 != 0) { 1121 // XXX Shouldn't we align the buffer? 1122 fprintf(stderr, "r300_set_vertex_buffers: " 1123 "Unaligned buffer stride %i isn't supported.\n", 1124 buffers[i].stride); 1125 assert(0); 1126 abort(); 1127 } 1128 } 1129 } 1130 1131 for (i = 0; i < count; i++) { 1132 /* Why, yes, I AM casting away constness. How did you know? */ 1133 vbo = (struct pipe_vertex_buffer*)&buffers[i]; 1134 1135 /* Reference our buffer. */ 1136 pipe_resource_reference(&r300->vertex_buffer[i].buffer, vbo->buffer); 1137 1138 /* Skip NULL buffers */ 1139 if (!buffers[i].buffer) { 1140 continue; 1141 } 1142 1143 if (r300_buffer_is_user_buffer(vbo->buffer)) { 1144 any_user_buffer = TRUE; 1145 } 1146 1147 if (vbo->max_index == ~0) { 1148 /* Bogus value from broken state tracker; hax it. */ 1149 /* TODO - more hax - fixes doom3 from almos on irc */ 1150 if (!vbo->stride) { 1151 fprintf(stderr, "r300: got a VBO with stride 0 fixing up to stide 4\n"); 1152 vbo->stride = 4; 1153 } 1154 vbo->max_index = 1155 (vbo->buffer->width0 - vbo->buffer_offset) / vbo->stride; 1156 } 1157 1158 max_index = MIN2(vbo->max_index, max_index); 1159 } 1160 1161 for (; i < r300->vertex_buffer_count; i++) { 1162 /* Dereference any old buffers. */ 1163 pipe_resource_reference(&r300->vertex_buffer[i].buffer, NULL); 1164 } 1165 1166 memcpy(r300->vertex_buffer, buffers, 1167 sizeof(struct pipe_vertex_buffer) * count); 1168 1169 r300->vertex_buffer_count = count; 1170 r300->vertex_buffer_max_index = max_index; 1171 r300->any_user_vbs = any_user_buffer; 1172 1173 if (r300->draw) { 1174 draw_flush(r300->draw); 1175 draw_set_vertex_buffers(r300->draw, count, buffers); 1176 } 1177} 1178 1179/* Update the PSC tables. */ 1180static void r300_vertex_psc(struct r300_vertex_element_state *velems) 1181{ 1182 struct r300_vertex_stream_state *vstream = &velems->vertex_stream; 1183 uint16_t type, swizzle; 1184 enum pipe_format format; 1185 unsigned i; 1186 1187 assert(velems->count <= 16); 1188 1189 /* Vertex shaders have no semantics on their inputs, 1190 * so PSC should just route stuff based on the vertex elements, 1191 * and not on attrib information. */ 1192 for (i = 0; i < velems->count; i++) { 1193 format = velems->velem[i].src_format; 1194 1195 type = r300_translate_vertex_data_type(format) | 1196 (i << R300_DST_VEC_LOC_SHIFT); 1197 swizzle = r300_translate_vertex_data_swizzle(format); 1198 1199 if (i & 1) { 1200 vstream->vap_prog_stream_cntl[i >> 1] |= type << 16; 1201 vstream->vap_prog_stream_cntl_ext[i >> 1] |= swizzle << 16; 1202 } else { 1203 vstream->vap_prog_stream_cntl[i >> 1] |= type; 1204 vstream->vap_prog_stream_cntl_ext[i >> 1] |= swizzle; 1205 } 1206 } 1207 1208 /* Set the last vector in the PSC. */ 1209 if (i) { 1210 i -= 1; 1211 } 1212 vstream->vap_prog_stream_cntl[i >> 1] |= 1213 (R300_LAST_VEC << (i & 1 ? 16 : 0)); 1214 1215 vstream->count = (i >> 1) + 1; 1216} 1217 1218static void* r300_create_vertex_elements_state(struct pipe_context* pipe, 1219 unsigned count, 1220 const struct pipe_vertex_element* attribs) 1221{ 1222 struct r300_vertex_element_state *velems; 1223 unsigned i, size; 1224 1225 assert(count <= PIPE_MAX_ATTRIBS); 1226 velems = CALLOC_STRUCT(r300_vertex_element_state); 1227 if (velems != NULL) { 1228 velems->count = count; 1229 memcpy(velems->velem, attribs, sizeof(struct pipe_vertex_element) * count); 1230 1231 if (r300_screen(pipe->screen)->caps.has_tcl) { 1232 /* Check if the format is aligned to the size of DWORD. */ 1233 for (i = 0; i < count; i++) { 1234 size = util_format_get_blocksize(attribs[i].src_format); 1235 1236 if (size % 4 != 0) { 1237 /* XXX Shouldn't we align the format? */ 1238 fprintf(stderr, "r300_create_vertex_elements_state: " 1239 "Unaligned format %s:%i isn't supported\n", 1240 util_format_name(attribs[i].src_format), size); 1241 assert(0); 1242 abort(); 1243 } 1244 } 1245 1246 r300_vertex_psc(velems); 1247 } 1248 } 1249 return velems; 1250} 1251 1252static void r300_bind_vertex_elements_state(struct pipe_context *pipe, 1253 void *state) 1254{ 1255 struct r300_context *r300 = r300_context(pipe); 1256 struct r300_vertex_element_state *velems = state; 1257 1258 if (velems == NULL) { 1259 return; 1260 } 1261 1262 r300->velems = velems; 1263 1264 if (r300->draw) { 1265 draw_flush(r300->draw); 1266 draw_set_vertex_elements(r300->draw, velems->count, velems->velem); 1267 } 1268 1269 UPDATE_STATE(&velems->vertex_stream, r300->vertex_stream_state); 1270 r300->vertex_stream_state.size = (1 + velems->vertex_stream.count) * 2; 1271} 1272 1273static void r300_delete_vertex_elements_state(struct pipe_context *pipe, void *state) 1274{ 1275 FREE(state); 1276} 1277 1278static void* r300_create_vs_state(struct pipe_context* pipe, 1279 const struct pipe_shader_state* shader) 1280{ 1281 struct r300_context* r300 = r300_context(pipe); 1282 1283 struct r300_vertex_shader* vs = CALLOC_STRUCT(r300_vertex_shader); 1284 r300_vertex_shader_common_init(vs, shader); 1285 1286 if (r300->screen->caps.has_tcl) { 1287 r300_translate_vertex_shader(r300, vs); 1288 } else { 1289 vs->draw_vs = draw_create_vertex_shader(r300->draw, shader); 1290 } 1291 1292 return vs; 1293} 1294 1295static void r300_bind_vs_state(struct pipe_context* pipe, void* shader) 1296{ 1297 struct r300_context* r300 = r300_context(pipe); 1298 struct r300_vertex_shader* vs = (struct r300_vertex_shader*)shader; 1299 1300 if (vs == NULL) { 1301 r300->vs_state.state = NULL; 1302 return; 1303 } 1304 if (vs == r300->vs_state.state) { 1305 return; 1306 } 1307 r300->vs_state.state = vs; 1308 1309 // VS output mapping for HWTCL or stream mapping for SWTCL to the RS block 1310 if (r300->fs) { 1311 r300_vertex_shader_setup_wpos(r300); 1312 } 1313 memcpy(r300->vap_output_state.state, &vs->vap_out, 1314 sizeof(struct r300_vap_output_state)); 1315 r300->vap_output_state.dirty = TRUE; 1316 1317 /* The majority of the RS block bits is dependent on the vertex shader. */ 1318 r300->rs_block_state.dirty = TRUE; /* Will be updated before the emission. */ 1319 1320 if (r300->screen->caps.has_tcl) { 1321 r300->vs_state.dirty = TRUE; 1322 r300->vs_state.size = vs->code.length + 9; 1323 1324 r300->pvs_flush.dirty = TRUE; 1325 1326 r300->dirty_state |= R300_NEW_VERTEX_SHADER_CONSTANTS; 1327 } else { 1328 draw_flush(r300->draw); 1329 draw_bind_vertex_shader(r300->draw, 1330 (struct draw_vertex_shader*)vs->draw_vs); 1331 } 1332} 1333 1334static void r300_delete_vs_state(struct pipe_context* pipe, void* shader) 1335{ 1336 struct r300_context* r300 = r300_context(pipe); 1337 struct r300_vertex_shader* vs = (struct r300_vertex_shader*)shader; 1338 1339 if (r300->screen->caps.has_tcl) { 1340 rc_constants_destroy(&vs->code.constants); 1341 } else { 1342 draw_delete_vertex_shader(r300->draw, 1343 (struct draw_vertex_shader*)vs->draw_vs); 1344 } 1345 1346 FREE((void*)vs->state.tokens); 1347 FREE(shader); 1348} 1349 1350static void r300_set_constant_buffer(struct pipe_context *pipe, 1351 uint shader, uint index, 1352 struct pipe_resource *buf) 1353{ 1354 struct r300_context* r300 = r300_context(pipe); 1355 struct pipe_transfer *tr; 1356 void *mapped; 1357 int max_size = 0; 1358 1359 if (buf == NULL || buf->width0 == 0 || 1360 (mapped = pipe_buffer_map(pipe, buf, PIPE_TRANSFER_READ, &tr)) == NULL) 1361 { 1362 r300->shader_constants[shader].count = 0; 1363 return; 1364 } 1365 1366 assert((buf->width0 % 4 * sizeof(float)) == 0); 1367 1368 /* Check the size of the constant buffer. */ 1369 switch (shader) { 1370 case PIPE_SHADER_VERTEX: 1371 max_size = 256; 1372 break; 1373 case PIPE_SHADER_FRAGMENT: 1374 if (r300->screen->caps.is_r500) { 1375 max_size = 256; 1376 /* XXX Implement emission of r400's extended constant buffer. */ 1377 /*} else if (r300->screen->caps.is_r400) { 1378 max_size = 64;*/ 1379 } else { 1380 max_size = 32; 1381 } 1382 break; 1383 default: 1384 assert(0); 1385 } 1386 1387 /* XXX Subtract immediates and RC_STATE_* variables. */ 1388 if (buf->width0 > (sizeof(float) * 4 * max_size)) { 1389 fprintf(stderr, "r300: Max size of the constant buffer is " 1390 "%i*4 floats.\n", max_size); 1391 abort(); 1392 } 1393 1394 memcpy(r300->shader_constants[shader].constants, mapped, buf->width0); 1395 r300->shader_constants[shader].count = buf->width0 / (4 * sizeof(float)); 1396 pipe_buffer_unmap(pipe, buf, tr); 1397 1398 if (shader == PIPE_SHADER_VERTEX) { 1399 if (r300->screen->caps.has_tcl) { 1400 r300->dirty_state |= R300_NEW_VERTEX_SHADER_CONSTANTS; 1401 r300->pvs_flush.dirty = TRUE; 1402 } else if (r300->draw) { 1403 draw_set_mapped_constant_buffer(r300->draw, PIPE_SHADER_VERTEX, 1404 0, r300->shader_constants[PIPE_SHADER_VERTEX].constants, 1405 buf->width0); 1406 } 1407 } else if (shader == PIPE_SHADER_FRAGMENT) { 1408 r300->dirty_state |= R300_NEW_FRAGMENT_SHADER_CONSTANTS; 1409 } 1410} 1411 1412void r300_init_state_functions(struct r300_context* r300) 1413{ 1414 r300->context.create_blend_state = r300_create_blend_state; 1415 r300->context.bind_blend_state = r300_bind_blend_state; 1416 r300->context.delete_blend_state = r300_delete_blend_state; 1417 1418 r300->context.set_blend_color = r300_set_blend_color; 1419 1420 r300->context.set_clip_state = r300_set_clip_state; 1421 1422 r300->context.set_constant_buffer = r300_set_constant_buffer; 1423 1424 r300->context.create_depth_stencil_alpha_state = r300_create_dsa_state; 1425 r300->context.bind_depth_stencil_alpha_state = r300_bind_dsa_state; 1426 r300->context.delete_depth_stencil_alpha_state = r300_delete_dsa_state; 1427 1428 r300->context.set_stencil_ref = r300_set_stencil_ref; 1429 1430 r300->context.set_framebuffer_state = r300_set_framebuffer_state; 1431 1432 r300->context.create_fs_state = r300_create_fs_state; 1433 r300->context.bind_fs_state = r300_bind_fs_state; 1434 r300->context.delete_fs_state = r300_delete_fs_state; 1435 1436 r300->context.set_polygon_stipple = r300_set_polygon_stipple; 1437 1438 r300->context.create_rasterizer_state = r300_create_rs_state; 1439 r300->context.bind_rasterizer_state = r300_bind_rs_state; 1440 r300->context.delete_rasterizer_state = r300_delete_rs_state; 1441 1442 r300->context.create_sampler_state = r300_create_sampler_state; 1443 r300->context.bind_fragment_sampler_states = r300_bind_sampler_states; 1444 r300->context.bind_vertex_sampler_states = r300_lacks_vertex_textures; 1445 r300->context.delete_sampler_state = r300_delete_sampler_state; 1446 1447 r300->context.set_fragment_sampler_views = r300_set_fragment_sampler_views; 1448 r300->context.create_sampler_view = r300_create_sampler_view; 1449 r300->context.sampler_view_destroy = r300_sampler_view_destroy; 1450 1451 r300->context.set_scissor_state = r300_set_scissor_state; 1452 1453 r300->context.set_viewport_state = r300_set_viewport_state; 1454 1455 r300->context.set_vertex_buffers = r300_set_vertex_buffers; 1456 1457 r300->context.create_vertex_elements_state = r300_create_vertex_elements_state; 1458 r300->context.bind_vertex_elements_state = r300_bind_vertex_elements_state; 1459 r300->context.delete_vertex_elements_state = r300_delete_vertex_elements_state; 1460 1461 r300->context.create_vs_state = r300_create_vs_state; 1462 r300->context.bind_vs_state = r300_bind_vs_state; 1463 r300->context.delete_vs_state = r300_delete_vs_state; 1464} 1465