r300_state.c revision 3ce4375912c8ea488460e593e07c5bb15b92dca9
1/* 2 * Copyright 2008 Corbin Simpson <MostAwesomeDude@gmail.com> 3 * Copyright 2009 Marek Olšák <maraeo@gmail.com> 4 * 5 * Permission is hereby granted, free of charge, to any person obtaining a 6 * copy of this software and associated documentation files (the "Software"), 7 * to deal in the Software without restriction, including without limitation 8 * on the rights to use, copy, modify, merge, publish, distribute, sub 9 * license, and/or sell copies of the Software, and to permit persons to whom 10 * the Software is furnished to do so, subject to the following conditions: 11 * 12 * The above copyright notice and this permission notice (including the next 13 * paragraph) shall be included in all copies or substantial portions of the 14 * Software. 15 * 16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL 19 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, 20 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR 21 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE 22 * USE OR OTHER DEALINGS IN THE SOFTWARE. */ 23 24#include "draw/draw_context.h" 25 26#include "util/u_math.h" 27#include "util/u_memory.h" 28#include "util/u_pack_color.h" 29 30#include "tgsi/tgsi_parse.h" 31 32#include "pipe/p_config.h" 33 34#include "r300_context.h" 35#include "r300_reg.h" 36#include "r300_screen.h" 37#include "r300_state_inlines.h" 38#include "r300_fs.h" 39#include "r300_vs.h" 40 41#include "radeon_winsys.h" 42 43/* r300_state: Functions used to intialize state context by translating 44 * Gallium state objects into semi-native r300 state objects. */ 45 46#define UPDATE_STATE(cso, atom) \ 47 if (cso != atom.state) { \ 48 atom.state = cso; \ 49 atom.dirty = TRUE; \ 50 } 51 52static boolean blend_discard_if_src_alpha_0(unsigned srcRGB, unsigned srcA, 53 unsigned dstRGB, unsigned dstA) 54{ 55 /* If the blend equation is ADD or REVERSE_SUBTRACT, 56 * SRC_ALPHA == 0, and the following state is set, the colorbuffer 57 * will not be changed. 58 * Notice that the dst factors are the src factors inverted. */ 59 return (srcRGB == PIPE_BLENDFACTOR_SRC_ALPHA || 60 srcRGB == PIPE_BLENDFACTOR_SRC_ALPHA_SATURATE || 61 srcRGB == PIPE_BLENDFACTOR_ZERO) && 62 (srcA == PIPE_BLENDFACTOR_SRC_COLOR || 63 srcA == PIPE_BLENDFACTOR_SRC_ALPHA || 64 srcA == PIPE_BLENDFACTOR_SRC_ALPHA_SATURATE || 65 srcA == PIPE_BLENDFACTOR_ZERO) && 66 (dstRGB == PIPE_BLENDFACTOR_INV_SRC_ALPHA || 67 dstRGB == PIPE_BLENDFACTOR_ONE) && 68 (dstA == PIPE_BLENDFACTOR_INV_SRC_COLOR || 69 dstA == PIPE_BLENDFACTOR_INV_SRC_ALPHA || 70 dstA == PIPE_BLENDFACTOR_ONE); 71} 72 73static boolean blend_discard_if_src_alpha_1(unsigned srcRGB, unsigned srcA, 74 unsigned dstRGB, unsigned dstA) 75{ 76 /* If the blend equation is ADD or REVERSE_SUBTRACT, 77 * SRC_ALPHA == 1, and the following state is set, the colorbuffer 78 * will not be changed. 79 * Notice that the dst factors are the src factors inverted. */ 80 return (srcRGB == PIPE_BLENDFACTOR_INV_SRC_ALPHA || 81 srcRGB == PIPE_BLENDFACTOR_ZERO) && 82 (srcA == PIPE_BLENDFACTOR_INV_SRC_COLOR || 83 srcA == PIPE_BLENDFACTOR_INV_SRC_ALPHA || 84 srcA == PIPE_BLENDFACTOR_ZERO) && 85 (dstRGB == PIPE_BLENDFACTOR_SRC_ALPHA || 86 dstRGB == PIPE_BLENDFACTOR_ONE) && 87 (dstA == PIPE_BLENDFACTOR_SRC_COLOR || 88 dstA == PIPE_BLENDFACTOR_SRC_ALPHA || 89 dstA == PIPE_BLENDFACTOR_ONE); 90} 91 92static boolean blend_discard_if_src_color_0(unsigned srcRGB, unsigned srcA, 93 unsigned dstRGB, unsigned dstA) 94{ 95 /* If the blend equation is ADD or REVERSE_SUBTRACT, 96 * SRC_COLOR == (0,0,0), and the following state is set, the colorbuffer 97 * will not be changed. 98 * Notice that the dst factors are the src factors inverted. */ 99 return (srcRGB == PIPE_BLENDFACTOR_SRC_COLOR || 100 srcRGB == PIPE_BLENDFACTOR_ZERO) && 101 (srcA == PIPE_BLENDFACTOR_ZERO) && 102 (dstRGB == PIPE_BLENDFACTOR_INV_SRC_COLOR || 103 dstRGB == PIPE_BLENDFACTOR_ONE) && 104 (dstA == PIPE_BLENDFACTOR_ONE); 105} 106 107static boolean blend_discard_if_src_color_1(unsigned srcRGB, unsigned srcA, 108 unsigned dstRGB, unsigned dstA) 109{ 110 /* If the blend equation is ADD or REVERSE_SUBTRACT, 111 * SRC_COLOR == (1,1,1), and the following state is set, the colorbuffer 112 * will not be changed. 113 * Notice that the dst factors are the src factors inverted. */ 114 return (srcRGB == PIPE_BLENDFACTOR_INV_SRC_COLOR || 115 srcRGB == PIPE_BLENDFACTOR_ZERO) && 116 (srcA == PIPE_BLENDFACTOR_ZERO) && 117 (dstRGB == PIPE_BLENDFACTOR_SRC_COLOR || 118 dstRGB == PIPE_BLENDFACTOR_ONE) && 119 (dstA == PIPE_BLENDFACTOR_ONE); 120} 121 122static boolean blend_discard_if_src_alpha_color_0(unsigned srcRGB, unsigned srcA, 123 unsigned dstRGB, unsigned dstA) 124{ 125 /* If the blend equation is ADD or REVERSE_SUBTRACT, 126 * SRC_ALPHA_COLOR == (0,0,0,0), and the following state is set, 127 * the colorbuffer will not be changed. 128 * Notice that the dst factors are the src factors inverted. */ 129 return (srcRGB == PIPE_BLENDFACTOR_SRC_COLOR || 130 srcRGB == PIPE_BLENDFACTOR_SRC_ALPHA || 131 srcRGB == PIPE_BLENDFACTOR_SRC_ALPHA_SATURATE || 132 srcRGB == PIPE_BLENDFACTOR_ZERO) && 133 (srcA == PIPE_BLENDFACTOR_SRC_COLOR || 134 srcA == PIPE_BLENDFACTOR_SRC_ALPHA || 135 srcA == PIPE_BLENDFACTOR_SRC_ALPHA_SATURATE || 136 srcA == PIPE_BLENDFACTOR_ZERO) && 137 (dstRGB == PIPE_BLENDFACTOR_INV_SRC_COLOR || 138 dstRGB == PIPE_BLENDFACTOR_INV_SRC_ALPHA || 139 dstRGB == PIPE_BLENDFACTOR_ONE) && 140 (dstA == PIPE_BLENDFACTOR_INV_SRC_COLOR || 141 dstA == PIPE_BLENDFACTOR_INV_SRC_ALPHA || 142 dstA == PIPE_BLENDFACTOR_ONE); 143} 144 145static boolean blend_discard_if_src_alpha_color_1(unsigned srcRGB, unsigned srcA, 146 unsigned dstRGB, unsigned dstA) 147{ 148 /* If the blend equation is ADD or REVERSE_SUBTRACT, 149 * SRC_ALPHA_COLOR == (1,1,1,1), and the following state is set, 150 * the colorbuffer will not be changed. 151 * Notice that the dst factors are the src factors inverted. */ 152 return (srcRGB == PIPE_BLENDFACTOR_INV_SRC_COLOR || 153 srcRGB == PIPE_BLENDFACTOR_INV_SRC_ALPHA || 154 srcRGB == PIPE_BLENDFACTOR_ZERO) && 155 (srcA == PIPE_BLENDFACTOR_INV_SRC_COLOR || 156 srcA == PIPE_BLENDFACTOR_INV_SRC_ALPHA || 157 srcA == PIPE_BLENDFACTOR_ZERO) && 158 (dstRGB == PIPE_BLENDFACTOR_SRC_COLOR || 159 dstRGB == PIPE_BLENDFACTOR_SRC_ALPHA || 160 dstRGB == PIPE_BLENDFACTOR_ONE) && 161 (dstA == PIPE_BLENDFACTOR_SRC_COLOR || 162 dstA == PIPE_BLENDFACTOR_SRC_ALPHA || 163 dstA == PIPE_BLENDFACTOR_ONE); 164} 165 166static unsigned bgra_cmask(unsigned mask) 167{ 168 /* Gallium uses RGBA color ordering while R300 expects BGRA. */ 169 170 return ((mask & PIPE_MASK_R) << 2) | 171 ((mask & PIPE_MASK_B) >> 2) | 172 (mask & (PIPE_MASK_G | PIPE_MASK_A)); 173} 174 175/* Create a new blend state based on the CSO blend state. 176 * 177 * This encompasses alpha blending, logic/raster ops, and blend dithering. */ 178static void* r300_create_blend_state(struct pipe_context* pipe, 179 const struct pipe_blend_state* state) 180{ 181 struct r300_screen* r300screen = r300_screen(pipe->screen); 182 struct r300_blend_state* blend = CALLOC_STRUCT(r300_blend_state); 183 184 if (state->rt[0].blend_enable) 185 { 186 unsigned eqRGB = state->rt[0].rgb_func; 187 unsigned srcRGB = state->rt[0].rgb_src_factor; 188 unsigned dstRGB = state->rt[0].rgb_dst_factor; 189 190 unsigned eqA = state->rt[0].alpha_func; 191 unsigned srcA = state->rt[0].alpha_src_factor; 192 unsigned dstA = state->rt[0].alpha_dst_factor; 193 194 /* despite the name, ALPHA_BLEND_ENABLE has nothing to do with alpha, 195 * this is just the crappy D3D naming */ 196 blend->blend_control = R300_ALPHA_BLEND_ENABLE | 197 r300_translate_blend_function(eqRGB) | 198 ( r300_translate_blend_factor(srcRGB) << R300_SRC_BLEND_SHIFT) | 199 ( r300_translate_blend_factor(dstRGB) << R300_DST_BLEND_SHIFT); 200 201 /* Optimization: some operations do not require the destination color. 202 * 203 * When SRC_ALPHA_SATURATE is used, colorbuffer reads must be enabled, 204 * otherwise blending gives incorrect results. It seems to be 205 * a hardware bug. */ 206 if (eqRGB == PIPE_BLEND_MIN || eqA == PIPE_BLEND_MIN || 207 eqRGB == PIPE_BLEND_MAX || eqA == PIPE_BLEND_MAX || 208 dstRGB != PIPE_BLENDFACTOR_ZERO || 209 dstA != PIPE_BLENDFACTOR_ZERO || 210 srcRGB == PIPE_BLENDFACTOR_DST_COLOR || 211 srcRGB == PIPE_BLENDFACTOR_DST_ALPHA || 212 srcRGB == PIPE_BLENDFACTOR_INV_DST_COLOR || 213 srcRGB == PIPE_BLENDFACTOR_INV_DST_ALPHA || 214 srcA == PIPE_BLENDFACTOR_DST_COLOR || 215 srcA == PIPE_BLENDFACTOR_DST_ALPHA || 216 srcA == PIPE_BLENDFACTOR_INV_DST_COLOR || 217 srcA == PIPE_BLENDFACTOR_INV_DST_ALPHA || 218 srcRGB == PIPE_BLENDFACTOR_SRC_ALPHA_SATURATE) { 219 /* Enable reading from the colorbuffer. */ 220 blend->blend_control |= R300_READ_ENABLE; 221 222 if (r300_screen(r300_context(pipe)->context.screen)->caps->is_r500) { 223 /* Optimization: Depending on incoming pixels, we can 224 * conditionally disable the reading in hardware... */ 225 if (eqRGB != PIPE_BLEND_MIN && eqA != PIPE_BLEND_MIN && 226 eqRGB != PIPE_BLEND_MAX && eqA != PIPE_BLEND_MAX) { 227 /* Disable reading if SRC_ALPHA == 0. */ 228 if ((dstRGB == PIPE_BLENDFACTOR_SRC_ALPHA || 229 dstRGB == PIPE_BLENDFACTOR_ZERO) && 230 (dstA == PIPE_BLENDFACTOR_SRC_COLOR || 231 dstA == PIPE_BLENDFACTOR_SRC_ALPHA || 232 dstA == PIPE_BLENDFACTOR_ZERO)) { 233 blend->blend_control |= R500_SRC_ALPHA_0_NO_READ; 234 } 235 236 /* Disable reading if SRC_ALPHA == 1. */ 237 if ((dstRGB == PIPE_BLENDFACTOR_INV_SRC_ALPHA || 238 dstRGB == PIPE_BLENDFACTOR_ZERO) && 239 (dstA == PIPE_BLENDFACTOR_INV_SRC_COLOR || 240 dstA == PIPE_BLENDFACTOR_INV_SRC_ALPHA || 241 dstA == PIPE_BLENDFACTOR_ZERO)) { 242 blend->blend_control |= R500_SRC_ALPHA_1_NO_READ; 243 } 244 } 245 } 246 } 247 248 /* Optimization: discard pixels which don't change the colorbuffer. 249 * 250 * The code below is non-trivial and some math is involved. 251 * 252 * Discarding pixels must be disabled when FP16 AA is enabled. 253 * This is a hardware bug. Also, this implementation wouldn't work 254 * with FP blending enabled and equation clamping disabled. 255 * 256 * Equations other than ADD are rarely used and therefore won't be 257 * optimized. */ 258 if ((eqRGB == PIPE_BLEND_ADD || eqRGB == PIPE_BLEND_REVERSE_SUBTRACT) && 259 (eqA == PIPE_BLEND_ADD || eqA == PIPE_BLEND_REVERSE_SUBTRACT)) { 260 /* ADD: X+Y 261 * REVERSE_SUBTRACT: Y-X 262 * 263 * The idea is: 264 * If X = src*srcFactor = 0 and Y = dst*dstFactor = 1, 265 * then CB will not be changed. 266 * 267 * Given the srcFactor and dstFactor variables, we can derive 268 * what src and dst should be equal to and discard appropriate 269 * pixels. 270 */ 271 if (blend_discard_if_src_alpha_0(srcRGB, srcA, dstRGB, dstA)) { 272 blend->blend_control |= R300_DISCARD_SRC_PIXELS_SRC_ALPHA_0; 273 } else if (blend_discard_if_src_alpha_1(srcRGB, srcA, 274 dstRGB, dstA)) { 275 blend->blend_control |= R300_DISCARD_SRC_PIXELS_SRC_ALPHA_1; 276 } else if (blend_discard_if_src_color_0(srcRGB, srcA, 277 dstRGB, dstA)) { 278 blend->blend_control |= R300_DISCARD_SRC_PIXELS_SRC_COLOR_0; 279 } else if (blend_discard_if_src_color_1(srcRGB, srcA, 280 dstRGB, dstA)) { 281 blend->blend_control |= R300_DISCARD_SRC_PIXELS_SRC_COLOR_1; 282 } else if (blend_discard_if_src_alpha_color_0(srcRGB, srcA, 283 dstRGB, dstA)) { 284 blend->blend_control |= 285 R300_DISCARD_SRC_PIXELS_SRC_ALPHA_COLOR_0; 286 } else if (blend_discard_if_src_alpha_color_1(srcRGB, srcA, 287 dstRGB, dstA)) { 288 blend->blend_control |= 289 R300_DISCARD_SRC_PIXELS_SRC_ALPHA_COLOR_1; 290 } 291 } 292 293 /* separate alpha */ 294 if (srcA != srcRGB || dstA != dstRGB || eqA != eqRGB) { 295 blend->blend_control |= R300_SEPARATE_ALPHA_ENABLE; 296 blend->alpha_blend_control = 297 r300_translate_blend_function(eqA) | 298 (r300_translate_blend_factor(srcA) << R300_SRC_BLEND_SHIFT) | 299 (r300_translate_blend_factor(dstA) << R300_DST_BLEND_SHIFT); 300 } 301 } 302 303 /* PIPE_LOGICOP_* don't need to be translated, fortunately. */ 304 if (state->logicop_enable) { 305 blend->rop = R300_RB3D_ROPCNTL_ROP_ENABLE | 306 (state->logicop_func) << R300_RB3D_ROPCNTL_ROP_SHIFT; 307 } 308 309 /* Color channel masks for all MRTs. */ 310 blend->color_channel_mask = bgra_cmask(state->rt[0].colormask); 311 if (r300screen->caps->is_r500 && state->independent_blend_enable) { 312 if (state->rt[1].blend_enable) { 313 blend->color_channel_mask |= bgra_cmask(state->rt[1].colormask) << 4; 314 } 315 if (state->rt[2].blend_enable) { 316 blend->color_channel_mask |= bgra_cmask(state->rt[2].colormask) << 8; 317 } 318 if (state->rt[3].blend_enable) { 319 blend->color_channel_mask |= bgra_cmask(state->rt[3].colormask) << 12; 320 } 321 } 322 323 if (state->dither) { 324 blend->dither = R300_RB3D_DITHER_CTL_DITHER_MODE_LUT | 325 R300_RB3D_DITHER_CTL_ALPHA_DITHER_MODE_LUT; 326 } 327 328 return (void*)blend; 329} 330 331/* Bind blend state. */ 332static void r300_bind_blend_state(struct pipe_context* pipe, 333 void* state) 334{ 335 struct r300_context* r300 = r300_context(pipe); 336 337 UPDATE_STATE(state, r300->blend_state); 338} 339 340/* Free blend state. */ 341static void r300_delete_blend_state(struct pipe_context* pipe, 342 void* state) 343{ 344 FREE(state); 345} 346 347/* Convert float to 10bit integer */ 348static unsigned float_to_fixed10(float f) 349{ 350 return CLAMP((unsigned)(f * 1023.9f), 0, 1023); 351} 352 353/* Set blend color. 354 * Setup both R300 and R500 registers, figure out later which one to write. */ 355static void r300_set_blend_color(struct pipe_context* pipe, 356 const struct pipe_blend_color* color) 357{ 358 struct r300_context* r300 = r300_context(pipe); 359 struct r300_screen* r300screen = r300_screen(pipe->screen); 360 struct r300_blend_color_state* state = 361 (struct r300_blend_color_state*)r300->blend_color_state.state; 362 union util_color uc; 363 364 util_pack_color(color->color, PIPE_FORMAT_B8G8R8A8_UNORM, &uc); 365 state->blend_color = uc.ui; 366 367 /* XXX if FP16 blending is enabled, we should use the FP16 format */ 368 state->blend_color_red_alpha = 369 float_to_fixed10(color->color[0]) | 370 (float_to_fixed10(color->color[3]) << 16); 371 state->blend_color_green_blue = 372 float_to_fixed10(color->color[2]) | 373 (float_to_fixed10(color->color[1]) << 16); 374 375 r300->blend_color_state.size = r300screen->caps->is_r500 ? 3 : 2; 376 r300->blend_color_state.dirty = TRUE; 377} 378 379static void r300_set_clip_state(struct pipe_context* pipe, 380 const struct pipe_clip_state* state) 381{ 382 struct r300_context* r300 = r300_context(pipe); 383 384 r300->clip = *state; 385 386 if (r300_screen(pipe->screen)->caps->has_tcl) { 387 memcpy(r300->clip_state.state, state, sizeof(struct pipe_clip_state)); 388 r300->clip_state.size = 29; 389 } else { 390 draw_flush(r300->draw); 391 draw_set_clip_state(r300->draw, state); 392 r300->clip_state.size = 2; 393 } 394 395 r300->clip_state.dirty = TRUE; 396} 397 398/* Create a new depth, stencil, and alpha state based on the CSO dsa state. 399 * 400 * This contains the depth buffer, stencil buffer, alpha test, and such. 401 * On the Radeon, depth and stencil buffer setup are intertwined, which is 402 * the reason for some of the strange-looking assignments across registers. */ 403static void* 404 r300_create_dsa_state(struct pipe_context* pipe, 405 const struct pipe_depth_stencil_alpha_state* state) 406{ 407 struct r300_capabilities *caps = 408 r300_screen(r300_context(pipe)->context.screen)->caps; 409 struct r300_dsa_state* dsa = CALLOC_STRUCT(r300_dsa_state); 410 411 /* Depth test setup. */ 412 if (state->depth.enabled) { 413 dsa->z_buffer_control |= R300_Z_ENABLE; 414 415 if (state->depth.writemask) { 416 dsa->z_buffer_control |= R300_Z_WRITE_ENABLE; 417 } 418 419 dsa->z_stencil_control |= 420 (r300_translate_depth_stencil_function(state->depth.func) << 421 R300_Z_FUNC_SHIFT); 422 } 423 424 /* Stencil buffer setup. */ 425 if (state->stencil[0].enabled) { 426 dsa->z_buffer_control |= R300_STENCIL_ENABLE; 427 dsa->z_stencil_control |= 428 (r300_translate_depth_stencil_function(state->stencil[0].func) << 429 R300_S_FRONT_FUNC_SHIFT) | 430 (r300_translate_stencil_op(state->stencil[0].fail_op) << 431 R300_S_FRONT_SFAIL_OP_SHIFT) | 432 (r300_translate_stencil_op(state->stencil[0].zpass_op) << 433 R300_S_FRONT_ZPASS_OP_SHIFT) | 434 (r300_translate_stencil_op(state->stencil[0].zfail_op) << 435 R300_S_FRONT_ZFAIL_OP_SHIFT); 436 437 dsa->stencil_ref_mask = 438 (state->stencil[0].valuemask << R300_STENCILMASK_SHIFT) | 439 (state->stencil[0].writemask << R300_STENCILWRITEMASK_SHIFT); 440 441 if (state->stencil[1].enabled) { 442 dsa->z_buffer_control |= R300_STENCIL_FRONT_BACK; 443 dsa->z_stencil_control |= 444 (r300_translate_depth_stencil_function(state->stencil[1].func) << 445 R300_S_BACK_FUNC_SHIFT) | 446 (r300_translate_stencil_op(state->stencil[1].fail_op) << 447 R300_S_BACK_SFAIL_OP_SHIFT) | 448 (r300_translate_stencil_op(state->stencil[1].zpass_op) << 449 R300_S_BACK_ZPASS_OP_SHIFT) | 450 (r300_translate_stencil_op(state->stencil[1].zfail_op) << 451 R300_S_BACK_ZFAIL_OP_SHIFT); 452 453 if (caps->is_r500) 454 { 455 dsa->z_buffer_control |= R500_STENCIL_REFMASK_FRONT_BACK; 456 dsa->stencil_ref_bf = 457 (state->stencil[1].valuemask << 458 R300_STENCILMASK_SHIFT) | 459 (state->stencil[1].writemask << 460 R300_STENCILWRITEMASK_SHIFT); 461 } 462 } 463 } 464 465 /* Alpha test setup. */ 466 if (state->alpha.enabled) { 467 dsa->alpha_function = 468 r300_translate_alpha_function(state->alpha.func) | 469 R300_FG_ALPHA_FUNC_ENABLE; 470 471 /* We could use 10bit alpha ref but who needs that? */ 472 dsa->alpha_function |= float_to_ubyte(state->alpha.ref_value); 473 474 if (caps->is_r500) 475 dsa->alpha_function |= R500_FG_ALPHA_FUNC_8BIT; 476 } 477 478 return (void*)dsa; 479} 480 481/* Bind DSA state. */ 482static void r300_bind_dsa_state(struct pipe_context* pipe, 483 void* state) 484{ 485 struct r300_context* r300 = r300_context(pipe); 486 487 UPDATE_STATE(state, r300->dsa_state); 488} 489 490/* Free DSA state. */ 491static void r300_delete_dsa_state(struct pipe_context* pipe, 492 void* state) 493{ 494 FREE(state); 495} 496 497static void r300_set_stencil_ref(struct pipe_context* pipe, 498 const struct pipe_stencil_ref* sr) 499{ 500 struct r300_context* r300 = r300_context(pipe); 501 r300->stencil_ref = *sr; 502 r300->dsa_state.dirty = TRUE; 503} 504 505/* This switcheroo is needed just because of goddamned MACRO_SWITCH. */ 506static void r300_fb_update_tiling_flags(struct r300_context *r300, 507 const struct pipe_framebuffer_state *old_state, 508 const struct pipe_framebuffer_state *new_state) 509{ 510 struct r300_texture *tex; 511 unsigned i, j, level; 512 513 /* Reset tiling flags for old surfaces to default values. */ 514 for (i = 0; i < old_state->nr_cbufs; i++) { 515 for (j = 0; j < new_state->nr_cbufs; j++) { 516 if (old_state->cbufs[i]->texture == new_state->cbufs[j]->texture) { 517 break; 518 } 519 } 520 /* If not binding the surface again... */ 521 if (j != new_state->nr_cbufs) { 522 continue; 523 } 524 525 tex = (struct r300_texture*)old_state->cbufs[i]->texture; 526 527 if (tex) { 528 r300->winsys->buffer_set_tiling(r300->winsys, tex->buffer, 529 tex->pitch[0], 530 tex->microtile != 0, 531 tex->macrotile != 0); 532 } 533 } 534 if (old_state->zsbuf && 535 (!new_state->zsbuf || 536 old_state->zsbuf->texture != new_state->zsbuf->texture)) { 537 tex = (struct r300_texture*)old_state->zsbuf->texture; 538 539 if (tex) { 540 r300->winsys->buffer_set_tiling(r300->winsys, tex->buffer, 541 tex->pitch[0], 542 tex->microtile != 0, 543 tex->macrotile != 0); 544 } 545 } 546 547 /* Set tiling flags for new surfaces. */ 548 for (i = 0; i < new_state->nr_cbufs; i++) { 549 tex = (struct r300_texture*)new_state->cbufs[i]->texture; 550 level = new_state->cbufs[i]->level; 551 552 r300->winsys->buffer_set_tiling(r300->winsys, tex->buffer, 553 tex->pitch[level], 554 tex->microtile != 0, 555 tex->mip_macrotile[level] != 0); 556 } 557 if (new_state->zsbuf) { 558 tex = (struct r300_texture*)new_state->zsbuf->texture; 559 level = new_state->zsbuf->level; 560 561 r300->winsys->buffer_set_tiling(r300->winsys, tex->buffer, 562 tex->pitch[level], 563 tex->microtile != 0, 564 tex->mip_macrotile[level] != 0); 565 } 566} 567 568static void 569 r300_set_framebuffer_state(struct pipe_context* pipe, 570 const struct pipe_framebuffer_state* state) 571{ 572 struct r300_context* r300 = r300_context(pipe); 573 struct r300_screen* r300screen = r300_screen(pipe->screen); 574 struct pipe_framebuffer_state *old_state = r300->fb_state.state; 575 unsigned max_width, max_height; 576 uint32_t zbuffer_bpp = 0; 577 578 579 if (state->nr_cbufs > 4) { 580 debug_printf("r300: Implementation error: Too many MRTs in %s, " 581 "refusing to bind framebuffer state!\n", __FUNCTION__); 582 return; 583 } 584 585 if (r300screen->caps->is_r500) { 586 max_width = max_height = 4096; 587 } else if (r300screen->caps->is_r400) { 588 max_width = max_height = 4021; 589 } else { 590 max_width = max_height = 2560; 591 } 592 593 if (state->width > max_width || state->height > max_height) { 594 debug_printf("r300: Implementation error: Render targets are too " 595 "big in %s, refusing to bind framebuffer state!\n", __FUNCTION__); 596 return; 597 } 598 599 if (r300->draw) { 600 draw_flush(r300->draw); 601 } 602 603 r300->fb_state.dirty = TRUE; 604 605 /* If nr_cbufs is changed from zero to non-zero or vice versa... */ 606 if (!!old_state->nr_cbufs != !!state->nr_cbufs) { 607 r300->blend_state.dirty = TRUE; 608 } 609 /* If zsbuf is set from NULL to non-NULL or vice versa.. */ 610 if (!!old_state->zsbuf != !!state->zsbuf) { 611 r300->dsa_state.dirty = TRUE; 612 } 613 if (!r300->scissor_enabled) { 614 r300->scissor_state.dirty = TRUE; 615 } 616 617 r300_fb_update_tiling_flags(r300, r300->fb_state.state, state); 618 619 memcpy(r300->fb_state.state, state, sizeof(struct pipe_framebuffer_state)); 620 621 r300->fb_state.size = (10 * state->nr_cbufs) + (2 * (4 - state->nr_cbufs)) + 622 (state->zsbuf ? 10 : 0) + 8; 623 624 /* Polygon offset depends on the zbuffer bit depth. */ 625 if (state->zsbuf && r300->polygon_offset_enabled) { 626 switch (util_format_get_blocksize(state->zsbuf->texture->format)) { 627 case 2: 628 zbuffer_bpp = 16; 629 break; 630 case 4: 631 zbuffer_bpp = 24; 632 break; 633 } 634 635 if (r300->zbuffer_bpp != zbuffer_bpp) { 636 r300->zbuffer_bpp = zbuffer_bpp; 637 r300->rs_state.dirty = TRUE; 638 } 639 } 640} 641 642/* Create fragment shader state. */ 643static void* r300_create_fs_state(struct pipe_context* pipe, 644 const struct pipe_shader_state* shader) 645{ 646 struct r300_fragment_shader* fs = NULL; 647 648 fs = (struct r300_fragment_shader*)CALLOC_STRUCT(r300_fragment_shader); 649 650 /* Copy state directly into shader. */ 651 fs->state = *shader; 652 fs->state.tokens = tgsi_dup_tokens(shader->tokens); 653 654 tgsi_scan_shader(shader->tokens, &fs->info); 655 r300_shader_read_fs_inputs(&fs->info, &fs->inputs); 656 657 return (void*)fs; 658} 659 660/* Bind fragment shader state. */ 661static void r300_bind_fs_state(struct pipe_context* pipe, void* shader) 662{ 663 struct r300_context* r300 = r300_context(pipe); 664 struct r300_fragment_shader* fs = (struct r300_fragment_shader*)shader; 665 666 if (fs == NULL) { 667 r300->fs = NULL; 668 return; 669 } 670 671 r300->fs = fs; 672 r300_pick_fragment_shader(r300); 673 674 r300->rs_block_state.dirty = TRUE; /* Will be updated before the emission. */ 675 676 if (r300->vs_state.state && r300_vertex_shader_setup_wpos(r300)) { 677 r300->vap_output_state.dirty = TRUE; 678 } 679 680 r300->dirty_state |= R300_NEW_FRAGMENT_SHADER | R300_NEW_FRAGMENT_SHADER_CONSTANTS; 681} 682 683/* Delete fragment shader state. */ 684static void r300_delete_fs_state(struct pipe_context* pipe, void* shader) 685{ 686 struct r300_fragment_shader* fs = (struct r300_fragment_shader*)shader; 687 struct r300_fragment_shader_code *tmp, *ptr = fs->first; 688 689 while (ptr) { 690 tmp = ptr; 691 ptr = ptr->next; 692 rc_constants_destroy(&tmp->code.constants); 693 FREE(tmp); 694 } 695 FREE((void*)fs->state.tokens); 696 FREE(shader); 697} 698 699static void r300_set_polygon_stipple(struct pipe_context* pipe, 700 const struct pipe_poly_stipple* state) 701{ 702 /* XXX no idea how to set this up, but not terribly important */ 703} 704 705/* Create a new rasterizer state based on the CSO rasterizer state. 706 * 707 * This is a very large chunk of state, and covers most of the graphics 708 * backend (GB), geometry assembly (GA), and setup unit (SU) blocks. 709 * 710 * In a not entirely unironic sidenote, this state has nearly nothing to do 711 * with the actual block on the Radeon called the rasterizer (RS). */ 712static void* r300_create_rs_state(struct pipe_context* pipe, 713 const struct pipe_rasterizer_state* state) 714{ 715 struct r300_screen* r300screen = r300_screen(pipe->screen); 716 struct r300_rs_state* rs = CALLOC_STRUCT(r300_rs_state); 717 718 /* Copy rasterizer state for Draw. */ 719 rs->rs = *state; 720 721#ifdef PIPE_ARCH_LITTLE_ENDIAN 722 rs->vap_control_status = R300_VC_NO_SWAP; 723#else 724 rs->vap_control_status = R300_VC_32BIT_SWAP; 725#endif 726 727 /* If no TCL engine is present, turn off the HW TCL. */ 728 if (!r300screen->caps->has_tcl) { 729 rs->vap_control_status |= R300_VAP_TCL_BYPASS; 730 } 731 732 rs->point_size = pack_float_16_6x(state->point_size) | 733 (pack_float_16_6x(state->point_size) << R300_POINTSIZE_X_SHIFT); 734 735 rs->line_control = pack_float_16_6x(state->line_width) | 736 R300_GA_LINE_CNTL_END_TYPE_COMP; 737 738 /* Enable polygon mode */ 739 if (state->fill_cw != PIPE_POLYGON_MODE_FILL || 740 state->fill_ccw != PIPE_POLYGON_MODE_FILL) { 741 rs->polygon_mode = R300_GA_POLY_MODE_DUAL; 742 } 743 744 /* Radeons don't think in "CW/CCW", they think in "front/back". */ 745 if (state->front_winding == PIPE_WINDING_CW) { 746 rs->cull_mode = R300_FRONT_FACE_CW; 747 748 /* Polygon offset */ 749 if (state->offset_cw) { 750 rs->polygon_offset_enable |= R300_FRONT_ENABLE; 751 } 752 if (state->offset_ccw) { 753 rs->polygon_offset_enable |= R300_BACK_ENABLE; 754 } 755 756 /* Polygon mode */ 757 if (rs->polygon_mode) { 758 rs->polygon_mode |= 759 r300_translate_polygon_mode_front(state->fill_cw); 760 rs->polygon_mode |= 761 r300_translate_polygon_mode_back(state->fill_ccw); 762 } 763 } else { 764 rs->cull_mode = R300_FRONT_FACE_CCW; 765 766 /* Polygon offset */ 767 if (state->offset_ccw) { 768 rs->polygon_offset_enable |= R300_FRONT_ENABLE; 769 } 770 if (state->offset_cw) { 771 rs->polygon_offset_enable |= R300_BACK_ENABLE; 772 } 773 774 /* Polygon mode */ 775 if (rs->polygon_mode) { 776 rs->polygon_mode |= 777 r300_translate_polygon_mode_front(state->fill_ccw); 778 rs->polygon_mode |= 779 r300_translate_polygon_mode_back(state->fill_cw); 780 } 781 } 782 if (state->front_winding & state->cull_mode) { 783 rs->cull_mode |= R300_CULL_FRONT; 784 } 785 if (~(state->front_winding) & state->cull_mode) { 786 rs->cull_mode |= R300_CULL_BACK; 787 } 788 789 if (rs->polygon_offset_enable) { 790 rs->depth_offset = state->offset_units; 791 rs->depth_scale = state->offset_scale; 792 } 793 794 if (state->line_stipple_enable) { 795 rs->line_stipple_config = 796 R300_GA_LINE_STIPPLE_CONFIG_LINE_RESET_LINE | 797 (fui((float)state->line_stipple_factor) & 798 R300_GA_LINE_STIPPLE_CONFIG_STIPPLE_SCALE_MASK); 799 /* XXX this might need to be scaled up */ 800 rs->line_stipple_value = state->line_stipple_pattern; 801 } 802 803 if (state->flatshade) { 804 rs->color_control = R300_SHADE_MODEL_FLAT; 805 } else { 806 rs->color_control = R300_SHADE_MODEL_SMOOTH; 807 } 808 809 return (void*)rs; 810} 811 812/* Bind rasterizer state. */ 813static void r300_bind_rs_state(struct pipe_context* pipe, void* state) 814{ 815 struct r300_context* r300 = r300_context(pipe); 816 struct r300_rs_state* rs = (struct r300_rs_state*)state; 817 boolean scissor_was_enabled = r300->scissor_enabled; 818 819 if (r300->draw) { 820 draw_flush(r300->draw); 821 draw_set_rasterizer_state(r300->draw, &rs->rs); 822 } 823 824 if (rs) { 825 r300->polygon_offset_enabled = rs->rs.offset_cw || rs->rs.offset_ccw; 826 r300->scissor_enabled = rs->rs.scissor; 827 } else { 828 r300->polygon_offset_enabled = FALSE; 829 r300->scissor_enabled = FALSE; 830 } 831 832 UPDATE_STATE(state, r300->rs_state); 833 r300->rs_state.size = 17 + (r300->polygon_offset_enabled ? 5 : 0); 834 835 if (scissor_was_enabled != r300->scissor_enabled) { 836 r300->scissor_state.dirty = TRUE; 837 } 838} 839 840/* Free rasterizer state. */ 841static void r300_delete_rs_state(struct pipe_context* pipe, void* state) 842{ 843 FREE(state); 844} 845 846static void* 847 r300_create_sampler_state(struct pipe_context* pipe, 848 const struct pipe_sampler_state* state) 849{ 850 struct r300_context* r300 = r300_context(pipe); 851 struct r300_sampler_state* sampler = CALLOC_STRUCT(r300_sampler_state); 852 int lod_bias; 853 union util_color uc; 854 855 sampler->state = *state; 856 857 sampler->filter0 |= 858 (r300_translate_wrap(state->wrap_s) << R300_TX_WRAP_S_SHIFT) | 859 (r300_translate_wrap(state->wrap_t) << R300_TX_WRAP_T_SHIFT) | 860 (r300_translate_wrap(state->wrap_r) << R300_TX_WRAP_R_SHIFT); 861 862 sampler->filter0 |= r300_translate_tex_filters(state->min_img_filter, 863 state->mag_img_filter, 864 state->min_mip_filter, 865 state->max_anisotropy > 0); 866 867 /* Unfortunately, r300-r500 don't support floating-point mipmap lods. */ 868 /* We must pass these to the merge function to clamp them properly. */ 869 sampler->min_lod = MAX2((unsigned)state->min_lod, 0); 870 sampler->max_lod = MAX2((unsigned)ceilf(state->max_lod), 0); 871 872 lod_bias = CLAMP((int)(state->lod_bias * 32), -(1 << 9), (1 << 9) - 1); 873 874 sampler->filter1 |= lod_bias << R300_LOD_BIAS_SHIFT; 875 876 sampler->filter1 |= r300_anisotropy(state->max_anisotropy); 877 878 util_pack_color(state->border_color, PIPE_FORMAT_B8G8R8A8_UNORM, &uc); 879 sampler->border_color = uc.ui; 880 881 /* R500-specific fixups and optimizations */ 882 if (r300_screen(r300->context.screen)->caps->is_r500) { 883 sampler->filter1 |= R500_BORDER_FIX; 884 } 885 886 return (void*)sampler; 887} 888 889static void r300_bind_sampler_states(struct pipe_context* pipe, 890 unsigned count, 891 void** states) 892{ 893 struct r300_context* r300 = r300_context(pipe); 894 struct r300_textures_state* state = 895 (struct r300_textures_state*)r300->textures_state.state; 896 897 if (count > 8) { 898 return; 899 } 900 901 memcpy(state->sampler_states, states, sizeof(void*) * count); 902 state->sampler_count = count; 903 904 r300->textures_state.dirty = TRUE; 905 906 /* Pick a fragment shader based on the texture compare state. */ 907 if (r300->fs && count) { 908 if (r300_pick_fragment_shader(r300)) { 909 r300->dirty_state |= R300_NEW_FRAGMENT_SHADER | 910 R300_NEW_FRAGMENT_SHADER_CONSTANTS; 911 } 912 } 913} 914 915static void r300_lacks_vertex_textures(struct pipe_context* pipe, 916 unsigned count, 917 void** states) 918{ 919} 920 921static void r300_delete_sampler_state(struct pipe_context* pipe, void* state) 922{ 923 FREE(state); 924} 925 926static void r300_set_fragment_sampler_views(struct pipe_context* pipe, 927 unsigned count, 928 struct pipe_sampler_view** views) 929{ 930 struct r300_context* r300 = r300_context(pipe); 931 unsigned i; 932 boolean is_r500 = r300_screen(r300->context.screen)->caps->is_r500; 933 boolean dirty_tex = FALSE; 934 935 /* XXX magic num */ 936 if (count > 8) { 937 return; 938 } 939 940 for (i = 0; i < count; i++) { 941 if (r300->fragment_sampler_views[i] != views[i]) { 942 struct r300_texture *texture; 943 944 pipe_sampler_view_reference(&r300->fragment_sampler_views[i], 945 views[i]); 946 dirty_tex = TRUE; 947 948 texture = (struct r300_texture *)views[i]->texture; 949 950 /* R300-specific - set the texrect factor in a fragment shader */ 951 if (!is_r500 && texture->is_npot) { 952 /* XXX It would be nice to re-emit just 1 constant, 953 * XXX not all of them */ 954 r300->dirty_state |= R300_NEW_FRAGMENT_SHADER_CONSTANTS; 955 } 956 } 957 } 958 959 for (i = count; i < 8; i++) { 960 if (r300->fragment_sampler_views[i]) { 961 pipe_sampler_view_reference(&r300->fragment_sampler_views[i], 962 NULL); 963 } 964 } 965 966 r300->fragment_sampler_view_count = count; 967 968 r300->textures_state.dirty = TRUE; 969 970 if (dirty_tex) { 971 r300->texture_cache_inval.dirty = TRUE; 972 } 973} 974 975static struct pipe_sampler_view * 976r300_create_sampler_view(struct pipe_context *pipe, 977 struct pipe_texture *texture, 978 const struct pipe_sampler_view *templ) 979{ 980 struct r300_context *r300 = r300_context(pipe); 981 struct pipe_sampler_view *view = CALLOC_STRUCT(pipe_sampler_view); 982 983 *view = *templ; 984 view->reference.count = 1; 985 view->texture = NULL; 986 pipe_texture_reference(&view->texture, texture); 987 view->context = pipe; 988 989 return view; 990} 991 992 993static void 994r300_sampler_view_destroy(struct pipe_context *pipe, 995 struct pipe_sampler_view *view) 996{ 997 pipe_texture_reference(&view->texture, NULL); 998 FREE(view); 999} 1000 1001static void r300_set_scissor_state(struct pipe_context* pipe, 1002 const struct pipe_scissor_state* state) 1003{ 1004 struct r300_context* r300 = r300_context(pipe); 1005 1006 memcpy(r300->scissor_state.state, state, 1007 sizeof(struct pipe_scissor_state)); 1008 1009 if (r300->scissor_enabled) { 1010 r300->scissor_state.dirty = TRUE; 1011 } 1012} 1013 1014static void r300_set_viewport_state(struct pipe_context* pipe, 1015 const struct pipe_viewport_state* state) 1016{ 1017 struct r300_context* r300 = r300_context(pipe); 1018 struct r300_viewport_state* viewport = 1019 (struct r300_viewport_state*)r300->viewport_state.state; 1020 1021 r300->viewport = *state; 1022 1023 /* Do the transform in HW. */ 1024 viewport->vte_control = R300_VTX_W0_FMT; 1025 1026 if (state->scale[0] != 1.0f) { 1027 viewport->xscale = state->scale[0]; 1028 viewport->vte_control |= R300_VPORT_X_SCALE_ENA; 1029 } 1030 if (state->scale[1] != 1.0f) { 1031 viewport->yscale = state->scale[1]; 1032 viewport->vte_control |= R300_VPORT_Y_SCALE_ENA; 1033 } 1034 if (state->scale[2] != 1.0f) { 1035 viewport->zscale = state->scale[2]; 1036 viewport->vte_control |= R300_VPORT_Z_SCALE_ENA; 1037 } 1038 if (state->translate[0] != 0.0f) { 1039 viewport->xoffset = state->translate[0]; 1040 viewport->vte_control |= R300_VPORT_X_OFFSET_ENA; 1041 } 1042 if (state->translate[1] != 0.0f) { 1043 viewport->yoffset = state->translate[1]; 1044 viewport->vte_control |= R300_VPORT_Y_OFFSET_ENA; 1045 } 1046 if (state->translate[2] != 0.0f) { 1047 viewport->zoffset = state->translate[2]; 1048 viewport->vte_control |= R300_VPORT_Z_OFFSET_ENA; 1049 } 1050 1051 r300->viewport_state.dirty = TRUE; 1052 if (r300->fs && r300->fs->inputs.wpos != ATTR_UNUSED) { 1053 r300->dirty_state |= R300_NEW_FRAGMENT_SHADER_CONSTANTS; 1054 } 1055} 1056 1057static void r300_set_vertex_buffers(struct pipe_context* pipe, 1058 unsigned count, 1059 const struct pipe_vertex_buffer* buffers) 1060{ 1061 struct r300_context* r300 = r300_context(pipe); 1062 unsigned i, max_index = ~0; 1063 1064 memcpy(r300->vertex_buffer, buffers, 1065 sizeof(struct pipe_vertex_buffer) * count); 1066 1067 for (i = 0; i < count; i++) { 1068 max_index = MIN2(buffers[i].max_index, max_index); 1069 } 1070 1071 r300->vertex_buffer_count = count; 1072 r300->vertex_buffer_max_index = max_index; 1073 1074 if (r300->draw) { 1075 draw_flush(r300->draw); 1076 draw_set_vertex_buffers(r300->draw, count, buffers); 1077 } 1078} 1079 1080static boolean r300_validate_aos(struct r300_context *r300) 1081{ 1082 struct pipe_vertex_buffer *vbuf = r300->vertex_buffer; 1083 struct pipe_vertex_element *velem = r300->velems->velem; 1084 int i; 1085 1086 /* Check if formats and strides are aligned to the size of DWORD. */ 1087 for (i = 0; i < r300->velems->count; i++) { 1088 if (vbuf[velem[i].vertex_buffer_index].stride % 4 != 0 || 1089 util_format_get_blocksize(velem[i].src_format) % 4 != 0) { 1090 return FALSE; 1091 } 1092 } 1093 return TRUE; 1094} 1095 1096static void r300_draw_emit_attrib(struct r300_context* r300, 1097 enum attrib_emit emit, 1098 enum interp_mode interp, 1099 int index) 1100{ 1101 struct r300_vertex_shader* vs = r300->vs_state.state; 1102 struct tgsi_shader_info* info = &vs->info; 1103 int output; 1104 1105 output = draw_find_shader_output(r300->draw, 1106 info->output_semantic_name[index], 1107 info->output_semantic_index[index]); 1108 draw_emit_vertex_attr(&r300->vertex_info, emit, interp, output); 1109} 1110 1111static void r300_draw_emit_all_attribs(struct r300_context* r300) 1112{ 1113 struct r300_vertex_shader* vs = r300->vs_state.state; 1114 struct r300_shader_semantics* vs_outputs = &vs->outputs; 1115 int i, gen_count; 1116 1117 /* Position. */ 1118 if (vs_outputs->pos != ATTR_UNUSED) { 1119 r300_draw_emit_attrib(r300, EMIT_4F, INTERP_PERSPECTIVE, 1120 vs_outputs->pos); 1121 } else { 1122 assert(0); 1123 } 1124 1125 /* Point size. */ 1126 if (vs_outputs->psize != ATTR_UNUSED) { 1127 r300_draw_emit_attrib(r300, EMIT_1F_PSIZE, INTERP_POS, 1128 vs_outputs->psize); 1129 } 1130 1131 /* Colors. */ 1132 for (i = 0; i < ATTR_COLOR_COUNT; i++) { 1133 if (vs_outputs->color[i] != ATTR_UNUSED) { 1134 r300_draw_emit_attrib(r300, EMIT_4F, INTERP_LINEAR, 1135 vs_outputs->color[i]); 1136 } 1137 } 1138 1139 /* XXX Back-face colors. */ 1140 1141 /* Texture coordinates. */ 1142 gen_count = 0; 1143 for (i = 0; i < ATTR_GENERIC_COUNT; i++) { 1144 if (vs_outputs->generic[i] != ATTR_UNUSED) { 1145 r300_draw_emit_attrib(r300, EMIT_4F, INTERP_PERSPECTIVE, 1146 vs_outputs->generic[i]); 1147 gen_count++; 1148 } 1149 } 1150 1151 /* Fog coordinates. */ 1152 if (vs_outputs->fog != ATTR_UNUSED) { 1153 r300_draw_emit_attrib(r300, EMIT_4F, INTERP_PERSPECTIVE, 1154 vs_outputs->fog); 1155 gen_count++; 1156 } 1157 1158 /* XXX magic */ 1159 assert(gen_count <= 8); 1160} 1161 1162/* Update the PSC tables. */ 1163static void r300_vertex_psc(struct r300_vertex_element_state *velems) 1164{ 1165 struct r300_vertex_stream_state *vstream = &velems->vertex_stream; 1166 uint16_t type, swizzle; 1167 enum pipe_format format; 1168 unsigned i; 1169 1170 assert(velems->count <= 16); 1171 1172 /* Vertex shaders have no semantics on their inputs, 1173 * so PSC should just route stuff based on the vertex elements, 1174 * and not on attrib information. */ 1175 for (i = 0; i < velems->count; i++) { 1176 format = velems->velem[i].src_format; 1177 1178 type = r300_translate_vertex_data_type(format) | 1179 (i << R300_DST_VEC_LOC_SHIFT); 1180 swizzle = r300_translate_vertex_data_swizzle(format); 1181 1182 if (i & 1) { 1183 vstream->vap_prog_stream_cntl[i >> 1] |= type << 16; 1184 vstream->vap_prog_stream_cntl_ext[i >> 1] |= swizzle << 16; 1185 } else { 1186 vstream->vap_prog_stream_cntl[i >> 1] |= type; 1187 vstream->vap_prog_stream_cntl_ext[i >> 1] |= swizzle; 1188 } 1189 } 1190 1191 /* Set the last vector in the PSC. */ 1192 if (i) { 1193 i -= 1; 1194 } 1195 vstream->vap_prog_stream_cntl[i >> 1] |= 1196 (R300_LAST_VEC << (i & 1 ? 16 : 0)); 1197 1198 vstream->count = (i >> 1) + 1; 1199} 1200 1201/* Update the PSC tables for SW TCL, using Draw. */ 1202static void r300_swtcl_vertex_psc(struct r300_context *r300, 1203 struct r300_vertex_element_state *velems) 1204{ 1205 struct r300_vertex_stream_state *vstream = &velems->vertex_stream; 1206 struct r300_vertex_shader* vs = r300->vs_state.state; 1207 struct vertex_info* vinfo = &r300->vertex_info; 1208 uint16_t type, swizzle; 1209 enum pipe_format format; 1210 unsigned i, attrib_count; 1211 int* vs_output_tab = vs->stream_loc_notcl; 1212 1213 /* For each Draw attribute, route it to the fragment shader according 1214 * to the vs_output_tab. */ 1215 attrib_count = vinfo->num_attribs; 1216 DBG(r300, DBG_DRAW, "r300: attrib count: %d\n", attrib_count); 1217 for (i = 0; i < attrib_count; i++) { 1218 DBG(r300, DBG_DRAW, "r300: attrib: offset %d, interp %d, size %d," 1219 " vs_output_tab %d\n", vinfo->attrib[i].src_index, 1220 vinfo->attrib[i].interp_mode, vinfo->attrib[i].emit, 1221 vs_output_tab[i]); 1222 } 1223 1224 for (i = 0; i < attrib_count; i++) { 1225 /* Make sure we have a proper destination for our attribute. */ 1226 assert(vs_output_tab[i] != -1); 1227 1228 format = draw_translate_vinfo_format(vinfo->attrib[i].emit); 1229 1230 /* Obtain the type of data in this attribute. */ 1231 type = r300_translate_vertex_data_type(format) | 1232 vs_output_tab[i] << R300_DST_VEC_LOC_SHIFT; 1233 1234 /* Obtain the swizzle for this attribute. Note that the default 1235 * swizzle in the hardware is not XYZW! */ 1236 swizzle = r300_translate_vertex_data_swizzle(format); 1237 1238 /* Add the attribute to the PSC table. */ 1239 if (i & 1) { 1240 vstream->vap_prog_stream_cntl[i >> 1] |= type << 16; 1241 vstream->vap_prog_stream_cntl_ext[i >> 1] |= swizzle << 16; 1242 } else { 1243 vstream->vap_prog_stream_cntl[i >> 1] |= type; 1244 vstream->vap_prog_stream_cntl_ext[i >> 1] |= swizzle; 1245 } 1246 } 1247 1248 /* Set the last vector in the PSC. */ 1249 if (i) { 1250 i -= 1; 1251 } 1252 vstream->vap_prog_stream_cntl[i >> 1] |= 1253 (R300_LAST_VEC << (i & 1 ? 16 : 0)); 1254 1255 vstream->count = (i >> 1) + 1; 1256} 1257 1258static void* r300_create_vertex_elements_state(struct pipe_context* pipe, 1259 unsigned count, 1260 const struct pipe_vertex_element* attribs) 1261{ 1262 struct r300_context *r300 = r300_context(pipe); 1263 struct r300_screen* r300screen = r300_screen(pipe->screen); 1264 struct r300_vertex_element_state *velems; 1265 1266 assert(count <= PIPE_MAX_ATTRIBS); 1267 velems = CALLOC_STRUCT(r300_vertex_element_state); 1268 if (velems != NULL) { 1269 velems->count = count; 1270 memcpy(velems->velem, attribs, sizeof(struct pipe_vertex_element) * count); 1271 1272 if (r300screen->caps->has_tcl) { 1273 r300_vertex_psc(velems); 1274 } else { 1275 memset(&r300->vertex_info, 0, sizeof(struct vertex_info)); 1276 r300_draw_emit_all_attribs(r300); 1277 draw_compute_vertex_size(&r300->vertex_info); 1278 r300_swtcl_vertex_psc(r300, velems); 1279 } 1280 } 1281 return velems; 1282} 1283 1284static void r300_bind_vertex_elements_state(struct pipe_context *pipe, 1285 void *state) 1286{ 1287 struct r300_context *r300 = r300_context(pipe); 1288 struct r300_vertex_element_state *velems = state; 1289 1290 if (velems == NULL) { 1291 return; 1292 } 1293 1294 r300->velems = velems; 1295 1296 if (r300->draw) { 1297 draw_flush(r300->draw); 1298 draw_set_vertex_elements(r300->draw, velems->count, velems->velem); 1299 } 1300 1301 if (!r300_validate_aos(r300)) { 1302 /* XXX We should fallback using draw. */ 1303 assert(0); 1304 abort(); 1305 } 1306 1307 UPDATE_STATE(&velems->vertex_stream, r300->vertex_stream_state); 1308 r300->vertex_stream_state.size = (1 + velems->vertex_stream.count) * 2; 1309} 1310 1311static void r300_delete_vertex_elements_state(struct pipe_context *pipe, void *state) 1312{ 1313 FREE(state); 1314} 1315 1316static void* r300_create_vs_state(struct pipe_context* pipe, 1317 const struct pipe_shader_state* shader) 1318{ 1319 struct r300_context* r300 = r300_context(pipe); 1320 1321 struct r300_vertex_shader* vs = CALLOC_STRUCT(r300_vertex_shader); 1322 r300_vertex_shader_common_init(vs, shader); 1323 1324 if (r300_screen(pipe->screen)->caps->has_tcl) { 1325 r300_translate_vertex_shader(r300, vs); 1326 } else { 1327 vs->draw_vs = draw_create_vertex_shader(r300->draw, shader); 1328 } 1329 1330 return vs; 1331} 1332 1333static void r300_bind_vs_state(struct pipe_context* pipe, void* shader) 1334{ 1335 struct r300_context* r300 = r300_context(pipe); 1336 struct r300_vertex_shader* vs = (struct r300_vertex_shader*)shader; 1337 1338 if (vs == NULL) { 1339 r300->vs_state.state = NULL; 1340 return; 1341 } 1342 if (vs == r300->vs_state.state) { 1343 return; 1344 } 1345 r300->vs_state.state = vs; 1346 1347 // VS output mapping for HWTCL or stream mapping for SWTCL to the RS block 1348 if (r300->fs) { 1349 r300_vertex_shader_setup_wpos(r300); 1350 } 1351 memcpy(r300->vap_output_state.state, &vs->vap_out, 1352 sizeof(struct r300_vap_output_state)); 1353 r300->vap_output_state.dirty = TRUE; 1354 1355 /* The majority of the RS block bits is dependent on the vertex shader. */ 1356 r300->rs_block_state.dirty = TRUE; /* Will be updated before the emission. */ 1357 1358 if (r300_screen(pipe->screen)->caps->has_tcl) { 1359 r300->vs_state.dirty = TRUE; 1360 r300->vs_state.size = vs->code.length + 9; 1361 1362 r300->pvs_flush.dirty = TRUE; 1363 1364 r300->dirty_state |= R300_NEW_VERTEX_SHADER_CONSTANTS; 1365 } else { 1366 draw_flush(r300->draw); 1367 draw_bind_vertex_shader(r300->draw, 1368 (struct draw_vertex_shader*)vs->draw_vs); 1369 } 1370} 1371 1372static void r300_delete_vs_state(struct pipe_context* pipe, void* shader) 1373{ 1374 struct r300_context* r300 = r300_context(pipe); 1375 struct r300_vertex_shader* vs = (struct r300_vertex_shader*)shader; 1376 1377 if (r300_screen(pipe->screen)->caps->has_tcl) { 1378 rc_constants_destroy(&vs->code.constants); 1379 } else { 1380 draw_delete_vertex_shader(r300->draw, 1381 (struct draw_vertex_shader*)vs->draw_vs); 1382 } 1383 1384 FREE((void*)vs->state.tokens); 1385 FREE(shader); 1386} 1387 1388static void r300_set_constant_buffer(struct pipe_context *pipe, 1389 uint shader, uint index, 1390 struct pipe_buffer *buf) 1391{ 1392 struct r300_context* r300 = r300_context(pipe); 1393 struct r300_screen *r300screen = r300_screen(pipe->screen); 1394 void *mapped; 1395 int max_size = 0; 1396 1397 if (buf == NULL || buf->size == 0 || 1398 (mapped = pipe_buffer_map(pipe->screen, buf, PIPE_BUFFER_USAGE_CPU_READ)) == NULL) 1399 { 1400 r300->shader_constants[shader].count = 0; 1401 return; 1402 } 1403 1404 assert((buf->size % 4 * sizeof(float)) == 0); 1405 1406 /* Check the size of the constant buffer. */ 1407 switch (shader) { 1408 case PIPE_SHADER_VERTEX: 1409 max_size = 256; 1410 break; 1411 case PIPE_SHADER_FRAGMENT: 1412 if (r300screen->caps->is_r500) { 1413 max_size = 256; 1414 /* XXX Implement emission of r400's extended constant buffer. */ 1415 /*} else if (r300screen->caps->is_r400) { 1416 max_size = 64;*/ 1417 } else { 1418 max_size = 32; 1419 } 1420 break; 1421 default: 1422 assert(0); 1423 } 1424 1425 /* XXX Subtract immediates and RC_STATE_* variables. */ 1426 if (buf->size > (sizeof(float) * 4 * max_size)) { 1427 debug_printf("r300: Max size of the constant buffer is " 1428 "%i*4 floats.\n", max_size); 1429 abort(); 1430 } 1431 1432 memcpy(r300->shader_constants[shader].constants, mapped, buf->size); 1433 r300->shader_constants[shader].count = buf->size / (4 * sizeof(float)); 1434 pipe_buffer_unmap(pipe->screen, buf); 1435 1436 if (shader == PIPE_SHADER_VERTEX) { 1437 if (r300screen->caps->has_tcl) { 1438 r300->dirty_state |= R300_NEW_VERTEX_SHADER_CONSTANTS; 1439 r300->pvs_flush.dirty = TRUE; 1440 } 1441 } 1442 else if (shader == PIPE_SHADER_FRAGMENT) 1443 r300->dirty_state |= R300_NEW_FRAGMENT_SHADER_CONSTANTS; 1444} 1445 1446void r300_init_state_functions(struct r300_context* r300) 1447{ 1448 r300->context.create_blend_state = r300_create_blend_state; 1449 r300->context.bind_blend_state = r300_bind_blend_state; 1450 r300->context.delete_blend_state = r300_delete_blend_state; 1451 1452 r300->context.set_blend_color = r300_set_blend_color; 1453 1454 r300->context.set_clip_state = r300_set_clip_state; 1455 1456 r300->context.set_constant_buffer = r300_set_constant_buffer; 1457 1458 r300->context.create_depth_stencil_alpha_state = r300_create_dsa_state; 1459 r300->context.bind_depth_stencil_alpha_state = r300_bind_dsa_state; 1460 r300->context.delete_depth_stencil_alpha_state = r300_delete_dsa_state; 1461 1462 r300->context.set_stencil_ref = r300_set_stencil_ref; 1463 1464 r300->context.set_framebuffer_state = r300_set_framebuffer_state; 1465 1466 r300->context.create_fs_state = r300_create_fs_state; 1467 r300->context.bind_fs_state = r300_bind_fs_state; 1468 r300->context.delete_fs_state = r300_delete_fs_state; 1469 1470 r300->context.set_polygon_stipple = r300_set_polygon_stipple; 1471 1472 r300->context.create_rasterizer_state = r300_create_rs_state; 1473 r300->context.bind_rasterizer_state = r300_bind_rs_state; 1474 r300->context.delete_rasterizer_state = r300_delete_rs_state; 1475 1476 r300->context.create_sampler_state = r300_create_sampler_state; 1477 r300->context.bind_fragment_sampler_states = r300_bind_sampler_states; 1478 r300->context.bind_vertex_sampler_states = r300_lacks_vertex_textures; 1479 r300->context.delete_sampler_state = r300_delete_sampler_state; 1480 1481 r300->context.set_fragment_sampler_views = r300_set_fragment_sampler_views; 1482 r300->context.create_sampler_view = r300_create_sampler_view; 1483 r300->context.sampler_view_destroy = r300_sampler_view_destroy; 1484 1485 r300->context.set_scissor_state = r300_set_scissor_state; 1486 1487 r300->context.set_viewport_state = r300_set_viewport_state; 1488 1489 r300->context.set_vertex_buffers = r300_set_vertex_buffers; 1490 1491 r300->context.create_vertex_elements_state = r300_create_vertex_elements_state; 1492 r300->context.bind_vertex_elements_state = r300_bind_vertex_elements_state; 1493 r300->context.delete_vertex_elements_state = r300_delete_vertex_elements_state; 1494 1495 r300->context.create_vs_state = r300_create_vs_state; 1496 r300->context.bind_vs_state = r300_bind_vs_state; 1497 r300->context.delete_vs_state = r300_delete_vs_state; 1498} 1499