r300_state.c revision 506130fff5685742d280bde8800be036c8e8ebfa
1/* 2 * Copyright 2008 Corbin Simpson <MostAwesomeDude@gmail.com> 3 * Copyright 2009 Marek Olšák <maraeo@gmail.com> 4 * 5 * Permission is hereby granted, free of charge, to any person obtaining a 6 * copy of this software and associated documentation files (the "Software"), 7 * to deal in the Software without restriction, including without limitation 8 * on the rights to use, copy, modify, merge, publish, distribute, sub 9 * license, and/or sell copies of the Software, and to permit persons to whom 10 * the Software is furnished to do so, subject to the following conditions: 11 * 12 * The above copyright notice and this permission notice (including the next 13 * paragraph) shall be included in all copies or substantial portions of the 14 * Software. 15 * 16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL 19 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, 20 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR 21 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE 22 * USE OR OTHER DEALINGS IN THE SOFTWARE. */ 23 24#include "draw/draw_context.h" 25 26#include "util/u_math.h" 27#include "util/u_memory.h" 28#include "util/u_pack_color.h" 29 30#include "tgsi/tgsi_parse.h" 31 32#include "pipe/p_config.h" 33 34#include "r300_context.h" 35#include "r300_reg.h" 36#include "r300_screen.h" 37#include "r300_screen_buffer.h" 38#include "r300_state_inlines.h" 39#include "r300_fs.h" 40#include "r300_vs.h" 41 42#include "radeon_winsys.h" 43 44/* r300_state: Functions used to intialize state context by translating 45 * Gallium state objects into semi-native r300 state objects. */ 46 47#define UPDATE_STATE(cso, atom) \ 48 if (cso != atom.state) { \ 49 atom.state = cso; \ 50 atom.dirty = TRUE; \ 51 } 52 53static boolean blend_discard_if_src_alpha_0(unsigned srcRGB, unsigned srcA, 54 unsigned dstRGB, unsigned dstA) 55{ 56 /* If the blend equation is ADD or REVERSE_SUBTRACT, 57 * SRC_ALPHA == 0, and the following state is set, the colorbuffer 58 * will not be changed. 59 * Notice that the dst factors are the src factors inverted. */ 60 return (srcRGB == PIPE_BLENDFACTOR_SRC_ALPHA || 61 srcRGB == PIPE_BLENDFACTOR_SRC_ALPHA_SATURATE || 62 srcRGB == PIPE_BLENDFACTOR_ZERO) && 63 (srcA == PIPE_BLENDFACTOR_SRC_COLOR || 64 srcA == PIPE_BLENDFACTOR_SRC_ALPHA || 65 srcA == PIPE_BLENDFACTOR_SRC_ALPHA_SATURATE || 66 srcA == PIPE_BLENDFACTOR_ZERO) && 67 (dstRGB == PIPE_BLENDFACTOR_INV_SRC_ALPHA || 68 dstRGB == PIPE_BLENDFACTOR_ONE) && 69 (dstA == PIPE_BLENDFACTOR_INV_SRC_COLOR || 70 dstA == PIPE_BLENDFACTOR_INV_SRC_ALPHA || 71 dstA == PIPE_BLENDFACTOR_ONE); 72} 73 74static boolean blend_discard_if_src_alpha_1(unsigned srcRGB, unsigned srcA, 75 unsigned dstRGB, unsigned dstA) 76{ 77 /* If the blend equation is ADD or REVERSE_SUBTRACT, 78 * SRC_ALPHA == 1, and the following state is set, the colorbuffer 79 * will not be changed. 80 * Notice that the dst factors are the src factors inverted. */ 81 return (srcRGB == PIPE_BLENDFACTOR_INV_SRC_ALPHA || 82 srcRGB == PIPE_BLENDFACTOR_ZERO) && 83 (srcA == PIPE_BLENDFACTOR_INV_SRC_COLOR || 84 srcA == PIPE_BLENDFACTOR_INV_SRC_ALPHA || 85 srcA == PIPE_BLENDFACTOR_ZERO) && 86 (dstRGB == PIPE_BLENDFACTOR_SRC_ALPHA || 87 dstRGB == PIPE_BLENDFACTOR_ONE) && 88 (dstA == PIPE_BLENDFACTOR_SRC_COLOR || 89 dstA == PIPE_BLENDFACTOR_SRC_ALPHA || 90 dstA == PIPE_BLENDFACTOR_ONE); 91} 92 93static boolean blend_discard_if_src_color_0(unsigned srcRGB, unsigned srcA, 94 unsigned dstRGB, unsigned dstA) 95{ 96 /* If the blend equation is ADD or REVERSE_SUBTRACT, 97 * SRC_COLOR == (0,0,0), and the following state is set, the colorbuffer 98 * will not be changed. 99 * Notice that the dst factors are the src factors inverted. */ 100 return (srcRGB == PIPE_BLENDFACTOR_SRC_COLOR || 101 srcRGB == PIPE_BLENDFACTOR_ZERO) && 102 (srcA == PIPE_BLENDFACTOR_ZERO) && 103 (dstRGB == PIPE_BLENDFACTOR_INV_SRC_COLOR || 104 dstRGB == PIPE_BLENDFACTOR_ONE) && 105 (dstA == PIPE_BLENDFACTOR_ONE); 106} 107 108static boolean blend_discard_if_src_color_1(unsigned srcRGB, unsigned srcA, 109 unsigned dstRGB, unsigned dstA) 110{ 111 /* If the blend equation is ADD or REVERSE_SUBTRACT, 112 * SRC_COLOR == (1,1,1), and the following state is set, the colorbuffer 113 * will not be changed. 114 * Notice that the dst factors are the src factors inverted. */ 115 return (srcRGB == PIPE_BLENDFACTOR_INV_SRC_COLOR || 116 srcRGB == PIPE_BLENDFACTOR_ZERO) && 117 (srcA == PIPE_BLENDFACTOR_ZERO) && 118 (dstRGB == PIPE_BLENDFACTOR_SRC_COLOR || 119 dstRGB == PIPE_BLENDFACTOR_ONE) && 120 (dstA == PIPE_BLENDFACTOR_ONE); 121} 122 123static boolean blend_discard_if_src_alpha_color_0(unsigned srcRGB, unsigned srcA, 124 unsigned dstRGB, unsigned dstA) 125{ 126 /* If the blend equation is ADD or REVERSE_SUBTRACT, 127 * SRC_ALPHA_COLOR == (0,0,0,0), and the following state is set, 128 * the colorbuffer will not be changed. 129 * Notice that the dst factors are the src factors inverted. */ 130 return (srcRGB == PIPE_BLENDFACTOR_SRC_COLOR || 131 srcRGB == PIPE_BLENDFACTOR_SRC_ALPHA || 132 srcRGB == PIPE_BLENDFACTOR_SRC_ALPHA_SATURATE || 133 srcRGB == PIPE_BLENDFACTOR_ZERO) && 134 (srcA == PIPE_BLENDFACTOR_SRC_COLOR || 135 srcA == PIPE_BLENDFACTOR_SRC_ALPHA || 136 srcA == PIPE_BLENDFACTOR_SRC_ALPHA_SATURATE || 137 srcA == PIPE_BLENDFACTOR_ZERO) && 138 (dstRGB == PIPE_BLENDFACTOR_INV_SRC_COLOR || 139 dstRGB == PIPE_BLENDFACTOR_INV_SRC_ALPHA || 140 dstRGB == PIPE_BLENDFACTOR_ONE) && 141 (dstA == PIPE_BLENDFACTOR_INV_SRC_COLOR || 142 dstA == PIPE_BLENDFACTOR_INV_SRC_ALPHA || 143 dstA == PIPE_BLENDFACTOR_ONE); 144} 145 146static boolean blend_discard_if_src_alpha_color_1(unsigned srcRGB, unsigned srcA, 147 unsigned dstRGB, unsigned dstA) 148{ 149 /* If the blend equation is ADD or REVERSE_SUBTRACT, 150 * SRC_ALPHA_COLOR == (1,1,1,1), and the following state is set, 151 * the colorbuffer will not be changed. 152 * Notice that the dst factors are the src factors inverted. */ 153 return (srcRGB == PIPE_BLENDFACTOR_INV_SRC_COLOR || 154 srcRGB == PIPE_BLENDFACTOR_INV_SRC_ALPHA || 155 srcRGB == PIPE_BLENDFACTOR_ZERO) && 156 (srcA == PIPE_BLENDFACTOR_INV_SRC_COLOR || 157 srcA == PIPE_BLENDFACTOR_INV_SRC_ALPHA || 158 srcA == PIPE_BLENDFACTOR_ZERO) && 159 (dstRGB == PIPE_BLENDFACTOR_SRC_COLOR || 160 dstRGB == PIPE_BLENDFACTOR_SRC_ALPHA || 161 dstRGB == PIPE_BLENDFACTOR_ONE) && 162 (dstA == PIPE_BLENDFACTOR_SRC_COLOR || 163 dstA == PIPE_BLENDFACTOR_SRC_ALPHA || 164 dstA == PIPE_BLENDFACTOR_ONE); 165} 166 167static unsigned bgra_cmask(unsigned mask) 168{ 169 /* Gallium uses RGBA color ordering while R300 expects BGRA. */ 170 171 return ((mask & PIPE_MASK_R) << 2) | 172 ((mask & PIPE_MASK_B) >> 2) | 173 (mask & (PIPE_MASK_G | PIPE_MASK_A)); 174} 175 176/* Create a new blend state based on the CSO blend state. 177 * 178 * This encompasses alpha blending, logic/raster ops, and blend dithering. */ 179static void* r300_create_blend_state(struct pipe_context* pipe, 180 const struct pipe_blend_state* state) 181{ 182 struct r300_screen* r300screen = r300_screen(pipe->screen); 183 struct r300_blend_state* blend = CALLOC_STRUCT(r300_blend_state); 184 185 if (state->rt[0].blend_enable) 186 { 187 unsigned eqRGB = state->rt[0].rgb_func; 188 unsigned srcRGB = state->rt[0].rgb_src_factor; 189 unsigned dstRGB = state->rt[0].rgb_dst_factor; 190 191 unsigned eqA = state->rt[0].alpha_func; 192 unsigned srcA = state->rt[0].alpha_src_factor; 193 unsigned dstA = state->rt[0].alpha_dst_factor; 194 195 /* despite the name, ALPHA_BLEND_ENABLE has nothing to do with alpha, 196 * this is just the crappy D3D naming */ 197 blend->blend_control = R300_ALPHA_BLEND_ENABLE | 198 r300_translate_blend_function(eqRGB) | 199 ( r300_translate_blend_factor(srcRGB) << R300_SRC_BLEND_SHIFT) | 200 ( r300_translate_blend_factor(dstRGB) << R300_DST_BLEND_SHIFT); 201 202 /* Optimization: some operations do not require the destination color. 203 * 204 * When SRC_ALPHA_SATURATE is used, colorbuffer reads must be enabled, 205 * otherwise blending gives incorrect results. It seems to be 206 * a hardware bug. */ 207 if (eqRGB == PIPE_BLEND_MIN || eqA == PIPE_BLEND_MIN || 208 eqRGB == PIPE_BLEND_MAX || eqA == PIPE_BLEND_MAX || 209 dstRGB != PIPE_BLENDFACTOR_ZERO || 210 dstA != PIPE_BLENDFACTOR_ZERO || 211 srcRGB == PIPE_BLENDFACTOR_DST_COLOR || 212 srcRGB == PIPE_BLENDFACTOR_DST_ALPHA || 213 srcRGB == PIPE_BLENDFACTOR_INV_DST_COLOR || 214 srcRGB == PIPE_BLENDFACTOR_INV_DST_ALPHA || 215 srcA == PIPE_BLENDFACTOR_DST_COLOR || 216 srcA == PIPE_BLENDFACTOR_DST_ALPHA || 217 srcA == PIPE_BLENDFACTOR_INV_DST_COLOR || 218 srcA == PIPE_BLENDFACTOR_INV_DST_ALPHA || 219 srcRGB == PIPE_BLENDFACTOR_SRC_ALPHA_SATURATE) { 220 /* Enable reading from the colorbuffer. */ 221 blend->blend_control |= R300_READ_ENABLE; 222 223 if (r300_screen(r300_context(pipe)->context.screen)->caps->is_r500) { 224 /* Optimization: Depending on incoming pixels, we can 225 * conditionally disable the reading in hardware... */ 226 if (eqRGB != PIPE_BLEND_MIN && eqA != PIPE_BLEND_MIN && 227 eqRGB != PIPE_BLEND_MAX && eqA != PIPE_BLEND_MAX) { 228 /* Disable reading if SRC_ALPHA == 0. */ 229 if ((dstRGB == PIPE_BLENDFACTOR_SRC_ALPHA || 230 dstRGB == PIPE_BLENDFACTOR_ZERO) && 231 (dstA == PIPE_BLENDFACTOR_SRC_COLOR || 232 dstA == PIPE_BLENDFACTOR_SRC_ALPHA || 233 dstA == PIPE_BLENDFACTOR_ZERO)) { 234 blend->blend_control |= R500_SRC_ALPHA_0_NO_READ; 235 } 236 237 /* Disable reading if SRC_ALPHA == 1. */ 238 if ((dstRGB == PIPE_BLENDFACTOR_INV_SRC_ALPHA || 239 dstRGB == PIPE_BLENDFACTOR_ZERO) && 240 (dstA == PIPE_BLENDFACTOR_INV_SRC_COLOR || 241 dstA == PIPE_BLENDFACTOR_INV_SRC_ALPHA || 242 dstA == PIPE_BLENDFACTOR_ZERO)) { 243 blend->blend_control |= R500_SRC_ALPHA_1_NO_READ; 244 } 245 } 246 } 247 } 248 249 /* Optimization: discard pixels which don't change the colorbuffer. 250 * 251 * The code below is non-trivial and some math is involved. 252 * 253 * Discarding pixels must be disabled when FP16 AA is enabled. 254 * This is a hardware bug. Also, this implementation wouldn't work 255 * with FP blending enabled and equation clamping disabled. 256 * 257 * Equations other than ADD are rarely used and therefore won't be 258 * optimized. */ 259 if ((eqRGB == PIPE_BLEND_ADD || eqRGB == PIPE_BLEND_REVERSE_SUBTRACT) && 260 (eqA == PIPE_BLEND_ADD || eqA == PIPE_BLEND_REVERSE_SUBTRACT)) { 261 /* ADD: X+Y 262 * REVERSE_SUBTRACT: Y-X 263 * 264 * The idea is: 265 * If X = src*srcFactor = 0 and Y = dst*dstFactor = 1, 266 * then CB will not be changed. 267 * 268 * Given the srcFactor and dstFactor variables, we can derive 269 * what src and dst should be equal to and discard appropriate 270 * pixels. 271 */ 272 if (blend_discard_if_src_alpha_0(srcRGB, srcA, dstRGB, dstA)) { 273 blend->blend_control |= R300_DISCARD_SRC_PIXELS_SRC_ALPHA_0; 274 } else if (blend_discard_if_src_alpha_1(srcRGB, srcA, 275 dstRGB, dstA)) { 276 blend->blend_control |= R300_DISCARD_SRC_PIXELS_SRC_ALPHA_1; 277 } else if (blend_discard_if_src_color_0(srcRGB, srcA, 278 dstRGB, dstA)) { 279 blend->blend_control |= R300_DISCARD_SRC_PIXELS_SRC_COLOR_0; 280 } else if (blend_discard_if_src_color_1(srcRGB, srcA, 281 dstRGB, dstA)) { 282 blend->blend_control |= R300_DISCARD_SRC_PIXELS_SRC_COLOR_1; 283 } else if (blend_discard_if_src_alpha_color_0(srcRGB, srcA, 284 dstRGB, dstA)) { 285 blend->blend_control |= 286 R300_DISCARD_SRC_PIXELS_SRC_ALPHA_COLOR_0; 287 } else if (blend_discard_if_src_alpha_color_1(srcRGB, srcA, 288 dstRGB, dstA)) { 289 blend->blend_control |= 290 R300_DISCARD_SRC_PIXELS_SRC_ALPHA_COLOR_1; 291 } 292 } 293 294 /* separate alpha */ 295 if (srcA != srcRGB || dstA != dstRGB || eqA != eqRGB) { 296 blend->blend_control |= R300_SEPARATE_ALPHA_ENABLE; 297 blend->alpha_blend_control = 298 r300_translate_blend_function(eqA) | 299 (r300_translate_blend_factor(srcA) << R300_SRC_BLEND_SHIFT) | 300 (r300_translate_blend_factor(dstA) << R300_DST_BLEND_SHIFT); 301 } 302 } 303 304 /* PIPE_LOGICOP_* don't need to be translated, fortunately. */ 305 if (state->logicop_enable) { 306 blend->rop = R300_RB3D_ROPCNTL_ROP_ENABLE | 307 (state->logicop_func) << R300_RB3D_ROPCNTL_ROP_SHIFT; 308 } 309 310 /* Color channel masks for all MRTs. */ 311 blend->color_channel_mask = bgra_cmask(state->rt[0].colormask); 312 if (r300screen->caps->is_r500 && state->independent_blend_enable) { 313 if (state->rt[1].blend_enable) { 314 blend->color_channel_mask |= bgra_cmask(state->rt[1].colormask) << 4; 315 } 316 if (state->rt[2].blend_enable) { 317 blend->color_channel_mask |= bgra_cmask(state->rt[2].colormask) << 8; 318 } 319 if (state->rt[3].blend_enable) { 320 blend->color_channel_mask |= bgra_cmask(state->rt[3].colormask) << 12; 321 } 322 } 323 324 if (state->dither) { 325 blend->dither = R300_RB3D_DITHER_CTL_DITHER_MODE_LUT | 326 R300_RB3D_DITHER_CTL_ALPHA_DITHER_MODE_LUT; 327 } 328 329 return (void*)blend; 330} 331 332/* Bind blend state. */ 333static void r300_bind_blend_state(struct pipe_context* pipe, 334 void* state) 335{ 336 struct r300_context* r300 = r300_context(pipe); 337 338 UPDATE_STATE(state, r300->blend_state); 339} 340 341/* Free blend state. */ 342static void r300_delete_blend_state(struct pipe_context* pipe, 343 void* state) 344{ 345 FREE(state); 346} 347 348/* Convert float to 10bit integer */ 349static unsigned float_to_fixed10(float f) 350{ 351 return CLAMP((unsigned)(f * 1023.9f), 0, 1023); 352} 353 354/* Set blend color. 355 * Setup both R300 and R500 registers, figure out later which one to write. */ 356static void r300_set_blend_color(struct pipe_context* pipe, 357 const struct pipe_blend_color* color) 358{ 359 struct r300_context* r300 = r300_context(pipe); 360 struct r300_screen* r300screen = r300_screen(pipe->screen); 361 struct r300_blend_color_state* state = 362 (struct r300_blend_color_state*)r300->blend_color_state.state; 363 union util_color uc; 364 365 util_pack_color(color->color, PIPE_FORMAT_B8G8R8A8_UNORM, &uc); 366 state->blend_color = uc.ui; 367 368 /* XXX if FP16 blending is enabled, we should use the FP16 format */ 369 state->blend_color_red_alpha = 370 float_to_fixed10(color->color[0]) | 371 (float_to_fixed10(color->color[3]) << 16); 372 state->blend_color_green_blue = 373 float_to_fixed10(color->color[2]) | 374 (float_to_fixed10(color->color[1]) << 16); 375 376 r300->blend_color_state.size = r300screen->caps->is_r500 ? 3 : 2; 377 r300->blend_color_state.dirty = TRUE; 378} 379 380static void r300_set_clip_state(struct pipe_context* pipe, 381 const struct pipe_clip_state* state) 382{ 383 struct r300_context* r300 = r300_context(pipe); 384 385 r300->clip = *state; 386 387 if (r300_screen(pipe->screen)->caps->has_tcl) { 388 memcpy(r300->clip_state.state, state, sizeof(struct pipe_clip_state)); 389 r300->clip_state.size = 29; 390 } else { 391 draw_flush(r300->draw); 392 draw_set_clip_state(r300->draw, state); 393 r300->clip_state.size = 2; 394 } 395 396 r300->clip_state.dirty = TRUE; 397} 398 399/* Create a new depth, stencil, and alpha state based on the CSO dsa state. 400 * 401 * This contains the depth buffer, stencil buffer, alpha test, and such. 402 * On the Radeon, depth and stencil buffer setup are intertwined, which is 403 * the reason for some of the strange-looking assignments across registers. */ 404static void* 405 r300_create_dsa_state(struct pipe_context* pipe, 406 const struct pipe_depth_stencil_alpha_state* state) 407{ 408 struct r300_capabilities *caps = 409 r300_screen(r300_context(pipe)->context.screen)->caps; 410 struct r300_dsa_state* dsa = CALLOC_STRUCT(r300_dsa_state); 411 412 /* Depth test setup. */ 413 if (state->depth.enabled) { 414 dsa->z_buffer_control |= R300_Z_ENABLE; 415 416 if (state->depth.writemask) { 417 dsa->z_buffer_control |= R300_Z_WRITE_ENABLE; 418 } 419 420 dsa->z_stencil_control |= 421 (r300_translate_depth_stencil_function(state->depth.func) << 422 R300_Z_FUNC_SHIFT); 423 } 424 425 /* Stencil buffer setup. */ 426 if (state->stencil[0].enabled) { 427 dsa->z_buffer_control |= R300_STENCIL_ENABLE; 428 dsa->z_stencil_control |= 429 (r300_translate_depth_stencil_function(state->stencil[0].func) << 430 R300_S_FRONT_FUNC_SHIFT) | 431 (r300_translate_stencil_op(state->stencil[0].fail_op) << 432 R300_S_FRONT_SFAIL_OP_SHIFT) | 433 (r300_translate_stencil_op(state->stencil[0].zpass_op) << 434 R300_S_FRONT_ZPASS_OP_SHIFT) | 435 (r300_translate_stencil_op(state->stencil[0].zfail_op) << 436 R300_S_FRONT_ZFAIL_OP_SHIFT); 437 438 dsa->stencil_ref_mask = 439 (state->stencil[0].valuemask << R300_STENCILMASK_SHIFT) | 440 (state->stencil[0].writemask << R300_STENCILWRITEMASK_SHIFT); 441 442 if (state->stencil[1].enabled) { 443 dsa->z_buffer_control |= R300_STENCIL_FRONT_BACK; 444 dsa->z_stencil_control |= 445 (r300_translate_depth_stencil_function(state->stencil[1].func) << 446 R300_S_BACK_FUNC_SHIFT) | 447 (r300_translate_stencil_op(state->stencil[1].fail_op) << 448 R300_S_BACK_SFAIL_OP_SHIFT) | 449 (r300_translate_stencil_op(state->stencil[1].zpass_op) << 450 R300_S_BACK_ZPASS_OP_SHIFT) | 451 (r300_translate_stencil_op(state->stencil[1].zfail_op) << 452 R300_S_BACK_ZFAIL_OP_SHIFT); 453 454 if (caps->is_r500) 455 { 456 dsa->z_buffer_control |= R500_STENCIL_REFMASK_FRONT_BACK; 457 dsa->stencil_ref_bf = 458 (state->stencil[1].valuemask << 459 R300_STENCILMASK_SHIFT) | 460 (state->stencil[1].writemask << 461 R300_STENCILWRITEMASK_SHIFT); 462 } 463 } 464 } 465 466 /* Alpha test setup. */ 467 if (state->alpha.enabled) { 468 dsa->alpha_function = 469 r300_translate_alpha_function(state->alpha.func) | 470 R300_FG_ALPHA_FUNC_ENABLE; 471 472 /* We could use 10bit alpha ref but who needs that? */ 473 dsa->alpha_function |= float_to_ubyte(state->alpha.ref_value); 474 475 if (caps->is_r500) 476 dsa->alpha_function |= R500_FG_ALPHA_FUNC_8BIT; 477 } 478 479 return (void*)dsa; 480} 481 482/* Bind DSA state. */ 483static void r300_bind_dsa_state(struct pipe_context* pipe, 484 void* state) 485{ 486 struct r300_context* r300 = r300_context(pipe); 487 488 UPDATE_STATE(state, r300->dsa_state); 489} 490 491/* Free DSA state. */ 492static void r300_delete_dsa_state(struct pipe_context* pipe, 493 void* state) 494{ 495 FREE(state); 496} 497 498static void r300_set_stencil_ref(struct pipe_context* pipe, 499 const struct pipe_stencil_ref* sr) 500{ 501 struct r300_context* r300 = r300_context(pipe); 502 r300->stencil_ref = *sr; 503 r300->dsa_state.dirty = TRUE; 504} 505 506/* This switcheroo is needed just because of goddamned MACRO_SWITCH. */ 507static void r300_fb_update_tiling_flags(struct r300_context *r300, 508 const struct pipe_framebuffer_state *old_state, 509 const struct pipe_framebuffer_state *new_state) 510{ 511 struct r300_texture *tex; 512 unsigned i, j, level; 513 514 /* Reset tiling flags for old surfaces to default values. */ 515 for (i = 0; i < old_state->nr_cbufs; i++) { 516 for (j = 0; j < new_state->nr_cbufs; j++) { 517 if (old_state->cbufs[i]->texture == new_state->cbufs[j]->texture) { 518 break; 519 } 520 } 521 /* If not binding the surface again... */ 522 if (j != new_state->nr_cbufs) { 523 continue; 524 } 525 526 tex = (struct r300_texture*)old_state->cbufs[i]->texture; 527 528 if (tex) { 529 r300->rws->buffer_set_tiling(r300->rws, tex->buffer, 530 tex->pitch[0], 531 tex->microtile != 0, 532 tex->macrotile != 0); 533 } 534 } 535 if (old_state->zsbuf && 536 (!new_state->zsbuf || 537 old_state->zsbuf->texture != new_state->zsbuf->texture)) { 538 tex = (struct r300_texture*)old_state->zsbuf->texture; 539 540 if (tex) { 541 r300->rws->buffer_set_tiling(r300->rws, tex->buffer, 542 tex->pitch[0], 543 tex->microtile != 0, 544 tex->macrotile != 0); 545 } 546 } 547 548 /* Set tiling flags for new surfaces. */ 549 for (i = 0; i < new_state->nr_cbufs; i++) { 550 tex = (struct r300_texture*)new_state->cbufs[i]->texture; 551 level = new_state->cbufs[i]->level; 552 553 r300->rws->buffer_set_tiling(r300->rws, tex->buffer, 554 tex->pitch[level], 555 tex->microtile != 0, 556 tex->mip_macrotile[level] != 0); 557 } 558 if (new_state->zsbuf) { 559 tex = (struct r300_texture*)new_state->zsbuf->texture; 560 level = new_state->zsbuf->level; 561 562 r300->rws->buffer_set_tiling(r300->rws, tex->buffer, 563 tex->pitch[level], 564 tex->microtile != 0, 565 tex->mip_macrotile[level] != 0); 566 } 567} 568 569static void 570 r300_set_framebuffer_state(struct pipe_context* pipe, 571 const struct pipe_framebuffer_state* state) 572{ 573 struct r300_context* r300 = r300_context(pipe); 574 struct r300_screen* r300screen = r300_screen(pipe->screen); 575 struct pipe_framebuffer_state *old_state = r300->fb_state.state; 576 unsigned max_width, max_height; 577 uint32_t zbuffer_bpp = 0; 578 579 580 if (state->nr_cbufs > 4) { 581 debug_printf("r300: Implementation error: Too many MRTs in %s, " 582 "refusing to bind framebuffer state!\n", __FUNCTION__); 583 return; 584 } 585 586 if (r300screen->caps->is_r500) { 587 max_width = max_height = 4096; 588 } else if (r300screen->caps->is_r400) { 589 max_width = max_height = 4021; 590 } else { 591 max_width = max_height = 2560; 592 } 593 594 if (state->width > max_width || state->height > max_height) { 595 debug_printf("r300: Implementation error: Render targets are too " 596 "big in %s, refusing to bind framebuffer state!\n", __FUNCTION__); 597 return; 598 } 599 600 if (r300->draw) { 601 draw_flush(r300->draw); 602 } 603 604 r300->fb_state.dirty = TRUE; 605 606 /* If nr_cbufs is changed from zero to non-zero or vice versa... */ 607 if (!!old_state->nr_cbufs != !!state->nr_cbufs) { 608 r300->blend_state.dirty = TRUE; 609 } 610 /* If zsbuf is set from NULL to non-NULL or vice versa.. */ 611 if (!!old_state->zsbuf != !!state->zsbuf) { 612 r300->dsa_state.dirty = TRUE; 613 } 614 if (!r300->scissor_enabled) { 615 r300->scissor_state.dirty = TRUE; 616 } 617 618 r300_fb_update_tiling_flags(r300, r300->fb_state.state, state); 619 620 memcpy(r300->fb_state.state, state, sizeof(struct pipe_framebuffer_state)); 621 622 r300->fb_state.size = (10 * state->nr_cbufs) + (2 * (4 - state->nr_cbufs)) + 623 (state->zsbuf ? 10 : 0) + 8; 624 625 /* Polygon offset depends on the zbuffer bit depth. */ 626 if (state->zsbuf && r300->polygon_offset_enabled) { 627 switch (util_format_get_blocksize(state->zsbuf->texture->format)) { 628 case 2: 629 zbuffer_bpp = 16; 630 break; 631 case 4: 632 zbuffer_bpp = 24; 633 break; 634 } 635 636 if (r300->zbuffer_bpp != zbuffer_bpp) { 637 r300->zbuffer_bpp = zbuffer_bpp; 638 r300->rs_state.dirty = TRUE; 639 } 640 } 641} 642 643/* Create fragment shader state. */ 644static void* r300_create_fs_state(struct pipe_context* pipe, 645 const struct pipe_shader_state* shader) 646{ 647 struct r300_fragment_shader* fs = NULL; 648 649 fs = (struct r300_fragment_shader*)CALLOC_STRUCT(r300_fragment_shader); 650 651 /* Copy state directly into shader. */ 652 fs->state = *shader; 653 fs->state.tokens = tgsi_dup_tokens(shader->tokens); 654 655 tgsi_scan_shader(shader->tokens, &fs->info); 656 r300_shader_read_fs_inputs(&fs->info, &fs->inputs); 657 658 return (void*)fs; 659} 660 661/* Bind fragment shader state. */ 662static void r300_bind_fs_state(struct pipe_context* pipe, void* shader) 663{ 664 struct r300_context* r300 = r300_context(pipe); 665 struct r300_fragment_shader* fs = (struct r300_fragment_shader*)shader; 666 667 if (fs == NULL) { 668 r300->fs = NULL; 669 return; 670 } 671 672 r300->fs = fs; 673 r300_pick_fragment_shader(r300); 674 675 r300->rs_block_state.dirty = TRUE; /* Will be updated before the emission. */ 676 677 if (r300->vs_state.state && r300_vertex_shader_setup_wpos(r300)) { 678 r300->vap_output_state.dirty = TRUE; 679 } 680 681 r300->dirty_state |= R300_NEW_FRAGMENT_SHADER | R300_NEW_FRAGMENT_SHADER_CONSTANTS; 682} 683 684/* Delete fragment shader state. */ 685static void r300_delete_fs_state(struct pipe_context* pipe, void* shader) 686{ 687 struct r300_fragment_shader* fs = (struct r300_fragment_shader*)shader; 688 struct r300_fragment_shader_code *tmp, *ptr = fs->first; 689 690 while (ptr) { 691 tmp = ptr; 692 ptr = ptr->next; 693 rc_constants_destroy(&tmp->code.constants); 694 FREE(tmp); 695 } 696 FREE((void*)fs->state.tokens); 697 FREE(shader); 698} 699 700static void r300_set_polygon_stipple(struct pipe_context* pipe, 701 const struct pipe_poly_stipple* state) 702{ 703 /* XXX no idea how to set this up, but not terribly important */ 704} 705 706/* Create a new rasterizer state based on the CSO rasterizer state. 707 * 708 * This is a very large chunk of state, and covers most of the graphics 709 * backend (GB), geometry assembly (GA), and setup unit (SU) blocks. 710 * 711 * In a not entirely unironic sidenote, this state has nearly nothing to do 712 * with the actual block on the Radeon called the rasterizer (RS). */ 713static void* r300_create_rs_state(struct pipe_context* pipe, 714 const struct pipe_rasterizer_state* state) 715{ 716 struct r300_screen* r300screen = r300_screen(pipe->screen); 717 struct r300_rs_state* rs = CALLOC_STRUCT(r300_rs_state); 718 719 /* Copy rasterizer state for Draw. */ 720 rs->rs = *state; 721 722#ifdef PIPE_ARCH_LITTLE_ENDIAN 723 rs->vap_control_status = R300_VC_NO_SWAP; 724#else 725 rs->vap_control_status = R300_VC_32BIT_SWAP; 726#endif 727 728 /* If no TCL engine is present, turn off the HW TCL. */ 729 if (!r300screen->caps->has_tcl) { 730 rs->vap_control_status |= R300_VAP_TCL_BYPASS; 731 } 732 733 rs->point_size = pack_float_16_6x(state->point_size) | 734 (pack_float_16_6x(state->point_size) << R300_POINTSIZE_X_SHIFT); 735 736 rs->line_control = pack_float_16_6x(state->line_width) | 737 R300_GA_LINE_CNTL_END_TYPE_COMP; 738 739 /* Enable polygon mode */ 740 if (state->fill_cw != PIPE_POLYGON_MODE_FILL || 741 state->fill_ccw != PIPE_POLYGON_MODE_FILL) { 742 rs->polygon_mode = R300_GA_POLY_MODE_DUAL; 743 } 744 745 /* Radeons don't think in "CW/CCW", they think in "front/back". */ 746 if (state->front_winding == PIPE_WINDING_CW) { 747 rs->cull_mode = R300_FRONT_FACE_CW; 748 749 /* Polygon offset */ 750 if (state->offset_cw) { 751 rs->polygon_offset_enable |= R300_FRONT_ENABLE; 752 } 753 if (state->offset_ccw) { 754 rs->polygon_offset_enable |= R300_BACK_ENABLE; 755 } 756 757 /* Polygon mode */ 758 if (rs->polygon_mode) { 759 rs->polygon_mode |= 760 r300_translate_polygon_mode_front(state->fill_cw); 761 rs->polygon_mode |= 762 r300_translate_polygon_mode_back(state->fill_ccw); 763 } 764 } else { 765 rs->cull_mode = R300_FRONT_FACE_CCW; 766 767 /* Polygon offset */ 768 if (state->offset_ccw) { 769 rs->polygon_offset_enable |= R300_FRONT_ENABLE; 770 } 771 if (state->offset_cw) { 772 rs->polygon_offset_enable |= R300_BACK_ENABLE; 773 } 774 775 /* Polygon mode */ 776 if (rs->polygon_mode) { 777 rs->polygon_mode |= 778 r300_translate_polygon_mode_front(state->fill_ccw); 779 rs->polygon_mode |= 780 r300_translate_polygon_mode_back(state->fill_cw); 781 } 782 } 783 if (state->front_winding & state->cull_mode) { 784 rs->cull_mode |= R300_CULL_FRONT; 785 } 786 if (~(state->front_winding) & state->cull_mode) { 787 rs->cull_mode |= R300_CULL_BACK; 788 } 789 790 if (rs->polygon_offset_enable) { 791 rs->depth_offset = state->offset_units; 792 rs->depth_scale = state->offset_scale; 793 } 794 795 if (state->line_stipple_enable) { 796 rs->line_stipple_config = 797 R300_GA_LINE_STIPPLE_CONFIG_LINE_RESET_LINE | 798 (fui((float)state->line_stipple_factor) & 799 R300_GA_LINE_STIPPLE_CONFIG_STIPPLE_SCALE_MASK); 800 /* XXX this might need to be scaled up */ 801 rs->line_stipple_value = state->line_stipple_pattern; 802 } 803 804 if (state->flatshade) { 805 rs->color_control = R300_SHADE_MODEL_FLAT; 806 } else { 807 rs->color_control = R300_SHADE_MODEL_SMOOTH; 808 } 809 810 return (void*)rs; 811} 812 813/* Bind rasterizer state. */ 814static void r300_bind_rs_state(struct pipe_context* pipe, void* state) 815{ 816 struct r300_context* r300 = r300_context(pipe); 817 struct r300_rs_state* rs = (struct r300_rs_state*)state; 818 boolean scissor_was_enabled = r300->scissor_enabled; 819 820 if (r300->draw) { 821 draw_flush(r300->draw); 822 draw_set_rasterizer_state(r300->draw, &rs->rs); 823 } 824 825 if (rs) { 826 r300->polygon_offset_enabled = rs->rs.offset_cw || rs->rs.offset_ccw; 827 r300->scissor_enabled = rs->rs.scissor; 828 } else { 829 r300->polygon_offset_enabled = FALSE; 830 r300->scissor_enabled = FALSE; 831 } 832 833 UPDATE_STATE(state, r300->rs_state); 834 r300->rs_state.size = 17 + (r300->polygon_offset_enabled ? 5 : 0); 835 836 if (scissor_was_enabled != r300->scissor_enabled) { 837 r300->scissor_state.dirty = TRUE; 838 } 839} 840 841/* Free rasterizer state. */ 842static void r300_delete_rs_state(struct pipe_context* pipe, void* state) 843{ 844 FREE(state); 845} 846 847static void* 848 r300_create_sampler_state(struct pipe_context* pipe, 849 const struct pipe_sampler_state* state) 850{ 851 struct r300_context* r300 = r300_context(pipe); 852 struct r300_sampler_state* sampler = CALLOC_STRUCT(r300_sampler_state); 853 boolean is_r500 = r300_screen(pipe->screen)->caps->is_r500; 854 int lod_bias; 855 union util_color uc; 856 857 sampler->state = *state; 858 859 sampler->filter0 |= 860 (r300_translate_wrap(state->wrap_s) << R300_TX_WRAP_S_SHIFT) | 861 (r300_translate_wrap(state->wrap_t) << R300_TX_WRAP_T_SHIFT) | 862 (r300_translate_wrap(state->wrap_r) << R300_TX_WRAP_R_SHIFT); 863 864 sampler->filter0 |= r300_translate_tex_filters(state->min_img_filter, 865 state->mag_img_filter, 866 state->min_mip_filter, 867 state->max_anisotropy > 0); 868 869 sampler->filter0 |= r300_anisotropy(state->max_anisotropy); 870 871 /* Unfortunately, r300-r500 don't support floating-point mipmap lods. */ 872 /* We must pass these to the merge function to clamp them properly. */ 873 sampler->min_lod = MAX2((unsigned)state->min_lod, 0); 874 sampler->max_lod = MAX2((unsigned)ceilf(state->max_lod), 0); 875 876 lod_bias = CLAMP((int)(state->lod_bias * 32), -(1 << 9), (1 << 9) - 1); 877 878 sampler->filter1 |= lod_bias << R300_LOD_BIAS_SHIFT; 879 880 /* This is very high quality anisotropic filtering for R5xx. 881 * It's good for benchmarking the performance of texturing but 882 * in practice we don't want to slow down the driver because it's 883 * a pretty good performance killer. Feel free to play with it. */ 884 if (DBG_ON(r300, DBG_ANISOHQ) && is_r500) { 885 sampler->filter1 |= r500_anisotropy(state->max_anisotropy); 886 } 887 888 util_pack_color(state->border_color, PIPE_FORMAT_B8G8R8A8_UNORM, &uc); 889 sampler->border_color = uc.ui; 890 891 /* R500-specific fixups and optimizations */ 892 if (r300_screen(r300->context.screen)->caps->is_r500) { 893 sampler->filter1 |= R500_BORDER_FIX; 894 } 895 896 return (void*)sampler; 897} 898 899static void r300_bind_sampler_states(struct pipe_context* pipe, 900 unsigned count, 901 void** states) 902{ 903 struct r300_context* r300 = r300_context(pipe); 904 struct r300_textures_state* state = 905 (struct r300_textures_state*)r300->textures_state.state; 906 907 if (count > 8) { 908 return; 909 } 910 911 memcpy(state->sampler_states, states, sizeof(void*) * count); 912 state->sampler_count = count; 913 914 r300->textures_state.dirty = TRUE; 915 916 /* Pick a fragment shader based on the texture compare state. */ 917 if (r300->fs && count) { 918 if (r300_pick_fragment_shader(r300)) { 919 r300->dirty_state |= R300_NEW_FRAGMENT_SHADER | 920 R300_NEW_FRAGMENT_SHADER_CONSTANTS; 921 } 922 } 923} 924 925static void r300_lacks_vertex_textures(struct pipe_context* pipe, 926 unsigned count, 927 void** states) 928{ 929} 930 931static void r300_delete_sampler_state(struct pipe_context* pipe, void* state) 932{ 933 FREE(state); 934} 935 936static void r300_set_fragment_sampler_views(struct pipe_context* pipe, 937 unsigned count, 938 struct pipe_sampler_view** views) 939{ 940 struct r300_context* r300 = r300_context(pipe); 941 struct r300_textures_state* state = 942 (struct r300_textures_state*)r300->textures_state.state; 943 unsigned i; 944 boolean is_r500 = r300_screen(r300->context.screen)->caps->is_r500; 945 boolean dirty_tex = FALSE; 946 947 /* XXX magic num */ 948 if (count > 8) { 949 return; 950 } 951 952 for (i = 0; i < count; i++) { 953 if (state->fragment_sampler_views[i] != views[i]) { 954 struct r300_texture *texture; 955 956 pipe_sampler_view_reference(&state->fragment_sampler_views[i], 957 views[i]); 958 dirty_tex = TRUE; 959 960 texture = (struct r300_texture *)views[i]->texture; 961 962 /* R300-specific - set the texrect factor in the fragment shader */ 963 if (!is_r500 && texture->is_npot) { 964 /* XXX It would be nice to re-emit just 1 constant, 965 * XXX not all of them */ 966 r300->dirty_state |= R300_NEW_FRAGMENT_SHADER_CONSTANTS; 967 } 968 } 969 } 970 971 for (i = count; i < 8; i++) { 972 if (state->fragment_sampler_views[i]) { 973 pipe_sampler_view_reference(&state->fragment_sampler_views[i], 974 NULL); 975 } 976 } 977 978 state->texture_count = count; 979 980 r300->textures_state.dirty = TRUE; 981 982 if (dirty_tex) { 983 r300->texture_cache_inval.dirty = TRUE; 984 } 985} 986 987static struct pipe_sampler_view * 988r300_create_sampler_view(struct pipe_context *pipe, 989 struct pipe_texture *texture, 990 const struct pipe_sampler_view *templ) 991{ 992 struct pipe_sampler_view *view = CALLOC_STRUCT(pipe_sampler_view); 993 994 if (view) { 995 *view = *templ; 996 view->reference.count = 1; 997 view->texture = NULL; 998 pipe_texture_reference(&view->texture, texture); 999 view->context = pipe; 1000 } 1001 1002 return view; 1003} 1004 1005 1006static void 1007r300_sampler_view_destroy(struct pipe_context *pipe, 1008 struct pipe_sampler_view *view) 1009{ 1010 pipe_texture_reference(&view->texture, NULL); 1011 FREE(view); 1012} 1013 1014static void r300_set_scissor_state(struct pipe_context* pipe, 1015 const struct pipe_scissor_state* state) 1016{ 1017 struct r300_context* r300 = r300_context(pipe); 1018 1019 memcpy(r300->scissor_state.state, state, 1020 sizeof(struct pipe_scissor_state)); 1021 1022 if (r300->scissor_enabled) { 1023 r300->scissor_state.dirty = TRUE; 1024 } 1025} 1026 1027static void r300_set_viewport_state(struct pipe_context* pipe, 1028 const struct pipe_viewport_state* state) 1029{ 1030 struct r300_context* r300 = r300_context(pipe); 1031 struct r300_viewport_state* viewport = 1032 (struct r300_viewport_state*)r300->viewport_state.state; 1033 1034 r300->viewport = *state; 1035 1036 /* Do the transform in HW. */ 1037 viewport->vte_control = R300_VTX_W0_FMT; 1038 1039 if (state->scale[0] != 1.0f) { 1040 viewport->xscale = state->scale[0]; 1041 viewport->vte_control |= R300_VPORT_X_SCALE_ENA; 1042 } 1043 if (state->scale[1] != 1.0f) { 1044 viewport->yscale = state->scale[1]; 1045 viewport->vte_control |= R300_VPORT_Y_SCALE_ENA; 1046 } 1047 if (state->scale[2] != 1.0f) { 1048 viewport->zscale = state->scale[2]; 1049 viewport->vte_control |= R300_VPORT_Z_SCALE_ENA; 1050 } 1051 if (state->translate[0] != 0.0f) { 1052 viewport->xoffset = state->translate[0]; 1053 viewport->vte_control |= R300_VPORT_X_OFFSET_ENA; 1054 } 1055 if (state->translate[1] != 0.0f) { 1056 viewport->yoffset = state->translate[1]; 1057 viewport->vte_control |= R300_VPORT_Y_OFFSET_ENA; 1058 } 1059 if (state->translate[2] != 0.0f) { 1060 viewport->zoffset = state->translate[2]; 1061 viewport->vte_control |= R300_VPORT_Z_OFFSET_ENA; 1062 } 1063 1064 r300->viewport_state.dirty = TRUE; 1065 if (r300->fs && r300->fs->inputs.wpos != ATTR_UNUSED) { 1066 r300->dirty_state |= R300_NEW_FRAGMENT_SHADER_CONSTANTS; 1067 } 1068} 1069 1070static void r300_set_vertex_buffers(struct pipe_context* pipe, 1071 unsigned count, 1072 const struct pipe_vertex_buffer* buffers) 1073{ 1074 struct r300_context* r300 = r300_context(pipe); 1075 int i; 1076 unsigned max_index = (1 << 24) - 1; 1077 boolean any_user_buffer = false; 1078 1079 if (count == r300->vertex_buffer_count && 1080 memcmp(r300->vertex_buffer, buffers, count * sizeof(buffers[0])) == 0) 1081 return; 1082 1083 for (i = 0; i < count; i++) { 1084 pipe_buffer_reference(&r300->vertex_buffer[i].buffer, buffers[i].buffer); 1085 if (r300_buffer_is_user_buffer(buffers[i].buffer)) 1086 any_user_buffer = true; 1087 max_index = MIN2(buffers[i].max_index, max_index); 1088 } 1089 1090 for ( ; i < r300->vertex_buffer_count; i++) 1091 pipe_buffer_reference(&r300->vertex_buffer[i].buffer, NULL); 1092 1093 memcpy(r300->vertex_buffer, buffers, 1094 sizeof(struct pipe_vertex_buffer) * count); 1095 1096 r300->vertex_buffer_count = count; 1097 r300->vertex_buffer_max_index = max_index; 1098 r300->any_user_vbs = any_user_buffer; 1099 1100 if (r300->draw) { 1101 draw_flush(r300->draw); 1102 draw_set_vertex_buffers(r300->draw, count, buffers); 1103 } 1104} 1105 1106static boolean r300_validate_aos(struct r300_context *r300) 1107{ 1108 struct pipe_vertex_buffer *vbuf = r300->vertex_buffer; 1109 struct pipe_vertex_element *velem = r300->velems->velem; 1110 int i; 1111 1112 /* Check if formats and strides are aligned to the size of DWORD. */ 1113 for (i = 0; i < r300->velems->count; i++) { 1114 if (vbuf[velem[i].vertex_buffer_index].stride % 4 != 0 || 1115 util_format_get_blocksize(velem[i].src_format) % 4 != 0) { 1116 return FALSE; 1117 } 1118 } 1119 return TRUE; 1120} 1121 1122static void r300_draw_emit_attrib(struct r300_context* r300, 1123 enum attrib_emit emit, 1124 enum interp_mode interp, 1125 int index) 1126{ 1127 struct r300_vertex_shader* vs = r300->vs_state.state; 1128 struct tgsi_shader_info* info = &vs->info; 1129 int output; 1130 1131 output = draw_find_shader_output(r300->draw, 1132 info->output_semantic_name[index], 1133 info->output_semantic_index[index]); 1134 draw_emit_vertex_attr(&r300->vertex_info, emit, interp, output); 1135} 1136 1137static void r300_draw_emit_all_attribs(struct r300_context* r300) 1138{ 1139 struct r300_vertex_shader* vs = r300->vs_state.state; 1140 struct r300_shader_semantics* vs_outputs = &vs->outputs; 1141 int i, gen_count; 1142 1143 /* Position. */ 1144 if (vs_outputs->pos != ATTR_UNUSED) { 1145 r300_draw_emit_attrib(r300, EMIT_4F, INTERP_PERSPECTIVE, 1146 vs_outputs->pos); 1147 } else { 1148 assert(0); 1149 } 1150 1151 /* Point size. */ 1152 if (vs_outputs->psize != ATTR_UNUSED) { 1153 r300_draw_emit_attrib(r300, EMIT_1F_PSIZE, INTERP_POS, 1154 vs_outputs->psize); 1155 } 1156 1157 /* Colors. */ 1158 for (i = 0; i < ATTR_COLOR_COUNT; i++) { 1159 if (vs_outputs->color[i] != ATTR_UNUSED) { 1160 r300_draw_emit_attrib(r300, EMIT_4F, INTERP_LINEAR, 1161 vs_outputs->color[i]); 1162 } 1163 } 1164 1165 /* XXX Back-face colors. */ 1166 1167 /* Texture coordinates. */ 1168 gen_count = 0; 1169 for (i = 0; i < ATTR_GENERIC_COUNT; i++) { 1170 if (vs_outputs->generic[i] != ATTR_UNUSED) { 1171 r300_draw_emit_attrib(r300, EMIT_4F, INTERP_PERSPECTIVE, 1172 vs_outputs->generic[i]); 1173 gen_count++; 1174 } 1175 } 1176 1177 /* Fog coordinates. */ 1178 if (vs_outputs->fog != ATTR_UNUSED) { 1179 r300_draw_emit_attrib(r300, EMIT_4F, INTERP_PERSPECTIVE, 1180 vs_outputs->fog); 1181 gen_count++; 1182 } 1183 1184 /* XXX magic */ 1185 assert(gen_count <= 8); 1186} 1187 1188/* Update the PSC tables. */ 1189static void r300_vertex_psc(struct r300_vertex_element_state *velems) 1190{ 1191 struct r300_vertex_stream_state *vstream = &velems->vertex_stream; 1192 uint16_t type, swizzle; 1193 enum pipe_format format; 1194 unsigned i; 1195 1196 assert(velems->count <= 16); 1197 1198 /* Vertex shaders have no semantics on their inputs, 1199 * so PSC should just route stuff based on the vertex elements, 1200 * and not on attrib information. */ 1201 for (i = 0; i < velems->count; i++) { 1202 format = velems->velem[i].src_format; 1203 1204 type = r300_translate_vertex_data_type(format) | 1205 (i << R300_DST_VEC_LOC_SHIFT); 1206 swizzle = r300_translate_vertex_data_swizzle(format); 1207 1208 if (i & 1) { 1209 vstream->vap_prog_stream_cntl[i >> 1] |= type << 16; 1210 vstream->vap_prog_stream_cntl_ext[i >> 1] |= swizzle << 16; 1211 } else { 1212 vstream->vap_prog_stream_cntl[i >> 1] |= type; 1213 vstream->vap_prog_stream_cntl_ext[i >> 1] |= swizzle; 1214 } 1215 } 1216 1217 /* Set the last vector in the PSC. */ 1218 if (i) { 1219 i -= 1; 1220 } 1221 vstream->vap_prog_stream_cntl[i >> 1] |= 1222 (R300_LAST_VEC << (i & 1 ? 16 : 0)); 1223 1224 vstream->count = (i >> 1) + 1; 1225} 1226 1227/* Update the PSC tables for SW TCL, using Draw. */ 1228static void r300_swtcl_vertex_psc(struct r300_context *r300, 1229 struct r300_vertex_element_state *velems) 1230{ 1231 struct r300_vertex_stream_state *vstream = &velems->vertex_stream; 1232 struct r300_vertex_shader* vs = r300->vs_state.state; 1233 struct vertex_info* vinfo = &r300->vertex_info; 1234 uint16_t type, swizzle; 1235 enum pipe_format format; 1236 unsigned i, attrib_count; 1237 int* vs_output_tab = vs->stream_loc_notcl; 1238 1239 /* For each Draw attribute, route it to the fragment shader according 1240 * to the vs_output_tab. */ 1241 attrib_count = vinfo->num_attribs; 1242 DBG(r300, DBG_DRAW, "r300: attrib count: %d\n", attrib_count); 1243 for (i = 0; i < attrib_count; i++) { 1244 DBG(r300, DBG_DRAW, "r300: attrib: offset %d, interp %d, size %d," 1245 " vs_output_tab %d\n", vinfo->attrib[i].src_index, 1246 vinfo->attrib[i].interp_mode, vinfo->attrib[i].emit, 1247 vs_output_tab[i]); 1248 } 1249 1250 for (i = 0; i < attrib_count; i++) { 1251 /* Make sure we have a proper destination for our attribute. */ 1252 assert(vs_output_tab[i] != -1); 1253 1254 format = draw_translate_vinfo_format(vinfo->attrib[i].emit); 1255 1256 /* Obtain the type of data in this attribute. */ 1257 type = r300_translate_vertex_data_type(format) | 1258 vs_output_tab[i] << R300_DST_VEC_LOC_SHIFT; 1259 1260 /* Obtain the swizzle for this attribute. Note that the default 1261 * swizzle in the hardware is not XYZW! */ 1262 swizzle = r300_translate_vertex_data_swizzle(format); 1263 1264 /* Add the attribute to the PSC table. */ 1265 if (i & 1) { 1266 vstream->vap_prog_stream_cntl[i >> 1] |= type << 16; 1267 vstream->vap_prog_stream_cntl_ext[i >> 1] |= swizzle << 16; 1268 } else { 1269 vstream->vap_prog_stream_cntl[i >> 1] |= type; 1270 vstream->vap_prog_stream_cntl_ext[i >> 1] |= swizzle; 1271 } 1272 } 1273 1274 /* Set the last vector in the PSC. */ 1275 if (i) { 1276 i -= 1; 1277 } 1278 vstream->vap_prog_stream_cntl[i >> 1] |= 1279 (R300_LAST_VEC << (i & 1 ? 16 : 0)); 1280 1281 vstream->count = (i >> 1) + 1; 1282} 1283 1284static void* r300_create_vertex_elements_state(struct pipe_context* pipe, 1285 unsigned count, 1286 const struct pipe_vertex_element* attribs) 1287{ 1288 struct r300_context *r300 = r300_context(pipe); 1289 struct r300_screen* r300screen = r300_screen(pipe->screen); 1290 struct r300_vertex_element_state *velems; 1291 1292 assert(count <= PIPE_MAX_ATTRIBS); 1293 velems = CALLOC_STRUCT(r300_vertex_element_state); 1294 if (velems != NULL) { 1295 velems->count = count; 1296 memcpy(velems->velem, attribs, sizeof(struct pipe_vertex_element) * count); 1297 1298 if (r300screen->caps->has_tcl) { 1299 r300_vertex_psc(velems); 1300 } else { 1301 memset(&r300->vertex_info, 0, sizeof(struct vertex_info)); 1302 r300_draw_emit_all_attribs(r300); 1303 draw_compute_vertex_size(&r300->vertex_info); 1304 r300_swtcl_vertex_psc(r300, velems); 1305 } 1306 } 1307 return velems; 1308} 1309 1310static void r300_bind_vertex_elements_state(struct pipe_context *pipe, 1311 void *state) 1312{ 1313 struct r300_context *r300 = r300_context(pipe); 1314 struct r300_vertex_element_state *velems = state; 1315 1316 if (velems == NULL) { 1317 return; 1318 } 1319 1320 r300->velems = velems; 1321 1322 if (r300->draw) { 1323 draw_flush(r300->draw); 1324 draw_set_vertex_elements(r300->draw, velems->count, velems->velem); 1325 } 1326 1327 if (!r300_validate_aos(r300)) { 1328 /* XXX We should fallback using draw. */ 1329 assert(0); 1330 abort(); 1331 } 1332 1333 UPDATE_STATE(&velems->vertex_stream, r300->vertex_stream_state); 1334 r300->vertex_stream_state.size = (1 + velems->vertex_stream.count) * 2; 1335} 1336 1337static void r300_delete_vertex_elements_state(struct pipe_context *pipe, void *state) 1338{ 1339 FREE(state); 1340} 1341 1342static void* r300_create_vs_state(struct pipe_context* pipe, 1343 const struct pipe_shader_state* shader) 1344{ 1345 struct r300_context* r300 = r300_context(pipe); 1346 1347 struct r300_vertex_shader* vs = CALLOC_STRUCT(r300_vertex_shader); 1348 r300_vertex_shader_common_init(vs, shader); 1349 1350 if (r300_screen(pipe->screen)->caps->has_tcl) { 1351 r300_translate_vertex_shader(r300, vs); 1352 } else { 1353 vs->draw_vs = draw_create_vertex_shader(r300->draw, shader); 1354 } 1355 1356 return vs; 1357} 1358 1359static void r300_bind_vs_state(struct pipe_context* pipe, void* shader) 1360{ 1361 struct r300_context* r300 = r300_context(pipe); 1362 struct r300_vertex_shader* vs = (struct r300_vertex_shader*)shader; 1363 1364 if (vs == NULL) { 1365 r300->vs_state.state = NULL; 1366 return; 1367 } 1368 if (vs == r300->vs_state.state) { 1369 return; 1370 } 1371 r300->vs_state.state = vs; 1372 1373 // VS output mapping for HWTCL or stream mapping for SWTCL to the RS block 1374 if (r300->fs) { 1375 r300_vertex_shader_setup_wpos(r300); 1376 } 1377 memcpy(r300->vap_output_state.state, &vs->vap_out, 1378 sizeof(struct r300_vap_output_state)); 1379 r300->vap_output_state.dirty = TRUE; 1380 1381 /* The majority of the RS block bits is dependent on the vertex shader. */ 1382 r300->rs_block_state.dirty = TRUE; /* Will be updated before the emission. */ 1383 1384 if (r300_screen(pipe->screen)->caps->has_tcl) { 1385 r300->vs_state.dirty = TRUE; 1386 r300->vs_state.size = vs->code.length + 9; 1387 1388 r300->pvs_flush.dirty = TRUE; 1389 1390 r300->dirty_state |= R300_NEW_VERTEX_SHADER_CONSTANTS; 1391 } else { 1392 draw_flush(r300->draw); 1393 draw_bind_vertex_shader(r300->draw, 1394 (struct draw_vertex_shader*)vs->draw_vs); 1395 } 1396} 1397 1398static void r300_delete_vs_state(struct pipe_context* pipe, void* shader) 1399{ 1400 struct r300_context* r300 = r300_context(pipe); 1401 struct r300_vertex_shader* vs = (struct r300_vertex_shader*)shader; 1402 1403 if (r300_screen(pipe->screen)->caps->has_tcl) { 1404 rc_constants_destroy(&vs->code.constants); 1405 } else { 1406 draw_delete_vertex_shader(r300->draw, 1407 (struct draw_vertex_shader*)vs->draw_vs); 1408 } 1409 1410 FREE((void*)vs->state.tokens); 1411 FREE(shader); 1412} 1413 1414static void r300_set_constant_buffer(struct pipe_context *pipe, 1415 uint shader, uint index, 1416 struct pipe_buffer *buf) 1417{ 1418 struct r300_context* r300 = r300_context(pipe); 1419 struct r300_screen *r300screen = r300_screen(pipe->screen); 1420 void *mapped; 1421 int max_size = 0; 1422 1423 if (buf == NULL || buf->size == 0 || 1424 (mapped = pipe_buffer_map(pipe->screen, buf, PIPE_BUFFER_USAGE_CPU_READ)) == NULL) 1425 { 1426 r300->shader_constants[shader].count = 0; 1427 return; 1428 } 1429 1430 assert((buf->size % 4 * sizeof(float)) == 0); 1431 1432 /* Check the size of the constant buffer. */ 1433 switch (shader) { 1434 case PIPE_SHADER_VERTEX: 1435 max_size = 256; 1436 break; 1437 case PIPE_SHADER_FRAGMENT: 1438 if (r300screen->caps->is_r500) { 1439 max_size = 256; 1440 /* XXX Implement emission of r400's extended constant buffer. */ 1441 /*} else if (r300screen->caps->is_r400) { 1442 max_size = 64;*/ 1443 } else { 1444 max_size = 32; 1445 } 1446 break; 1447 default: 1448 assert(0); 1449 } 1450 1451 /* XXX Subtract immediates and RC_STATE_* variables. */ 1452 if (buf->size > (sizeof(float) * 4 * max_size)) { 1453 debug_printf("r300: Max size of the constant buffer is " 1454 "%i*4 floats.\n", max_size); 1455 abort(); 1456 } 1457 1458 memcpy(r300->shader_constants[shader].constants, mapped, buf->size); 1459 r300->shader_constants[shader].count = buf->size / (4 * sizeof(float)); 1460 pipe_buffer_unmap(pipe->screen, buf); 1461 1462 if (shader == PIPE_SHADER_VERTEX) { 1463 if (r300screen->caps->has_tcl) { 1464 r300->dirty_state |= R300_NEW_VERTEX_SHADER_CONSTANTS; 1465 r300->pvs_flush.dirty = TRUE; 1466 } 1467 } 1468 else if (shader == PIPE_SHADER_FRAGMENT) 1469 r300->dirty_state |= R300_NEW_FRAGMENT_SHADER_CONSTANTS; 1470} 1471 1472void r300_init_state_functions(struct r300_context* r300) 1473{ 1474 r300->context.create_blend_state = r300_create_blend_state; 1475 r300->context.bind_blend_state = r300_bind_blend_state; 1476 r300->context.delete_blend_state = r300_delete_blend_state; 1477 1478 r300->context.set_blend_color = r300_set_blend_color; 1479 1480 r300->context.set_clip_state = r300_set_clip_state; 1481 1482 r300->context.set_constant_buffer = r300_set_constant_buffer; 1483 1484 r300->context.create_depth_stencil_alpha_state = r300_create_dsa_state; 1485 r300->context.bind_depth_stencil_alpha_state = r300_bind_dsa_state; 1486 r300->context.delete_depth_stencil_alpha_state = r300_delete_dsa_state; 1487 1488 r300->context.set_stencil_ref = r300_set_stencil_ref; 1489 1490 r300->context.set_framebuffer_state = r300_set_framebuffer_state; 1491 1492 r300->context.create_fs_state = r300_create_fs_state; 1493 r300->context.bind_fs_state = r300_bind_fs_state; 1494 r300->context.delete_fs_state = r300_delete_fs_state; 1495 1496 r300->context.set_polygon_stipple = r300_set_polygon_stipple; 1497 1498 r300->context.create_rasterizer_state = r300_create_rs_state; 1499 r300->context.bind_rasterizer_state = r300_bind_rs_state; 1500 r300->context.delete_rasterizer_state = r300_delete_rs_state; 1501 1502 r300->context.create_sampler_state = r300_create_sampler_state; 1503 r300->context.bind_fragment_sampler_states = r300_bind_sampler_states; 1504 r300->context.bind_vertex_sampler_states = r300_lacks_vertex_textures; 1505 r300->context.delete_sampler_state = r300_delete_sampler_state; 1506 1507 r300->context.set_fragment_sampler_views = r300_set_fragment_sampler_views; 1508 r300->context.create_sampler_view = r300_create_sampler_view; 1509 r300->context.sampler_view_destroy = r300_sampler_view_destroy; 1510 1511 r300->context.set_scissor_state = r300_set_scissor_state; 1512 1513 r300->context.set_viewport_state = r300_set_viewport_state; 1514 1515 r300->context.set_vertex_buffers = r300_set_vertex_buffers; 1516 1517 r300->context.create_vertex_elements_state = r300_create_vertex_elements_state; 1518 r300->context.bind_vertex_elements_state = r300_bind_vertex_elements_state; 1519 r300->context.delete_vertex_elements_state = r300_delete_vertex_elements_state; 1520 1521 r300->context.create_vs_state = r300_create_vs_state; 1522 r300->context.bind_vs_state = r300_bind_vs_state; 1523 r300->context.delete_vs_state = r300_delete_vs_state; 1524} 1525