r300_state.c revision 56a4342a0493ad1d502d4791ab941ef171d36e60
1/* 2 * Copyright 2008 Corbin Simpson <MostAwesomeDude@gmail.com> 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * on the rights to use, copy, modify, merge, publish, distribute, sub 8 * license, and/or sell copies of the Software, and to permit persons to whom 9 * the Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice (including the next 12 * paragraph) shall be included in all copies or substantial portions of the 13 * Software. 14 * 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL 18 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, 19 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR 20 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE 21 * USE OR OTHER DEALINGS IN THE SOFTWARE. */ 22 23#include "draw/draw_context.h" 24 25#include "util/u_math.h" 26#include "util/u_memory.h" 27#include "util/u_pack_color.h" 28 29#include "tgsi/tgsi_parse.h" 30 31#include "pipe/p_config.h" 32#include "pipe/internal/p_winsys_screen.h" 33 34#include "r300_context.h" 35#include "r300_reg.h" 36#include "r300_screen.h" 37#include "r300_state_inlines.h" 38#include "r300_fs.h" 39#include "r300_vs.h" 40 41/* r300_state: Functions used to intialize state context by translating 42 * Gallium state objects into semi-native r300 state objects. */ 43 44/* Create a new blend state based on the CSO blend state. 45 * 46 * This encompasses alpha blending, logic/raster ops, and blend dithering. */ 47static void* r300_create_blend_state(struct pipe_context* pipe, 48 const struct pipe_blend_state* state) 49{ 50 struct r300_blend_state* blend = CALLOC_STRUCT(r300_blend_state); 51 52 if (state->blend_enable) 53 { 54 unsigned eqRGB = state->rgb_func; 55 unsigned srcRGB = state->rgb_src_factor; 56 unsigned dstRGB = state->rgb_dst_factor; 57 58 unsigned eqA = state->alpha_func; 59 unsigned srcA = state->alpha_src_factor; 60 unsigned dstA = state->alpha_dst_factor; 61 62 /* despite the name, ALPHA_BLEND_ENABLE has nothing to do with alpha, 63 * this is just the crappy D3D naming */ 64 blend->blend_control = R300_ALPHA_BLEND_ENABLE | 65 r300_translate_blend_function(eqRGB) | 66 ( r300_translate_blend_factor(srcRGB) << R300_SRC_BLEND_SHIFT) | 67 ( r300_translate_blend_factor(dstRGB) << R300_DST_BLEND_SHIFT); 68 69 /* optimization: some operations do not require the destination color */ 70 if (eqRGB == PIPE_BLEND_MIN || eqA == PIPE_BLEND_MIN || 71 eqRGB == PIPE_BLEND_MAX || eqA == PIPE_BLEND_MAX || 72 dstRGB != PIPE_BLENDFACTOR_ZERO || 73 dstA != PIPE_BLENDFACTOR_ZERO || 74 srcRGB == PIPE_BLENDFACTOR_DST_COLOR || 75 srcRGB == PIPE_BLENDFACTOR_DST_ALPHA || 76 srcRGB == PIPE_BLENDFACTOR_INV_DST_COLOR || 77 srcRGB == PIPE_BLENDFACTOR_INV_DST_ALPHA || 78 srcA == PIPE_BLENDFACTOR_DST_COLOR || 79 srcA == PIPE_BLENDFACTOR_DST_ALPHA || 80 srcA == PIPE_BLENDFACTOR_INV_DST_COLOR || 81 srcA == PIPE_BLENDFACTOR_INV_DST_ALPHA) 82 blend->blend_control |= R300_READ_ENABLE; 83 84 /* XXX implement the optimization with DISCARD_SRC_PIXELS*/ 85 /* XXX implement the optimization with SRC_ALPHA_?_NO_READ */ 86 87 /* separate alpha */ 88 if (srcA != srcRGB || dstA != dstRGB || eqA != eqRGB) { 89 blend->blend_control |= R300_SEPARATE_ALPHA_ENABLE; 90 blend->alpha_blend_control = 91 r300_translate_blend_function(eqA) | 92 (r300_translate_blend_factor(srcA) << R300_SRC_BLEND_SHIFT) | 93 (r300_translate_blend_factor(dstA) << R300_DST_BLEND_SHIFT); 94 } 95 } 96 97 /* PIPE_LOGICOP_* don't need to be translated, fortunately. */ 98 if (state->logicop_enable) { 99 blend->rop = R300_RB3D_ROPCNTL_ROP_ENABLE | 100 (state->logicop_func) << R300_RB3D_ROPCNTL_ROP_SHIFT; 101 } 102 103 /* Color Channel Mask */ 104 if (state->colormask & PIPE_MASK_R) { 105 blend->color_channel_mask |= RB3D_COLOR_CHANNEL_MASK_RED_MASK0; 106 } 107 if (state->colormask & PIPE_MASK_G) { 108 blend->color_channel_mask |= RB3D_COLOR_CHANNEL_MASK_GREEN_MASK0; 109 } 110 if (state->colormask & PIPE_MASK_B) { 111 blend->color_channel_mask |= RB3D_COLOR_CHANNEL_MASK_BLUE_MASK0; 112 } 113 if (state->colormask & PIPE_MASK_A) { 114 blend->color_channel_mask |= RB3D_COLOR_CHANNEL_MASK_ALPHA_MASK0; 115 } 116 117 if (state->dither) { 118 blend->dither = R300_RB3D_DITHER_CTL_DITHER_MODE_LUT | 119 R300_RB3D_DITHER_CTL_ALPHA_DITHER_MODE_LUT; 120 } 121 122 return (void*)blend; 123} 124 125/* Bind blend state. */ 126static void r300_bind_blend_state(struct pipe_context* pipe, 127 void* state) 128{ 129 struct r300_context* r300 = r300_context(pipe); 130 131 r300->blend_state = (struct r300_blend_state*)state; 132 r300->dirty_state |= R300_NEW_BLEND; 133} 134 135/* Free blend state. */ 136static void r300_delete_blend_state(struct pipe_context* pipe, 137 void* state) 138{ 139 FREE(state); 140} 141 142/* Convert float to 10bit integer */ 143static unsigned float_to_fixed10(float f) 144{ 145 return CLAMP((unsigned)(f * 1023.9f), 0, 1023); 146} 147 148/* Set blend color. 149 * Setup both R300 and R500 registers, figure out later which one to write. */ 150static void r300_set_blend_color(struct pipe_context* pipe, 151 const struct pipe_blend_color* color) 152{ 153 struct r300_context* r300 = r300_context(pipe); 154 155 util_pack_color(color->color, PIPE_FORMAT_A8R8G8B8_UNORM, 156 &r300->blend_color_state->blend_color); 157 158 /* XXX if FP16 blending is enabled, we should use the FP16 format */ 159 r300->blend_color_state->blend_color_red_alpha = 160 float_to_fixed10(color->color[0]) | 161 (float_to_fixed10(color->color[3]) << 16); 162 r300->blend_color_state->blend_color_green_blue = 163 float_to_fixed10(color->color[2]) | 164 (float_to_fixed10(color->color[1]) << 16); 165 166 r300->dirty_state |= R300_NEW_BLEND_COLOR; 167} 168 169static void r300_set_clip_state(struct pipe_context* pipe, 170 const struct pipe_clip_state* state) 171{ 172 struct r300_context* r300 = r300_context(pipe); 173 174 if (r300_screen(pipe->screen)->caps->has_tcl) { 175 r300->clip_state = *state; 176 r300->dirty_state |= R300_NEW_CLIP; 177 } else { 178 draw_flush(r300->draw); 179 draw_set_clip_state(r300->draw, state); 180 } 181} 182 183/* Create a new depth, stencil, and alpha state based on the CSO dsa state. 184 * 185 * This contains the depth buffer, stencil buffer, alpha test, and such. 186 * On the Radeon, depth and stencil buffer setup are intertwined, which is 187 * the reason for some of the strange-looking assignments across registers. */ 188static void* 189 r300_create_dsa_state(struct pipe_context* pipe, 190 const struct pipe_depth_stencil_alpha_state* state) 191{ 192 struct r300_capabilities *caps = 193 r300_screen(r300_context(pipe)->context.screen)->caps; 194 struct r300_dsa_state* dsa = CALLOC_STRUCT(r300_dsa_state); 195 196 /* Depth test setup. */ 197 if (state->depth.enabled) { 198 dsa->z_buffer_control |= R300_Z_ENABLE; 199 200 if (state->depth.writemask) { 201 dsa->z_buffer_control |= R300_Z_WRITE_ENABLE; 202 } 203 204 dsa->z_stencil_control |= 205 (r300_translate_depth_stencil_function(state->depth.func) << 206 R300_Z_FUNC_SHIFT); 207 } 208 209 /* Stencil buffer setup. */ 210 if (state->stencil[0].enabled) { 211 dsa->z_buffer_control |= R300_STENCIL_ENABLE; 212 dsa->z_stencil_control |= 213 (r300_translate_depth_stencil_function(state->stencil[0].func) << 214 R300_S_FRONT_FUNC_SHIFT) | 215 (r300_translate_stencil_op(state->stencil[0].fail_op) << 216 R300_S_FRONT_SFAIL_OP_SHIFT) | 217 (r300_translate_stencil_op(state->stencil[0].zpass_op) << 218 R300_S_FRONT_ZPASS_OP_SHIFT) | 219 (r300_translate_stencil_op(state->stencil[0].zfail_op) << 220 R300_S_FRONT_ZFAIL_OP_SHIFT); 221 222 dsa->stencil_ref_mask = (state->stencil[0].ref_value) | 223 (state->stencil[0].valuemask << R300_STENCILMASK_SHIFT) | 224 (state->stencil[0].writemask << R300_STENCILWRITEMASK_SHIFT); 225 226 if (state->stencil[1].enabled) { 227 dsa->z_buffer_control |= R300_STENCIL_FRONT_BACK; 228 dsa->z_stencil_control |= 229 (r300_translate_depth_stencil_function(state->stencil[1].func) << 230 R300_S_BACK_FUNC_SHIFT) | 231 (r300_translate_stencil_op(state->stencil[1].fail_op) << 232 R300_S_BACK_SFAIL_OP_SHIFT) | 233 (r300_translate_stencil_op(state->stencil[1].zpass_op) << 234 R300_S_BACK_ZPASS_OP_SHIFT) | 235 (r300_translate_stencil_op(state->stencil[1].zfail_op) << 236 R300_S_BACK_ZFAIL_OP_SHIFT); 237 238 /* XXX it seems r3xx doesn't support STENCILREFMASK_BF */ 239 if (caps->is_r500) 240 { 241 dsa->z_buffer_control |= R500_STENCIL_REFMASK_FRONT_BACK; 242 dsa->stencil_ref_bf = (state->stencil[1].ref_value) | 243 (state->stencil[1].valuemask << 244 R300_STENCILMASK_SHIFT) | 245 (state->stencil[1].writemask << 246 R300_STENCILWRITEMASK_SHIFT); 247 } 248 } 249 } 250 251 /* Alpha test setup. */ 252 if (state->alpha.enabled) { 253 dsa->alpha_function = 254 r300_translate_alpha_function(state->alpha.func) | 255 R300_FG_ALPHA_FUNC_ENABLE; 256 257 /* XXX figure out why emitting 10bit alpha ref causes CS to dump */ 258 /* always use 8bit alpha ref */ 259 dsa->alpha_function |= float_to_ubyte(state->alpha.ref_value); 260 261 if (caps->is_r500) 262 dsa->alpha_function |= R500_FG_ALPHA_FUNC_8BIT; 263 } 264 265 return (void*)dsa; 266} 267 268/* Bind DSA state. */ 269static void r300_bind_dsa_state(struct pipe_context* pipe, 270 void* state) 271{ 272 struct r300_context* r300 = r300_context(pipe); 273 274 r300->dsa_state = (struct r300_dsa_state*)state; 275 r300->dirty_state |= R300_NEW_DSA; 276} 277 278/* Free DSA state. */ 279static void r300_delete_dsa_state(struct pipe_context* pipe, 280 void* state) 281{ 282 FREE(state); 283} 284 285static void r300_set_edgeflags(struct pipe_context* pipe, 286 const unsigned* bitfield) 287{ 288 /* XXX you know it's bad when i915 has this blank too */ 289 /* XXX and even worse, I have no idea WTF the bitfield is */ 290} 291 292static void 293 r300_set_framebuffer_state(struct pipe_context* pipe, 294 const struct pipe_framebuffer_state* state) 295{ 296 struct r300_context* r300 = r300_context(pipe); 297 298 if (r300->draw) { 299 draw_flush(r300->draw); 300 } 301 302 r300->framebuffer_state = *state; 303 304 r300->dirty_state |= R300_NEW_FRAMEBUFFERS; 305 306 if (r300_screen(r300->context.screen)->caps->is_r500) { 307 r300->scissor_state->no_scissor_top_left = 308 (0 << R300_SCISSORS_X_SHIFT) | 309 (0 << R300_SCISSORS_Y_SHIFT); 310 r300->scissor_state->no_scissor_bottom_right = 311 ((state->width - 1) << R300_SCISSORS_X_SHIFT) | 312 ((state->height - 1) << R300_SCISSORS_Y_SHIFT); 313 } else { 314 /* Offset of 1440 in non-R500 chipsets. */ 315 r300->scissor_state->no_scissor_top_left = 316 ((0 + 1440) << R300_SCISSORS_X_SHIFT) | 317 ((0 + 1440) << R300_SCISSORS_Y_SHIFT); 318 r300->scissor_state->no_scissor_bottom_right = 319 (((state->width - 1) + 1440) << R300_SCISSORS_X_SHIFT) | 320 (((state->height - 1) + 1440) << R300_SCISSORS_Y_SHIFT); 321 } 322 323 r300->dirty_state |= R300_NEW_SCISSOR; 324} 325 326/* Create fragment shader state. */ 327static void* r300_create_fs_state(struct pipe_context* pipe, 328 const struct pipe_shader_state* shader) 329{ 330 struct r300_fragment_shader* fs = NULL; 331 332 fs = (struct r300_fragment_shader*)CALLOC_STRUCT(r300_fragment_shader); 333 334 /* Copy state directly into shader. */ 335 fs->state = *shader; 336 fs->state.tokens = tgsi_dup_tokens(shader->tokens); 337 338 tgsi_scan_shader(shader->tokens, &fs->info); 339 340 return (void*)fs; 341} 342 343/* Bind fragment shader state. */ 344static void r300_bind_fs_state(struct pipe_context* pipe, void* shader) 345{ 346 struct r300_context* r300 = r300_context(pipe); 347 struct r300_fragment_shader* fs = (struct r300_fragment_shader*)shader; 348 349 if (fs == NULL) { 350 r300->fs = NULL; 351 return; 352 } else if (!fs->translated) { 353 r300_translate_fragment_shader(r300, fs); 354 } 355 356 r300->fs = fs; 357 358 r300->dirty_state |= R300_NEW_FRAGMENT_SHADER | R300_NEW_FRAGMENT_SHADER_CONSTANTS; 359} 360 361/* Delete fragment shader state. */ 362static void r300_delete_fs_state(struct pipe_context* pipe, void* shader) 363{ 364 struct r300_fragment_shader* fs = (struct r300_fragment_shader*)shader; 365 rc_constants_destroy(&fs->code.constants); 366 FREE((void*)fs->state.tokens); 367 FREE(shader); 368} 369 370static void r300_set_polygon_stipple(struct pipe_context* pipe, 371 const struct pipe_poly_stipple* state) 372{ 373 /* XXX no idea how to set this up, but not terribly important */ 374} 375 376/* Create a new rasterizer state based on the CSO rasterizer state. 377 * 378 * This is a very large chunk of state, and covers most of the graphics 379 * backend (GB), geometry assembly (GA), and setup unit (SU) blocks. 380 * 381 * In a not entirely unironic sidenote, this state has nearly nothing to do 382 * with the actual block on the Radeon called the rasterizer (RS). */ 383static void* r300_create_rs_state(struct pipe_context* pipe, 384 const struct pipe_rasterizer_state* state) 385{ 386 struct r300_rs_state* rs = CALLOC_STRUCT(r300_rs_state); 387 388 /* Copy rasterizer state for Draw. */ 389 rs->rs = *state; 390 391 rs->enable_vte = !state->bypass_vs_clip_and_viewport; 392 393#ifdef PIPE_ARCH_LITTLE_ENDIAN 394 rs->vap_control_status = R300_VC_NO_SWAP; 395#else 396 rs->vap_control_status = R300_VC_32BIT_SWAP; 397#endif 398 399 /* If bypassing TCL, or if no TCL engine is present, turn off the HW TCL. 400 * Else, enable HW TCL and force Draw's TCL off. */ 401 if (state->bypass_vs_clip_and_viewport || 402 !r300_screen(pipe->screen)->caps->has_tcl) { 403 rs->vap_control_status |= R300_VAP_TCL_BYPASS; 404 } else { 405 rs->rs.bypass_vs_clip_and_viewport = TRUE; 406 } 407 408 rs->point_size = pack_float_16_6x(state->point_size) | 409 (pack_float_16_6x(state->point_size) << R300_POINTSIZE_X_SHIFT); 410 411 rs->point_minmax = 412 ((int)(state->point_size_min * 6.0) << 413 R300_GA_POINT_MINMAX_MIN_SHIFT) | 414 ((int)(state->point_size_max * 6.0) << 415 R300_GA_POINT_MINMAX_MAX_SHIFT); 416 417 rs->line_control = pack_float_16_6x(state->line_width) | 418 R300_GA_LINE_CNTL_END_TYPE_COMP; 419 420 /* XXX I think there is something wrong with the polygon mode, 421 * XXX re-test when r300g is in a better shape */ 422 423 /* Enable polygon mode */ 424 if (state->fill_cw != PIPE_POLYGON_MODE_FILL || 425 state->fill_ccw != PIPE_POLYGON_MODE_FILL) { 426 rs->polygon_mode = R300_GA_POLY_MODE_DUAL; 427 } 428 429 /* Radeons don't think in "CW/CCW", they think in "front/back". */ 430 if (state->front_winding == PIPE_WINDING_CW) { 431 rs->cull_mode = R300_FRONT_FACE_CW; 432 433 /* Polygon offset */ 434 if (state->offset_cw) { 435 rs->polygon_offset_enable |= R300_FRONT_ENABLE; 436 } 437 if (state->offset_ccw) { 438 rs->polygon_offset_enable |= R300_BACK_ENABLE; 439 } 440 441 /* Polygon mode */ 442 if (rs->polygon_mode) { 443 rs->polygon_mode |= 444 r300_translate_polygon_mode_front(state->fill_cw); 445 rs->polygon_mode |= 446 r300_translate_polygon_mode_back(state->fill_ccw); 447 } 448 } else { 449 rs->cull_mode = R300_FRONT_FACE_CCW; 450 451 /* Polygon offset */ 452 if (state->offset_ccw) { 453 rs->polygon_offset_enable |= R300_FRONT_ENABLE; 454 } 455 if (state->offset_cw) { 456 rs->polygon_offset_enable |= R300_BACK_ENABLE; 457 } 458 459 /* Polygon mode */ 460 if (rs->polygon_mode) { 461 rs->polygon_mode |= 462 r300_translate_polygon_mode_front(state->fill_ccw); 463 rs->polygon_mode |= 464 r300_translate_polygon_mode_back(state->fill_cw); 465 } 466 } 467 if (state->front_winding & state->cull_mode) { 468 rs->cull_mode |= R300_CULL_FRONT; 469 } 470 if (~(state->front_winding) & state->cull_mode) { 471 rs->cull_mode |= R300_CULL_BACK; 472 } 473 474 if (rs->polygon_offset_enable) { 475 rs->depth_offset_front = rs->depth_offset_back = 476 fui(state->offset_units); 477 rs->depth_scale_front = rs->depth_scale_back = 478 fui(state->offset_scale); 479 } 480 481 if (state->line_stipple_enable) { 482 rs->line_stipple_config = 483 R300_GA_LINE_STIPPLE_CONFIG_LINE_RESET_LINE | 484 (fui((float)state->line_stipple_factor) & 485 R300_GA_LINE_STIPPLE_CONFIG_STIPPLE_SCALE_MASK); 486 /* XXX this might need to be scaled up */ 487 rs->line_stipple_value = state->line_stipple_pattern; 488 } 489 490 if (state->flatshade) { 491 rs->color_control = R300_SHADE_MODEL_FLAT; 492 } else { 493 rs->color_control = R300_SHADE_MODEL_SMOOTH; 494 } 495 496 if (!state->flatshade_first) { 497 rs->color_control |= R300_GA_COLOR_CONTROL_PROVOKING_VERTEX_LAST; 498 } 499 500 return (void*)rs; 501} 502 503/* Bind rasterizer state. */ 504static void r300_bind_rs_state(struct pipe_context* pipe, void* state) 505{ 506 struct r300_context* r300 = r300_context(pipe); 507 struct r300_rs_state* rs = (struct r300_rs_state*)state; 508 509 if (r300->draw) { 510 draw_flush(r300->draw); 511 draw_set_rasterizer_state(r300->draw, &rs->rs); 512 } 513 514 r300->rs_state = rs; 515 /* XXX Clean these up when we move to atom emits */ 516 r300->dirty_state |= R300_NEW_RASTERIZER; 517 r300->dirty_state |= R300_NEW_RS_BLOCK; 518 r300->dirty_state |= R300_NEW_SCISSOR; 519 r300->dirty_state |= R300_NEW_VIEWPORT; 520} 521 522/* Free rasterizer state. */ 523static void r300_delete_rs_state(struct pipe_context* pipe, void* state) 524{ 525 FREE(state); 526} 527 528static void* 529 r300_create_sampler_state(struct pipe_context* pipe, 530 const struct pipe_sampler_state* state) 531{ 532 struct r300_context* r300 = r300_context(pipe); 533 struct r300_sampler_state* sampler = CALLOC_STRUCT(r300_sampler_state); 534 int lod_bias; 535 536 sampler->filter0 |= 537 (r300_translate_wrap(state->wrap_s) << R300_TX_WRAP_S_SHIFT) | 538 (r300_translate_wrap(state->wrap_t) << R300_TX_WRAP_T_SHIFT) | 539 (r300_translate_wrap(state->wrap_r) << R300_TX_WRAP_R_SHIFT); 540 541 sampler->filter0 |= r300_translate_tex_filters(state->min_img_filter, 542 state->mag_img_filter, 543 state->min_mip_filter); 544 545 /* Unfortunately, r300-r500 don't support floating-point mipmap lods. */ 546 /* We must pass these to the emit function to clamp them properly. */ 547 sampler->min_lod = MAX2((unsigned)state->min_lod, 0); 548 sampler->max_lod = MAX2((unsigned)ceilf(state->max_lod), 0); 549 550 lod_bias = CLAMP((int)(state->lod_bias * 32), -(1 << 9), (1 << 9) - 1); 551 552 sampler->filter1 |= lod_bias << R300_LOD_BIAS_SHIFT; 553 554 sampler->filter1 |= r300_anisotropy(state->max_anisotropy); 555 556 util_pack_color(state->border_color, PIPE_FORMAT_A8R8G8B8_UNORM, 557 &sampler->border_color); 558 559 /* R500-specific fixups and optimizations */ 560 if (r300_screen(r300->context.screen)->caps->is_r500) { 561 sampler->filter1 |= R500_BORDER_FIX; 562 } 563 564 return (void*)sampler; 565} 566 567static void r300_bind_sampler_states(struct pipe_context* pipe, 568 unsigned count, 569 void** states) 570{ 571 struct r300_context* r300 = r300_context(pipe); 572 int i; 573 574 if (count > 8) { 575 return; 576 } 577 578 for (i = 0; i < count; i++) { 579 if (r300->sampler_states[i] != states[i]) { 580 r300->sampler_states[i] = (struct r300_sampler_state*)states[i]; 581 r300->dirty_state |= (R300_NEW_SAMPLER << i); 582 } 583 } 584 585 r300->sampler_count = count; 586} 587 588static void r300_lacks_vertex_textures(struct pipe_context* pipe, 589 unsigned count, 590 void** states) 591{ 592} 593 594static void r300_delete_sampler_state(struct pipe_context* pipe, void* state) 595{ 596 FREE(state); 597} 598 599static void r300_set_sampler_textures(struct pipe_context* pipe, 600 unsigned count, 601 struct pipe_texture** texture) 602{ 603 struct r300_context* r300 = r300_context(pipe); 604 boolean is_r500 = r300_screen(r300->context.screen)->caps->is_r500; 605 int i; 606 607 /* XXX magic num */ 608 if (count > 8) { 609 return; 610 } 611 612 r300->context.flush(&r300->context, 0, NULL); 613 614 for (i = 0; i < count; i++) { 615 if (r300->textures[i] != (struct r300_texture*)texture[i]) { 616 pipe_texture_reference((struct pipe_texture**)&r300->textures[i], 617 texture[i]); 618 r300->dirty_state |= (R300_NEW_TEXTURE << i); 619 620 /* R300-specific - set the texrect factor in a fragment shader */ 621 if (!is_r500 && r300->textures[i]->is_npot) { 622 /* XXX It would be nice to re-emit just 1 constant, 623 * XXX not all of them */ 624 r300->dirty_state |= R300_NEW_FRAGMENT_SHADER_CONSTANTS; 625 } 626 } 627 } 628 629 for (i = count; i < 8; i++) { 630 if (r300->textures[i]) { 631 pipe_texture_reference((struct pipe_texture**)&r300->textures[i], 632 NULL); 633 r300->dirty_state |= (R300_NEW_TEXTURE << i); 634 } 635 } 636 637 r300->texture_count = count; 638} 639 640static void r300_set_scissor_state(struct pipe_context* pipe, 641 const struct pipe_scissor_state* state) 642{ 643 struct r300_context* r300 = r300_context(pipe); 644 645 if (r300_screen(r300->context.screen)->caps->is_r500) { 646 r300->scissor_state->scissor_top_left = 647 (state->minx << R300_SCISSORS_X_SHIFT) | 648 (state->miny << R300_SCISSORS_Y_SHIFT); 649 r300->scissor_state->scissor_bottom_right = 650 ((state->maxx - 1) << R300_SCISSORS_X_SHIFT) | 651 ((state->maxy - 1) << R300_SCISSORS_Y_SHIFT); 652 } else { 653 /* Offset of 1440 in non-R500 chipsets. */ 654 r300->scissor_state->scissor_top_left = 655 ((state->minx + 1440) << R300_SCISSORS_X_SHIFT) | 656 ((state->miny + 1440) << R300_SCISSORS_Y_SHIFT); 657 r300->scissor_state->scissor_bottom_right = 658 (((state->maxx - 1) + 1440) << R300_SCISSORS_X_SHIFT) | 659 (((state->maxy - 1) + 1440) << R300_SCISSORS_Y_SHIFT); 660 } 661 662 r300->dirty_state |= R300_NEW_SCISSOR; 663} 664 665static void r300_set_viewport_state(struct pipe_context* pipe, 666 const struct pipe_viewport_state* state) 667{ 668 struct r300_context* r300 = r300_context(pipe); 669 670 /* Do the transform in HW. */ 671 r300->viewport_state->vte_control = R300_VTX_W0_FMT; 672 673 if (state->scale[0] != 1.0f) { 674 r300->viewport_state->xscale = state->scale[0]; 675 r300->viewport_state->vte_control |= R300_VPORT_X_SCALE_ENA; 676 } 677 if (state->scale[1] != 1.0f) { 678 r300->viewport_state->yscale = state->scale[1]; 679 r300->viewport_state->vte_control |= R300_VPORT_Y_SCALE_ENA; 680 } 681 if (state->scale[2] != 1.0f) { 682 r300->viewport_state->zscale = state->scale[2]; 683 r300->viewport_state->vte_control |= R300_VPORT_Z_SCALE_ENA; 684 } 685 if (state->translate[0] != 0.0f) { 686 r300->viewport_state->xoffset = state->translate[0]; 687 r300->viewport_state->vte_control |= R300_VPORT_X_OFFSET_ENA; 688 } 689 if (state->translate[1] != 0.0f) { 690 r300->viewport_state->yoffset = state->translate[1]; 691 r300->viewport_state->vte_control |= R300_VPORT_Y_OFFSET_ENA; 692 } 693 if (state->translate[2] != 0.0f) { 694 r300->viewport_state->zoffset = state->translate[2]; 695 r300->viewport_state->vte_control |= R300_VPORT_Z_OFFSET_ENA; 696 } 697 698 r300->dirty_state |= R300_NEW_VIEWPORT; 699} 700 701static void r300_set_vertex_buffers(struct pipe_context* pipe, 702 unsigned count, 703 const struct pipe_vertex_buffer* buffers) 704{ 705 struct r300_context* r300 = r300_context(pipe); 706 707 memcpy(r300->vertex_buffer, buffers, 708 sizeof(struct pipe_vertex_buffer) * count); 709 r300->vertex_buffer_count = count; 710 711 if (r300->draw) { 712 draw_flush(r300->draw); 713 draw_set_vertex_buffers(r300->draw, count, buffers); 714 } 715 716 r300->dirty_state |= R300_NEW_VERTEX_FORMAT; 717} 718 719static void r300_set_vertex_elements(struct pipe_context* pipe, 720 unsigned count, 721 const struct pipe_vertex_element* elements) 722{ 723 struct r300_context* r300 = r300_context(pipe); 724 725 memcpy(r300->vertex_element, 726 elements, 727 sizeof(struct pipe_vertex_element) * count); 728 r300->vertex_element_count = count; 729 730 if (r300->draw) { 731 draw_flush(r300->draw); 732 draw_set_vertex_elements(r300->draw, count, elements); 733 } 734} 735 736static void* r300_create_vs_state(struct pipe_context* pipe, 737 const struct pipe_shader_state* shader) 738{ 739 struct r300_context* r300 = r300_context(pipe); 740 741 if (r300_screen(pipe->screen)->caps->has_tcl) { 742 struct r300_vertex_shader* vs = CALLOC_STRUCT(r300_vertex_shader); 743 /* Copy state directly into shader. */ 744 vs->state = *shader; 745 vs->state.tokens = tgsi_dup_tokens(shader->tokens); 746 747 tgsi_scan_shader(shader->tokens, &vs->info); 748 749 return (void*)vs; 750 } else { 751 return draw_create_vertex_shader(r300->draw, shader); 752 } 753} 754 755static void r300_bind_vs_state(struct pipe_context* pipe, void* shader) 756{ 757 struct r300_context* r300 = r300_context(pipe); 758 759 if (r300_screen(pipe->screen)->caps->has_tcl) { 760 struct r300_vertex_shader* vs = (struct r300_vertex_shader*)shader; 761 762 if (vs == NULL) { 763 r300->vs = NULL; 764 return; 765 } else if (!vs->translated) { 766 r300_translate_vertex_shader(r300, vs); 767 } 768 769 r300->vs = vs; 770 r300->dirty_state |= R300_NEW_VERTEX_SHADER | R300_NEW_VERTEX_SHADER_CONSTANTS; 771 } else { 772 draw_flush(r300->draw); 773 draw_bind_vertex_shader(r300->draw, 774 (struct draw_vertex_shader*)shader); 775 } 776} 777 778static void r300_delete_vs_state(struct pipe_context* pipe, void* shader) 779{ 780 struct r300_context* r300 = r300_context(pipe); 781 782 if (r300_screen(pipe->screen)->caps->has_tcl) { 783 struct r300_vertex_shader* vs = (struct r300_vertex_shader*)shader; 784 785 rc_constants_destroy(&vs->code.constants); 786 FREE((void*)vs->state.tokens); 787 FREE(shader); 788 } else { 789 draw_delete_vertex_shader(r300->draw, 790 (struct draw_vertex_shader*)shader); 791 } 792} 793 794static void r300_set_constant_buffer(struct pipe_context *pipe, 795 uint shader, uint index, 796 const struct pipe_constant_buffer *buf) 797{ 798 struct r300_context* r300 = r300_context(pipe); 799 void *mapped; 800 801 if (buf == NULL || buf->buffer->size == 0 || 802 (mapped = pipe_buffer_map(pipe->screen, buf->buffer, PIPE_BUFFER_USAGE_CPU_READ)) == NULL) 803 { 804 r300->shader_constants[shader].count = 0; 805 return; 806 } 807 808 assert((buf->buffer->size % 4 * sizeof(float)) == 0); 809 memcpy(r300->shader_constants[shader].constants, mapped, buf->buffer->size); 810 r300->shader_constants[shader].count = buf->buffer->size / (4 * sizeof(float)); 811 pipe_buffer_unmap(pipe->screen, buf->buffer); 812 813 if (shader == PIPE_SHADER_VERTEX) 814 r300->dirty_state |= R300_NEW_VERTEX_SHADER_CONSTANTS; 815 else if (shader == PIPE_SHADER_FRAGMENT) 816 r300->dirty_state |= R300_NEW_FRAGMENT_SHADER_CONSTANTS; 817} 818 819void r300_init_state_functions(struct r300_context* r300) 820{ 821 r300->context.create_blend_state = r300_create_blend_state; 822 r300->context.bind_blend_state = r300_bind_blend_state; 823 r300->context.delete_blend_state = r300_delete_blend_state; 824 825 r300->context.set_blend_color = r300_set_blend_color; 826 827 r300->context.set_clip_state = r300_set_clip_state; 828 829 r300->context.set_constant_buffer = r300_set_constant_buffer; 830 831 r300->context.create_depth_stencil_alpha_state = r300_create_dsa_state; 832 r300->context.bind_depth_stencil_alpha_state = r300_bind_dsa_state; 833 r300->context.delete_depth_stencil_alpha_state = r300_delete_dsa_state; 834 835 r300->context.set_edgeflags = r300_set_edgeflags; 836 837 r300->context.set_framebuffer_state = r300_set_framebuffer_state; 838 839 r300->context.create_fs_state = r300_create_fs_state; 840 r300->context.bind_fs_state = r300_bind_fs_state; 841 r300->context.delete_fs_state = r300_delete_fs_state; 842 843 r300->context.set_polygon_stipple = r300_set_polygon_stipple; 844 845 r300->context.create_rasterizer_state = r300_create_rs_state; 846 r300->context.bind_rasterizer_state = r300_bind_rs_state; 847 r300->context.delete_rasterizer_state = r300_delete_rs_state; 848 849 r300->context.create_sampler_state = r300_create_sampler_state; 850 r300->context.bind_fragment_sampler_states = r300_bind_sampler_states; 851 r300->context.bind_vertex_sampler_states = r300_lacks_vertex_textures; 852 r300->context.delete_sampler_state = r300_delete_sampler_state; 853 854 r300->context.set_fragment_sampler_textures = r300_set_sampler_textures; 855 856 r300->context.set_scissor_state = r300_set_scissor_state; 857 858 r300->context.set_viewport_state = r300_set_viewport_state; 859 860 r300->context.set_vertex_buffers = r300_set_vertex_buffers; 861 r300->context.set_vertex_elements = r300_set_vertex_elements; 862 863 r300->context.create_vs_state = r300_create_vs_state; 864 r300->context.bind_vs_state = r300_bind_vs_state; 865 r300->context.delete_vs_state = r300_delete_vs_state; 866} 867