r300_state.c revision 9311e55c8ad97329bb2d06a0680f5165de9b21f5
1/* 2 * Copyright 2008 Corbin Simpson <MostAwesomeDude@gmail.com> 3 * Copyright 2009 Marek Olšák <maraeo@gmail.com> 4 * 5 * Permission is hereby granted, free of charge, to any person obtaining a 6 * copy of this software and associated documentation files (the "Software"), 7 * to deal in the Software without restriction, including without limitation 8 * on the rights to use, copy, modify, merge, publish, distribute, sub 9 * license, and/or sell copies of the Software, and to permit persons to whom 10 * the Software is furnished to do so, subject to the following conditions: 11 * 12 * The above copyright notice and this permission notice (including the next 13 * paragraph) shall be included in all copies or substantial portions of the 14 * Software. 15 * 16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL 19 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, 20 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR 21 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE 22 * USE OR OTHER DEALINGS IN THE SOFTWARE. */ 23 24#include "draw/draw_context.h" 25 26#include "util/u_framebuffer.h" 27#include "util/u_half.h" 28#include "util/u_math.h" 29#include "util/u_mm.h" 30#include "util/u_memory.h" 31#include "util/u_pack_color.h" 32#include "util/u_transfer.h" 33 34#include "tgsi/tgsi_parse.h" 35 36#include "pipe/p_config.h" 37 38#include "r300_cb.h" 39#include "r300_context.h" 40#include "r300_emit.h" 41#include "r300_reg.h" 42#include "r300_screen.h" 43#include "r300_screen_buffer.h" 44#include "r300_state_inlines.h" 45#include "r300_fs.h" 46#include "r300_texture.h" 47#include "r300_vs.h" 48 49/* r300_state: Functions used to intialize state context by translating 50 * Gallium state objects into semi-native r300 state objects. */ 51 52#define UPDATE_STATE(cso, atom) \ 53 if (cso != atom.state) { \ 54 atom.state = cso; \ 55 r300_mark_atom_dirty(r300, &(atom)); \ 56 } 57 58static boolean blend_discard_if_src_alpha_0(unsigned srcRGB, unsigned srcA, 59 unsigned dstRGB, unsigned dstA) 60{ 61 /* If the blend equation is ADD or REVERSE_SUBTRACT, 62 * SRC_ALPHA == 0, and the following state is set, the colorbuffer 63 * will not be changed. 64 * Notice that the dst factors are the src factors inverted. */ 65 return (srcRGB == PIPE_BLENDFACTOR_SRC_ALPHA || 66 srcRGB == PIPE_BLENDFACTOR_SRC_ALPHA_SATURATE || 67 srcRGB == PIPE_BLENDFACTOR_ZERO) && 68 (srcA == PIPE_BLENDFACTOR_SRC_COLOR || 69 srcA == PIPE_BLENDFACTOR_SRC_ALPHA || 70 srcA == PIPE_BLENDFACTOR_SRC_ALPHA_SATURATE || 71 srcA == PIPE_BLENDFACTOR_ZERO) && 72 (dstRGB == PIPE_BLENDFACTOR_INV_SRC_ALPHA || 73 dstRGB == PIPE_BLENDFACTOR_ONE) && 74 (dstA == PIPE_BLENDFACTOR_INV_SRC_COLOR || 75 dstA == PIPE_BLENDFACTOR_INV_SRC_ALPHA || 76 dstA == PIPE_BLENDFACTOR_ONE); 77} 78 79static boolean blend_discard_if_src_alpha_1(unsigned srcRGB, unsigned srcA, 80 unsigned dstRGB, unsigned dstA) 81{ 82 /* If the blend equation is ADD or REVERSE_SUBTRACT, 83 * SRC_ALPHA == 1, and the following state is set, the colorbuffer 84 * will not be changed. 85 * Notice that the dst factors are the src factors inverted. */ 86 return (srcRGB == PIPE_BLENDFACTOR_INV_SRC_ALPHA || 87 srcRGB == PIPE_BLENDFACTOR_ZERO) && 88 (srcA == PIPE_BLENDFACTOR_INV_SRC_COLOR || 89 srcA == PIPE_BLENDFACTOR_INV_SRC_ALPHA || 90 srcA == PIPE_BLENDFACTOR_ZERO) && 91 (dstRGB == PIPE_BLENDFACTOR_SRC_ALPHA || 92 dstRGB == PIPE_BLENDFACTOR_ONE) && 93 (dstA == PIPE_BLENDFACTOR_SRC_COLOR || 94 dstA == PIPE_BLENDFACTOR_SRC_ALPHA || 95 dstA == PIPE_BLENDFACTOR_ONE); 96} 97 98static boolean blend_discard_if_src_color_0(unsigned srcRGB, unsigned srcA, 99 unsigned dstRGB, unsigned dstA) 100{ 101 /* If the blend equation is ADD or REVERSE_SUBTRACT, 102 * SRC_COLOR == (0,0,0), and the following state is set, the colorbuffer 103 * will not be changed. 104 * Notice that the dst factors are the src factors inverted. */ 105 return (srcRGB == PIPE_BLENDFACTOR_SRC_COLOR || 106 srcRGB == PIPE_BLENDFACTOR_ZERO) && 107 (srcA == PIPE_BLENDFACTOR_ZERO) && 108 (dstRGB == PIPE_BLENDFACTOR_INV_SRC_COLOR || 109 dstRGB == PIPE_BLENDFACTOR_ONE) && 110 (dstA == PIPE_BLENDFACTOR_ONE); 111} 112 113static boolean blend_discard_if_src_color_1(unsigned srcRGB, unsigned srcA, 114 unsigned dstRGB, unsigned dstA) 115{ 116 /* If the blend equation is ADD or REVERSE_SUBTRACT, 117 * SRC_COLOR == (1,1,1), and the following state is set, the colorbuffer 118 * will not be changed. 119 * Notice that the dst factors are the src factors inverted. */ 120 return (srcRGB == PIPE_BLENDFACTOR_INV_SRC_COLOR || 121 srcRGB == PIPE_BLENDFACTOR_ZERO) && 122 (srcA == PIPE_BLENDFACTOR_ZERO) && 123 (dstRGB == PIPE_BLENDFACTOR_SRC_COLOR || 124 dstRGB == PIPE_BLENDFACTOR_ONE) && 125 (dstA == PIPE_BLENDFACTOR_ONE); 126} 127 128static boolean blend_discard_if_src_alpha_color_0(unsigned srcRGB, unsigned srcA, 129 unsigned dstRGB, unsigned dstA) 130{ 131 /* If the blend equation is ADD or REVERSE_SUBTRACT, 132 * SRC_ALPHA_COLOR == (0,0,0,0), and the following state is set, 133 * the colorbuffer will not be changed. 134 * Notice that the dst factors are the src factors inverted. */ 135 return (srcRGB == PIPE_BLENDFACTOR_SRC_COLOR || 136 srcRGB == PIPE_BLENDFACTOR_SRC_ALPHA || 137 srcRGB == PIPE_BLENDFACTOR_SRC_ALPHA_SATURATE || 138 srcRGB == PIPE_BLENDFACTOR_ZERO) && 139 (srcA == PIPE_BLENDFACTOR_SRC_COLOR || 140 srcA == PIPE_BLENDFACTOR_SRC_ALPHA || 141 srcA == PIPE_BLENDFACTOR_SRC_ALPHA_SATURATE || 142 srcA == PIPE_BLENDFACTOR_ZERO) && 143 (dstRGB == PIPE_BLENDFACTOR_INV_SRC_COLOR || 144 dstRGB == PIPE_BLENDFACTOR_INV_SRC_ALPHA || 145 dstRGB == PIPE_BLENDFACTOR_ONE) && 146 (dstA == PIPE_BLENDFACTOR_INV_SRC_COLOR || 147 dstA == PIPE_BLENDFACTOR_INV_SRC_ALPHA || 148 dstA == PIPE_BLENDFACTOR_ONE); 149} 150 151static boolean blend_discard_if_src_alpha_color_1(unsigned srcRGB, unsigned srcA, 152 unsigned dstRGB, unsigned dstA) 153{ 154 /* If the blend equation is ADD or REVERSE_SUBTRACT, 155 * SRC_ALPHA_COLOR == (1,1,1,1), and the following state is set, 156 * the colorbuffer will not be changed. 157 * Notice that the dst factors are the src factors inverted. */ 158 return (srcRGB == PIPE_BLENDFACTOR_INV_SRC_COLOR || 159 srcRGB == PIPE_BLENDFACTOR_INV_SRC_ALPHA || 160 srcRGB == PIPE_BLENDFACTOR_ZERO) && 161 (srcA == PIPE_BLENDFACTOR_INV_SRC_COLOR || 162 srcA == PIPE_BLENDFACTOR_INV_SRC_ALPHA || 163 srcA == PIPE_BLENDFACTOR_ZERO) && 164 (dstRGB == PIPE_BLENDFACTOR_SRC_COLOR || 165 dstRGB == PIPE_BLENDFACTOR_SRC_ALPHA || 166 dstRGB == PIPE_BLENDFACTOR_ONE) && 167 (dstA == PIPE_BLENDFACTOR_SRC_COLOR || 168 dstA == PIPE_BLENDFACTOR_SRC_ALPHA || 169 dstA == PIPE_BLENDFACTOR_ONE); 170} 171 172/* The hardware colormask is clunky a must be swizzled depending on the format. 173 * This was figured out by trial-and-error. */ 174static unsigned bgra_cmask(unsigned mask) 175{ 176 return ((mask & PIPE_MASK_R) << 2) | 177 ((mask & PIPE_MASK_B) >> 2) | 178 (mask & (PIPE_MASK_G | PIPE_MASK_A)); 179} 180 181static unsigned rgba_cmask(unsigned mask) 182{ 183 return mask & PIPE_MASK_RGBA; 184} 185 186static unsigned rrrr_cmask(unsigned mask) 187{ 188 return (mask & PIPE_MASK_R) | 189 ((mask & PIPE_MASK_R) << 1) | 190 ((mask & PIPE_MASK_R) << 2) | 191 ((mask & PIPE_MASK_R) << 3); 192} 193 194static unsigned aaaa_cmask(unsigned mask) 195{ 196 return ((mask & PIPE_MASK_A) >> 3) | 197 ((mask & PIPE_MASK_A) >> 2) | 198 ((mask & PIPE_MASK_A) >> 1) | 199 (mask & PIPE_MASK_A); 200} 201 202static unsigned grrg_cmask(unsigned mask) 203{ 204 return ((mask & PIPE_MASK_R) << 1) | 205 ((mask & PIPE_MASK_R) << 2) | 206 ((mask & PIPE_MASK_G) >> 1) | 207 ((mask & PIPE_MASK_G) << 2); 208} 209 210static unsigned arra_cmask(unsigned mask) 211{ 212 return ((mask & PIPE_MASK_R) << 1) | 213 ((mask & PIPE_MASK_R) << 2) | 214 ((mask & PIPE_MASK_A) >> 3) | 215 (mask & PIPE_MASK_A); 216} 217 218/* Create a new blend state based on the CSO blend state. 219 * 220 * This encompasses alpha blending, logic/raster ops, and blend dithering. */ 221static void* r300_create_blend_state(struct pipe_context* pipe, 222 const struct pipe_blend_state* state) 223{ 224 struct r300_screen* r300screen = r300_screen(pipe->screen); 225 struct r300_blend_state* blend = CALLOC_STRUCT(r300_blend_state); 226 uint32_t blend_control = 0; /* R300_RB3D_CBLEND: 0x4e04 */ 227 uint32_t blend_control_noclamp = 0; /* R300_RB3D_CBLEND: 0x4e04 */ 228 uint32_t alpha_blend_control = 0; /* R300_RB3D_ABLEND: 0x4e08 */ 229 uint32_t alpha_blend_control_noclamp = 0; /* R300_RB3D_ABLEND: 0x4e08 */ 230 uint32_t rop = 0; /* R300_RB3D_ROPCNTL: 0x4e18 */ 231 uint32_t dither = 0; /* R300_RB3D_DITHER_CTL: 0x4e50 */ 232 int i; 233 CB_LOCALS; 234 235 blend->state = *state; 236 237 if (state->rt[0].blend_enable) 238 { 239 unsigned eqRGB = state->rt[0].rgb_func; 240 unsigned srcRGB = state->rt[0].rgb_src_factor; 241 unsigned dstRGB = state->rt[0].rgb_dst_factor; 242 243 unsigned eqA = state->rt[0].alpha_func; 244 unsigned srcA = state->rt[0].alpha_src_factor; 245 unsigned dstA = state->rt[0].alpha_dst_factor; 246 247 /* despite the name, ALPHA_BLEND_ENABLE has nothing to do with alpha, 248 * this is just the crappy D3D naming */ 249 blend_control = blend_control_noclamp = 250 R300_ALPHA_BLEND_ENABLE | 251 ( r300_translate_blend_factor(srcRGB) << R300_SRC_BLEND_SHIFT) | 252 ( r300_translate_blend_factor(dstRGB) << R300_DST_BLEND_SHIFT); 253 blend_control |= 254 r300_translate_blend_function(eqRGB, TRUE); 255 blend_control_noclamp |= 256 r300_translate_blend_function(eqRGB, FALSE); 257 258 /* Optimization: some operations do not require the destination color. 259 * 260 * When SRC_ALPHA_SATURATE is used, colorbuffer reads must be enabled, 261 * otherwise blending gives incorrect results. It seems to be 262 * a hardware bug. */ 263 if (eqRGB == PIPE_BLEND_MIN || eqA == PIPE_BLEND_MIN || 264 eqRGB == PIPE_BLEND_MAX || eqA == PIPE_BLEND_MAX || 265 dstRGB != PIPE_BLENDFACTOR_ZERO || 266 dstA != PIPE_BLENDFACTOR_ZERO || 267 srcRGB == PIPE_BLENDFACTOR_DST_COLOR || 268 srcRGB == PIPE_BLENDFACTOR_DST_ALPHA || 269 srcRGB == PIPE_BLENDFACTOR_INV_DST_COLOR || 270 srcRGB == PIPE_BLENDFACTOR_INV_DST_ALPHA || 271 srcA == PIPE_BLENDFACTOR_DST_COLOR || 272 srcA == PIPE_BLENDFACTOR_DST_ALPHA || 273 srcA == PIPE_BLENDFACTOR_INV_DST_COLOR || 274 srcA == PIPE_BLENDFACTOR_INV_DST_ALPHA || 275 srcRGB == PIPE_BLENDFACTOR_SRC_ALPHA_SATURATE) { 276 /* Enable reading from the colorbuffer. */ 277 blend_control |= R300_READ_ENABLE; 278 blend_control_noclamp |= R300_READ_ENABLE; 279 280 if (r300screen->caps.is_r500) { 281 /* Optimization: Depending on incoming pixels, we can 282 * conditionally disable the reading in hardware... */ 283 if (eqRGB != PIPE_BLEND_MIN && eqA != PIPE_BLEND_MIN && 284 eqRGB != PIPE_BLEND_MAX && eqA != PIPE_BLEND_MAX) { 285 /* Disable reading if SRC_ALPHA == 0. */ 286 if ((dstRGB == PIPE_BLENDFACTOR_SRC_ALPHA || 287 dstRGB == PIPE_BLENDFACTOR_ZERO) && 288 (dstA == PIPE_BLENDFACTOR_SRC_COLOR || 289 dstA == PIPE_BLENDFACTOR_SRC_ALPHA || 290 dstA == PIPE_BLENDFACTOR_ZERO) && 291 (srcRGB != PIPE_BLENDFACTOR_DST_COLOR && 292 srcRGB != PIPE_BLENDFACTOR_DST_ALPHA && 293 srcRGB != PIPE_BLENDFACTOR_INV_DST_COLOR && 294 srcRGB != PIPE_BLENDFACTOR_INV_DST_ALPHA)) { 295 blend_control |= R500_SRC_ALPHA_0_NO_READ; 296 } 297 298 /* Disable reading if SRC_ALPHA == 1. */ 299 if ((dstRGB == PIPE_BLENDFACTOR_INV_SRC_ALPHA || 300 dstRGB == PIPE_BLENDFACTOR_ZERO) && 301 (dstA == PIPE_BLENDFACTOR_INV_SRC_COLOR || 302 dstA == PIPE_BLENDFACTOR_INV_SRC_ALPHA || 303 dstA == PIPE_BLENDFACTOR_ZERO) && 304 (srcRGB != PIPE_BLENDFACTOR_DST_COLOR && 305 srcRGB != PIPE_BLENDFACTOR_DST_ALPHA && 306 srcRGB != PIPE_BLENDFACTOR_INV_DST_COLOR && 307 srcRGB != PIPE_BLENDFACTOR_INV_DST_ALPHA)) { 308 blend_control |= R500_SRC_ALPHA_1_NO_READ; 309 } 310 } 311 } 312 } 313 314 /* Optimization: discard pixels which don't change the colorbuffer. 315 * 316 * The code below is non-trivial and some math is involved. 317 * 318 * Discarding pixels must be disabled when FP16 AA is enabled. 319 * This is a hardware bug. Also, this implementation wouldn't work 320 * with FP blending enabled and equation clamping disabled. 321 * 322 * Equations other than ADD are rarely used and therefore won't be 323 * optimized. */ 324 if ((eqRGB == PIPE_BLEND_ADD || eqRGB == PIPE_BLEND_REVERSE_SUBTRACT) && 325 (eqA == PIPE_BLEND_ADD || eqA == PIPE_BLEND_REVERSE_SUBTRACT)) { 326 /* ADD: X+Y 327 * REVERSE_SUBTRACT: Y-X 328 * 329 * The idea is: 330 * If X = src*srcFactor = 0 and Y = dst*dstFactor = 1, 331 * then CB will not be changed. 332 * 333 * Given the srcFactor and dstFactor variables, we can derive 334 * what src and dst should be equal to and discard appropriate 335 * pixels. 336 */ 337 if (blend_discard_if_src_alpha_0(srcRGB, srcA, dstRGB, dstA)) { 338 blend_control |= R300_DISCARD_SRC_PIXELS_SRC_ALPHA_0; 339 } else if (blend_discard_if_src_alpha_1(srcRGB, srcA, 340 dstRGB, dstA)) { 341 blend_control |= R300_DISCARD_SRC_PIXELS_SRC_ALPHA_1; 342 } else if (blend_discard_if_src_color_0(srcRGB, srcA, 343 dstRGB, dstA)) { 344 blend_control |= R300_DISCARD_SRC_PIXELS_SRC_COLOR_0; 345 } else if (blend_discard_if_src_color_1(srcRGB, srcA, 346 dstRGB, dstA)) { 347 blend_control |= R300_DISCARD_SRC_PIXELS_SRC_COLOR_1; 348 } else if (blend_discard_if_src_alpha_color_0(srcRGB, srcA, 349 dstRGB, dstA)) { 350 blend_control |= 351 R300_DISCARD_SRC_PIXELS_SRC_ALPHA_COLOR_0; 352 } else if (blend_discard_if_src_alpha_color_1(srcRGB, srcA, 353 dstRGB, dstA)) { 354 blend_control |= 355 R300_DISCARD_SRC_PIXELS_SRC_ALPHA_COLOR_1; 356 } 357 } 358 359 /* separate alpha */ 360 if (srcA != srcRGB || dstA != dstRGB || eqA != eqRGB) { 361 blend_control |= R300_SEPARATE_ALPHA_ENABLE; 362 blend_control_noclamp |= R300_SEPARATE_ALPHA_ENABLE; 363 alpha_blend_control = alpha_blend_control_noclamp = 364 (r300_translate_blend_factor(srcA) << R300_SRC_BLEND_SHIFT) | 365 (r300_translate_blend_factor(dstA) << R300_DST_BLEND_SHIFT); 366 alpha_blend_control |= 367 r300_translate_blend_function(eqA, TRUE); 368 alpha_blend_control_noclamp |= 369 r300_translate_blend_function(eqA, FALSE); 370 } 371 } 372 373 /* PIPE_LOGICOP_* don't need to be translated, fortunately. */ 374 if (state->logicop_enable) { 375 rop = R300_RB3D_ROPCNTL_ROP_ENABLE | 376 (state->logicop_func) << R300_RB3D_ROPCNTL_ROP_SHIFT; 377 } 378 379 /* Neither fglrx nor classic r300 ever set this, regardless of dithering 380 * state. Since it's an optional implementation detail, we can leave it 381 * out and never dither. 382 * 383 * This could be revisited if we ever get quality or conformance hints. 384 * 385 if (state->dither) { 386 dither = R300_RB3D_DITHER_CTL_DITHER_MODE_LUT | 387 R300_RB3D_DITHER_CTL_ALPHA_DITHER_MODE_LUT; 388 } 389 */ 390 391 /* Build a command buffer. */ 392 { 393 unsigned (*func[COLORMASK_NUM_SWIZZLES])(unsigned) = { 394 bgra_cmask, 395 rgba_cmask, 396 rrrr_cmask, 397 aaaa_cmask, 398 grrg_cmask, 399 arra_cmask 400 }; 401 402 for (i = 0; i < COLORMASK_NUM_SWIZZLES; i++) { 403 BEGIN_CB(blend->cb_clamp[i], 8); 404 OUT_CB_REG(R300_RB3D_ROPCNTL, rop); 405 OUT_CB_REG_SEQ(R300_RB3D_CBLEND, 3); 406 OUT_CB(blend_control); 407 OUT_CB(alpha_blend_control); 408 OUT_CB(func[i](state->rt[0].colormask)); 409 OUT_CB_REG(R300_RB3D_DITHER_CTL, dither); 410 END_CB; 411 } 412 } 413 414 /* Build a command buffer. */ 415 BEGIN_CB(blend->cb_noclamp, 8); 416 OUT_CB_REG(R300_RB3D_ROPCNTL, rop); 417 OUT_CB_REG_SEQ(R300_RB3D_CBLEND, 3); 418 OUT_CB(blend_control_noclamp); 419 OUT_CB(alpha_blend_control_noclamp); 420 OUT_CB(rgba_cmask(state->rt[0].colormask)); 421 OUT_CB_REG(R300_RB3D_DITHER_CTL, dither); 422 END_CB; 423 424 /* The same as above, but with no colorbuffer reads and writes. */ 425 BEGIN_CB(blend->cb_no_readwrite, 8); 426 OUT_CB_REG(R300_RB3D_ROPCNTL, rop); 427 OUT_CB_REG_SEQ(R300_RB3D_CBLEND, 3); 428 OUT_CB(0); 429 OUT_CB(0); 430 OUT_CB(0); 431 OUT_CB_REG(R300_RB3D_DITHER_CTL, dither); 432 END_CB; 433 434 return (void*)blend; 435} 436 437/* Bind blend state. */ 438static void r300_bind_blend_state(struct pipe_context* pipe, 439 void* state) 440{ 441 struct r300_context* r300 = r300_context(pipe); 442 443 UPDATE_STATE(state, r300->blend_state); 444} 445 446/* Free blend state. */ 447static void r300_delete_blend_state(struct pipe_context* pipe, 448 void* state) 449{ 450 FREE(state); 451} 452 453/* Convert float to 10bit integer */ 454static unsigned float_to_fixed10(float f) 455{ 456 return CLAMP((unsigned)(f * 1023.9f), 0, 1023); 457} 458 459/* Set blend color. 460 * Setup both R300 and R500 registers, figure out later which one to write. */ 461static void r300_set_blend_color(struct pipe_context* pipe, 462 const struct pipe_blend_color* color) 463{ 464 struct r300_context* r300 = r300_context(pipe); 465 struct pipe_framebuffer_state *fb = r300->fb_state.state; 466 struct r300_blend_color_state *state = 467 (struct r300_blend_color_state*)r300->blend_color_state.state; 468 struct pipe_blend_color c; 469 enum pipe_format format = fb->nr_cbufs ? fb->cbufs[0]->format : 0; 470 CB_LOCALS; 471 472 state->state = *color; /* Save it, so that we can reuse it in set_fb_state */ 473 c = *color; 474 475 /* The blend color is dependent on the colorbuffer format. */ 476 if (fb->nr_cbufs) { 477 switch (format) { 478 case PIPE_FORMAT_R8_UNORM: 479 case PIPE_FORMAT_L8_UNORM: 480 case PIPE_FORMAT_I8_UNORM: 481 c.color[1] = c.color[0]; 482 break; 483 484 case PIPE_FORMAT_A8_UNORM: 485 c.color[1] = c.color[3]; 486 break; 487 488 case PIPE_FORMAT_R8G8_UNORM: 489 c.color[2] = c.color[1]; 490 break; 491 492 case PIPE_FORMAT_L8A8_UNORM: 493 c.color[2] = c.color[3]; 494 break; 495 496 default:; 497 } 498 } 499 500 if (r300->screen->caps.is_r500) { 501 BEGIN_CB(state->cb, 3); 502 OUT_CB_REG_SEQ(R500_RB3D_CONSTANT_COLOR_AR, 2); 503 504 switch (format) { 505 case PIPE_FORMAT_R16G16B16A16_FLOAT: 506 OUT_CB(util_float_to_half(c.color[2]) | 507 (util_float_to_half(c.color[3]) << 16)); 508 OUT_CB(util_float_to_half(c.color[0]) | 509 (util_float_to_half(c.color[1]) << 16)); 510 break; 511 512 default: 513 OUT_CB(float_to_fixed10(c.color[0]) | 514 (float_to_fixed10(c.color[3]) << 16)); 515 OUT_CB(float_to_fixed10(c.color[2]) | 516 (float_to_fixed10(c.color[1]) << 16)); 517 } 518 519 END_CB; 520 } else { 521 union util_color uc; 522 util_pack_color(c.color, PIPE_FORMAT_B8G8R8A8_UNORM, &uc); 523 524 BEGIN_CB(state->cb, 2); 525 OUT_CB_REG(R300_RB3D_BLEND_COLOR, uc.ui); 526 END_CB; 527 } 528 529 r300_mark_atom_dirty(r300, &r300->blend_color_state); 530} 531 532static void r300_set_clip_state(struct pipe_context* pipe, 533 const struct pipe_clip_state* state) 534{ 535 struct r300_context* r300 = r300_context(pipe); 536 struct r300_clip_state *clip = 537 (struct r300_clip_state*)r300->clip_state.state; 538 CB_LOCALS; 539 540 if (r300->screen->caps.has_tcl) { 541 BEGIN_CB(clip->cb, r300->clip_state.size); 542 OUT_CB_REG(R300_VAP_PVS_VECTOR_INDX_REG, 543 (r300->screen->caps.is_r500 ? 544 R500_PVS_UCP_START : R300_PVS_UCP_START)); 545 OUT_CB_ONE_REG(R300_VAP_PVS_UPLOAD_DATA, 6 * 4); 546 OUT_CB_TABLE(state->ucp, 6 * 4); 547 END_CB; 548 549 r300_mark_atom_dirty(r300, &r300->clip_state); 550 } else { 551 draw_set_clip_state(r300->draw, state); 552 } 553} 554 555static void 556r300_set_sample_mask(struct pipe_context *pipe, 557 unsigned sample_mask) 558{ 559} 560 561 562/* Create a new depth, stencil, and alpha state based on the CSO dsa state. 563 * 564 * This contains the depth buffer, stencil buffer, alpha test, and such. 565 * On the Radeon, depth and stencil buffer setup are intertwined, which is 566 * the reason for some of the strange-looking assignments across registers. */ 567static void* 568 r300_create_dsa_state(struct pipe_context* pipe, 569 const struct pipe_depth_stencil_alpha_state* state) 570{ 571 struct r300_capabilities *caps = &r300_screen(pipe->screen)->caps; 572 struct r300_dsa_state* dsa = CALLOC_STRUCT(r300_dsa_state); 573 CB_LOCALS; 574 575 dsa->dsa = *state; 576 577 /* Depth test setup. - separate write mask depth for decomp flush */ 578 if (state->depth.writemask) { 579 dsa->z_buffer_control |= R300_Z_WRITE_ENABLE; 580 } 581 582 if (state->depth.enabled) { 583 dsa->z_buffer_control |= R300_Z_ENABLE; 584 585 dsa->z_stencil_control |= 586 (r300_translate_depth_stencil_function(state->depth.func) << 587 R300_Z_FUNC_SHIFT); 588 } else { 589 /* We must enable depth test, otherwise occlusion queries won't work. */ 590 dsa->z_buffer_control |= R300_Z_ENABLE; 591 dsa->z_stencil_control |= R300_ZS_ALWAYS; 592 } 593 594 /* Stencil buffer setup. */ 595 if (state->stencil[0].enabled) { 596 dsa->z_buffer_control |= R300_STENCIL_ENABLE; 597 dsa->z_stencil_control |= 598 (r300_translate_depth_stencil_function(state->stencil[0].func) << 599 R300_S_FRONT_FUNC_SHIFT) | 600 (r300_translate_stencil_op(state->stencil[0].fail_op) << 601 R300_S_FRONT_SFAIL_OP_SHIFT) | 602 (r300_translate_stencil_op(state->stencil[0].zpass_op) << 603 R300_S_FRONT_ZPASS_OP_SHIFT) | 604 (r300_translate_stencil_op(state->stencil[0].zfail_op) << 605 R300_S_FRONT_ZFAIL_OP_SHIFT); 606 607 dsa->stencil_ref_mask = 608 (state->stencil[0].valuemask << R300_STENCILMASK_SHIFT) | 609 (state->stencil[0].writemask << R300_STENCILWRITEMASK_SHIFT); 610 611 if (state->stencil[1].enabled) { 612 dsa->two_sided = TRUE; 613 614 dsa->z_buffer_control |= R300_STENCIL_FRONT_BACK; 615 dsa->z_stencil_control |= 616 (r300_translate_depth_stencil_function(state->stencil[1].func) << 617 R300_S_BACK_FUNC_SHIFT) | 618 (r300_translate_stencil_op(state->stencil[1].fail_op) << 619 R300_S_BACK_SFAIL_OP_SHIFT) | 620 (r300_translate_stencil_op(state->stencil[1].zpass_op) << 621 R300_S_BACK_ZPASS_OP_SHIFT) | 622 (r300_translate_stencil_op(state->stencil[1].zfail_op) << 623 R300_S_BACK_ZFAIL_OP_SHIFT); 624 625 dsa->stencil_ref_bf = 626 (state->stencil[1].valuemask << R300_STENCILMASK_SHIFT) | 627 (state->stencil[1].writemask << R300_STENCILWRITEMASK_SHIFT); 628 629 if (caps->is_r500) { 630 dsa->z_buffer_control |= R500_STENCIL_REFMASK_FRONT_BACK; 631 } else { 632 dsa->two_sided_stencil_ref = 633 (state->stencil[0].valuemask != state->stencil[1].valuemask || 634 state->stencil[0].writemask != state->stencil[1].writemask); 635 } 636 } 637 } 638 639 /* Alpha test setup. */ 640 if (state->alpha.enabled) { 641 dsa->alpha_function = 642 r300_translate_alpha_function(state->alpha.func) | 643 R300_FG_ALPHA_FUNC_ENABLE; 644 645 dsa->alpha_function |= float_to_ubyte(state->alpha.ref_value); 646 dsa->alpha_value = util_float_to_half(state->alpha.ref_value); 647 648 if (caps->is_r500) { 649 dsa->alpha_function_fp16 = dsa->alpha_function | 650 R500_FG_ALPHA_FUNC_FP16_ENABLE; 651 dsa->alpha_function |= R500_FG_ALPHA_FUNC_8BIT; 652 } 653 } 654 655 BEGIN_CB(&dsa->cb_begin, 10); 656 OUT_CB_REG(R300_FG_ALPHA_FUNC, dsa->alpha_function); 657 OUT_CB_REG_SEQ(R300_ZB_CNTL, 3); 658 OUT_CB(dsa->z_buffer_control); 659 OUT_CB(dsa->z_stencil_control); 660 OUT_CB(dsa->stencil_ref_mask); 661 OUT_CB_REG(R500_ZB_STENCILREFMASK_BF, dsa->stencil_ref_bf); 662 OUT_CB_REG(R500_FG_ALPHA_VALUE, dsa->alpha_value); 663 END_CB; 664 665 BEGIN_CB(&dsa->cb_begin_fp16, 10); 666 OUT_CB_REG(R300_FG_ALPHA_FUNC, dsa->alpha_function_fp16); 667 OUT_CB_REG_SEQ(R300_ZB_CNTL, 3); 668 OUT_CB(dsa->z_buffer_control); 669 OUT_CB(dsa->z_stencil_control); 670 OUT_CB(dsa->stencil_ref_mask); 671 OUT_CB_REG(R500_ZB_STENCILREFMASK_BF, dsa->stencil_ref_bf); 672 OUT_CB_REG(R500_FG_ALPHA_VALUE, dsa->alpha_value); 673 END_CB; 674 675 /* We must enable depth test, otherwise occlusion queries won't work. 676 * We setup a dummy zbuffer to silent the CS checker, see emit_fb_state. */ 677 BEGIN_CB(dsa->cb_zb_no_readwrite, 10); 678 OUT_CB_REG(R300_FG_ALPHA_FUNC, dsa->alpha_function); 679 OUT_CB_REG_SEQ(R300_ZB_CNTL, 3); 680 OUT_CB(R300_Z_ENABLE); 681 OUT_CB(R300_ZS_ALWAYS); 682 OUT_CB(0); 683 OUT_CB_REG(R500_ZB_STENCILREFMASK_BF, 0); 684 OUT_CB_REG(R500_FG_ALPHA_VALUE, dsa->alpha_value); 685 END_CB; 686 687 BEGIN_CB(dsa->cb_fp16_zb_no_readwrite, 10); 688 OUT_CB_REG(R300_FG_ALPHA_FUNC, dsa->alpha_function_fp16); 689 OUT_CB_REG_SEQ(R300_ZB_CNTL, 3); 690 OUT_CB(R300_Z_ENABLE); 691 OUT_CB(R300_ZS_ALWAYS); 692 OUT_CB(0); 693 OUT_CB_REG(R500_ZB_STENCILREFMASK_BF, 0); 694 OUT_CB_REG(R500_FG_ALPHA_VALUE, dsa->alpha_value); 695 END_CB; 696 697 return (void*)dsa; 698} 699 700static void r300_dsa_inject_stencilref(struct r300_context *r300) 701{ 702 struct r300_dsa_state *dsa = 703 (struct r300_dsa_state*)r300->dsa_state.state; 704 705 if (!dsa) 706 return; 707 708 dsa->stencil_ref_mask = 709 (dsa->stencil_ref_mask & ~R300_STENCILREF_MASK) | 710 r300->stencil_ref.ref_value[0]; 711 dsa->stencil_ref_bf = 712 (dsa->stencil_ref_bf & ~R300_STENCILREF_MASK) | 713 r300->stencil_ref.ref_value[1]; 714} 715 716/* Bind DSA state. */ 717static void r300_bind_dsa_state(struct pipe_context* pipe, 718 void* state) 719{ 720 struct r300_context* r300 = r300_context(pipe); 721 722 if (!state) { 723 return; 724 } 725 726 UPDATE_STATE(state, r300->dsa_state); 727 728 r300_mark_atom_dirty(r300, &r300->hyperz_state); /* Will be updated before the emission. */ 729 r300_dsa_inject_stencilref(r300); 730} 731 732/* Free DSA state. */ 733static void r300_delete_dsa_state(struct pipe_context* pipe, 734 void* state) 735{ 736 FREE(state); 737} 738 739static void r300_set_stencil_ref(struct pipe_context* pipe, 740 const struct pipe_stencil_ref* sr) 741{ 742 struct r300_context* r300 = r300_context(pipe); 743 744 r300->stencil_ref = *sr; 745 746 r300_dsa_inject_stencilref(r300); 747 r300_mark_atom_dirty(r300, &r300->dsa_state); 748} 749 750static void r300_tex_set_tiling_flags(struct r300_context *r300, 751 struct r300_resource *tex, 752 unsigned level) 753{ 754 /* Check if the macrotile flag needs to be changed. 755 * Skip changing the flags otherwise. */ 756 if (tex->tex.macrotile[tex->surface_level] != 757 tex->tex.macrotile[level]) { 758 r300->rws->buffer_set_tiling(tex->buf, r300->cs, 759 tex->tex.microtile, tex->tex.macrotile[level], 760 0, 0, 0, 0, 0, 761 tex->tex.stride_in_bytes[0]); 762 763 tex->surface_level = level; 764 } 765} 766 767/* This switcheroo is needed just because of goddamned MACRO_SWITCH. */ 768static void r300_fb_set_tiling_flags(struct r300_context *r300, 769 const struct pipe_framebuffer_state *state) 770{ 771 unsigned i; 772 773 /* Set tiling flags for new surfaces. */ 774 for (i = 0; i < state->nr_cbufs; i++) { 775 r300_tex_set_tiling_flags(r300, 776 r300_resource(state->cbufs[i]->texture), 777 state->cbufs[i]->u.tex.level); 778 } 779 if (state->zsbuf) { 780 r300_tex_set_tiling_flags(r300, 781 r300_resource(state->zsbuf->texture), 782 state->zsbuf->u.tex.level); 783 } 784} 785 786static void r300_print_fb_surf_info(struct pipe_surface *surf, unsigned index, 787 const char *binding) 788{ 789 struct pipe_resource *tex = surf->texture; 790 struct r300_resource *rtex = r300_resource(tex); 791 792 fprintf(stderr, 793 "r300: %s[%i] Dim: %ix%i, Firstlayer: %i, " 794 "Lastlayer: %i, Level: %i, Format: %s\n" 795 796 "r300: TEX: Macro: %s, Micro: %s, " 797 "Dim: %ix%ix%i, LastLevel: %i, Format: %s\n", 798 799 binding, index, surf->width, surf->height, 800 surf->u.tex.first_layer, surf->u.tex.last_layer, surf->u.tex.level, 801 util_format_short_name(surf->format), 802 803 rtex->tex.macrotile[0] ? "YES" : " NO", 804 rtex->tex.microtile ? "YES" : " NO", 805 tex->width0, tex->height0, tex->depth0, 806 tex->last_level, util_format_short_name(surf->format)); 807} 808 809void r300_mark_fb_state_dirty(struct r300_context *r300, 810 enum r300_fb_state_change change) 811{ 812 struct pipe_framebuffer_state *state = r300->fb_state.state; 813 814 r300_mark_atom_dirty(r300, &r300->gpu_flush); 815 r300_mark_atom_dirty(r300, &r300->fb_state); 816 817 /* What is marked as dirty depends on the enum r300_fb_state_change. */ 818 if (change == R300_CHANGED_FB_STATE) { 819 r300_mark_atom_dirty(r300, &r300->aa_state); 820 r300_mark_atom_dirty(r300, &r300->dsa_state); /* for AlphaRef */ 821 r300_set_blend_color(&r300->context, r300->blend_color_state.state); 822 } 823 824 if (change == R300_CHANGED_FB_STATE || 825 change == R300_CHANGED_HYPERZ_FLAG) { 826 r300_mark_atom_dirty(r300, &r300->hyperz_state); 827 } 828 829 if (change == R300_CHANGED_FB_STATE || 830 change == R300_CHANGED_MULTIWRITE) { 831 r300_mark_atom_dirty(r300, &r300->fb_state_pipelined); 832 } 833 834 /* Now compute the fb_state atom size. */ 835 r300->fb_state.size = 2 + (8 * state->nr_cbufs); 836 837 if (r300->cbzb_clear) { 838 r300->fb_state.size += 10; 839 } else if (state->zsbuf) { 840 r300->fb_state.size += 10; 841 if (r300->hyperz_enabled) 842 r300->fb_state.size += 8; 843 } else if (state->nr_cbufs) { 844 r300->fb_state.size += 10; 845 } 846 847 /* The size of the rest of atoms stays the same. */ 848} 849 850static void 851r300_set_framebuffer_state(struct pipe_context* pipe, 852 const struct pipe_framebuffer_state* state) 853{ 854 struct r300_context* r300 = r300_context(pipe); 855 struct r300_aa_state *aa = (struct r300_aa_state*)r300->aa_state.state; 856 struct pipe_framebuffer_state *old_state = r300->fb_state.state; 857 unsigned max_width, max_height, i; 858 uint32_t zbuffer_bpp = 0; 859 boolean unlock_zbuffer = FALSE; 860 861 if (r300->screen->caps.is_r500) { 862 max_width = max_height = 4096; 863 } else if (r300->screen->caps.is_r400) { 864 max_width = max_height = 4021; 865 } else { 866 max_width = max_height = 2560; 867 } 868 869 if (state->width > max_width || state->height > max_height) { 870 fprintf(stderr, "r300: Implementation error: Render targets are too " 871 "big in %s, refusing to bind framebuffer state!\n", __FUNCTION__); 872 return; 873 } 874 875 if (old_state->zsbuf && r300->zmask_in_use && !r300->locked_zbuffer) { 876 /* There is a zmask in use, what are we gonna do? */ 877 if (state->zsbuf) { 878 if (!pipe_surface_equal(old_state->zsbuf, state->zsbuf)) { 879 /* Decompress the currently bound zbuffer before we bind another one. */ 880 r300_decompress_zmask(r300); 881 r300->hiz_in_use = FALSE; 882 } 883 } else { 884 /* We don't bind another zbuffer, so lock the current one. */ 885 pipe_surface_reference(&r300->locked_zbuffer, old_state->zsbuf); 886 } 887 } else if (r300->locked_zbuffer) { 888 /* We have a locked zbuffer now, what are we gonna do? */ 889 if (state->zsbuf) { 890 if (!pipe_surface_equal(r300->locked_zbuffer, state->zsbuf)) { 891 /* We are binding some other zbuffer, so decompress the locked one, 892 * it gets unlocked automatically. */ 893 r300_decompress_zmask_locked_unsafe(r300); 894 r300->hiz_in_use = FALSE; 895 } else { 896 /* We are binding the locked zbuffer again, so unlock it. */ 897 unlock_zbuffer = TRUE; 898 } 899 } 900 } 901 assert(state->zsbuf || (r300->locked_zbuffer && !unlock_zbuffer) || !r300->zmask_in_use); 902 903 /* Need to reset clamping or colormask. */ 904 r300_mark_atom_dirty(r300, &r300->blend_state); 905 906 /* If zsbuf is set from NULL to non-NULL or vice versa.. */ 907 if (!!old_state->zsbuf != !!state->zsbuf) { 908 r300_mark_atom_dirty(r300, &r300->dsa_state); 909 } 910 911 if (r300->screen->info.drm_minor < 12) { 912 /* The tiling flags are dependent on the surface miplevel, unfortunately. 913 * This workarounds a bad design decision in old kernels which were 914 * rewriting tile fields in registers. */ 915 r300_fb_set_tiling_flags(r300, state); 916 } 917 918 util_copy_framebuffer_state(r300->fb_state.state, state); 919 920 if (unlock_zbuffer) { 921 pipe_surface_reference(&r300->locked_zbuffer, NULL); 922 } 923 924 r300_mark_fb_state_dirty(r300, R300_CHANGED_FB_STATE); 925 926 if (state->zsbuf) { 927 switch (util_format_get_blocksize(state->zsbuf->format)) { 928 case 2: 929 zbuffer_bpp = 16; 930 break; 931 case 4: 932 zbuffer_bpp = 24; 933 break; 934 } 935 936 /* Polygon offset depends on the zbuffer bit depth. */ 937 if (r300->zbuffer_bpp != zbuffer_bpp) { 938 r300->zbuffer_bpp = zbuffer_bpp; 939 940 if (r300->polygon_offset_enabled) 941 r300_mark_atom_dirty(r300, &r300->rs_state); 942 } 943 } 944 945 /* Set up AA config. */ 946 if (state->nr_cbufs && state->cbufs[0]->texture->nr_samples > 1) { 947 aa->aa_config = R300_GB_AA_CONFIG_AA_ENABLE; 948 949 switch (state->cbufs[0]->texture->nr_samples) { 950 case 2: 951 aa->aa_config |= R300_GB_AA_CONFIG_NUM_AA_SUBSAMPLES_2; 952 break; 953 case 3: 954 aa->aa_config |= R300_GB_AA_CONFIG_NUM_AA_SUBSAMPLES_3; 955 break; 956 case 4: 957 aa->aa_config |= R300_GB_AA_CONFIG_NUM_AA_SUBSAMPLES_4; 958 break; 959 case 6: 960 aa->aa_config |= R300_GB_AA_CONFIG_NUM_AA_SUBSAMPLES_6; 961 break; 962 } 963 } else { 964 aa->aa_config = 0; 965 } 966 967 if (DBG_ON(r300, DBG_FB)) { 968 fprintf(stderr, "r300: set_framebuffer_state:\n"); 969 for (i = 0; i < state->nr_cbufs; i++) { 970 r300_print_fb_surf_info(state->cbufs[i], i, "CB"); 971 } 972 if (state->zsbuf) { 973 r300_print_fb_surf_info(state->zsbuf, 0, "ZB"); 974 } 975 } 976} 977 978/* Create fragment shader state. */ 979static void* r300_create_fs_state(struct pipe_context* pipe, 980 const struct pipe_shader_state* shader) 981{ 982 struct r300_fragment_shader* fs = NULL; 983 984 fs = (struct r300_fragment_shader*)CALLOC_STRUCT(r300_fragment_shader); 985 986 /* Copy state directly into shader. */ 987 fs->state = *shader; 988 fs->state.tokens = tgsi_dup_tokens(shader->tokens); 989 990 return (void*)fs; 991} 992 993void r300_mark_fs_code_dirty(struct r300_context *r300) 994{ 995 struct r300_fragment_shader* fs = r300_fs(r300); 996 997 r300_mark_atom_dirty(r300, &r300->fs); 998 r300_mark_atom_dirty(r300, &r300->fs_rc_constant_state); 999 r300_mark_atom_dirty(r300, &r300->fs_constants); 1000 r300->fs.size = fs->shader->cb_code_size; 1001 1002 if (r300->screen->caps.is_r500) { 1003 r300->fs_rc_constant_state.size = fs->shader->rc_state_count * 7; 1004 r300->fs_constants.size = fs->shader->externals_count * 4 + 3; 1005 } else { 1006 r300->fs_rc_constant_state.size = fs->shader->rc_state_count * 5; 1007 r300->fs_constants.size = fs->shader->externals_count * 4 + 1; 1008 } 1009 1010 ((struct r300_constant_buffer*)r300->fs_constants.state)->remap_table = 1011 fs->shader->code.constants_remap_table; 1012} 1013 1014/* Bind fragment shader state. */ 1015static void r300_bind_fs_state(struct pipe_context* pipe, void* shader) 1016{ 1017 struct r300_context* r300 = r300_context(pipe); 1018 struct r300_fragment_shader* fs = (struct r300_fragment_shader*)shader; 1019 1020 if (fs == NULL) { 1021 r300->fs.state = NULL; 1022 return; 1023 } 1024 1025 r300->fs.state = fs; 1026 r300->fs_status = FRAGMENT_SHADER_DIRTY; 1027 1028 r300_mark_atom_dirty(r300, &r300->rs_block_state); /* Will be updated before the emission. */ 1029} 1030 1031/* Delete fragment shader state. */ 1032static void r300_delete_fs_state(struct pipe_context* pipe, void* shader) 1033{ 1034 struct r300_fragment_shader* fs = (struct r300_fragment_shader*)shader; 1035 struct r300_fragment_shader_code *tmp, *ptr = fs->first; 1036 1037 while (ptr) { 1038 tmp = ptr; 1039 ptr = ptr->next; 1040 rc_constants_destroy(&tmp->code.constants); 1041 FREE(tmp->cb_code); 1042 FREE(tmp); 1043 } 1044 FREE((void*)fs->state.tokens); 1045 FREE(shader); 1046} 1047 1048static void r300_set_polygon_stipple(struct pipe_context* pipe, 1049 const struct pipe_poly_stipple* state) 1050{ 1051 /* XXX no idea how to set this up, but not terribly important */ 1052} 1053 1054/* Create a new rasterizer state based on the CSO rasterizer state. 1055 * 1056 * This is a very large chunk of state, and covers most of the graphics 1057 * backend (GB), geometry assembly (GA), and setup unit (SU) blocks. 1058 * 1059 * In a not entirely unironic sidenote, this state has nearly nothing to do 1060 * with the actual block on the Radeon called the rasterizer (RS). */ 1061static void* r300_create_rs_state(struct pipe_context* pipe, 1062 const struct pipe_rasterizer_state* state) 1063{ 1064 struct r300_rs_state* rs = CALLOC_STRUCT(r300_rs_state); 1065 uint32_t vap_control_status; /* R300_VAP_CNTL_STATUS: 0x2140 */ 1066 uint32_t vap_clip_cntl; /* R300_VAP_CLIP_CNTL: 0x221C */ 1067 uint32_t point_size; /* R300_GA_POINT_SIZE: 0x421c */ 1068 uint32_t point_minmax; /* R300_GA_POINT_MINMAX: 0x4230 */ 1069 uint32_t line_control; /* R300_GA_LINE_CNTL: 0x4234 */ 1070 uint32_t polygon_offset_enable; /* R300_SU_POLY_OFFSET_ENABLE: 0x42b4 */ 1071 uint32_t cull_mode; /* R300_SU_CULL_MODE: 0x42b8 */ 1072 uint32_t line_stipple_config; /* R300_GA_LINE_STIPPLE_CONFIG: 0x4328 */ 1073 uint32_t line_stipple_value; /* R300_GA_LINE_STIPPLE_VALUE: 0x4260 */ 1074 uint32_t polygon_mode; /* R300_GA_POLY_MODE: 0x4288 */ 1075 uint32_t clip_rule; /* R300_SC_CLIP_RULE: 0x43D0 */ 1076 uint32_t round_mode; /* R300_GA_ROUND_MODE: 0x428c */ 1077 1078 /* Point sprites texture coordinates, 0: lower left, 1: upper right */ 1079 float point_texcoord_left = 0; /* R300_GA_POINT_S0: 0x4200 */ 1080 float point_texcoord_bottom = 0;/* R300_GA_POINT_T0: 0x4204 */ 1081 float point_texcoord_right = 1; /* R300_GA_POINT_S1: 0x4208 */ 1082 float point_texcoord_top = 0; /* R300_GA_POINT_T1: 0x420c */ 1083 boolean vclamp = state->clamp_vertex_color || 1084 !r300_context(pipe)->screen->caps.is_r500; 1085 CB_LOCALS; 1086 1087 /* Copy rasterizer state. */ 1088 rs->rs = *state; 1089 rs->rs_draw = *state; 1090 1091 rs->rs.sprite_coord_enable = state->point_quad_rasterization * 1092 state->sprite_coord_enable; 1093 1094 /* Override some states for Draw. */ 1095 rs->rs_draw.sprite_coord_enable = 0; /* We can do this in HW. */ 1096 rs->rs_draw.offset_point = 0; 1097 rs->rs_draw.offset_line = 0; 1098 rs->rs_draw.offset_tri = 0; 1099 rs->rs_draw.offset_clamp = 0; 1100 1101#ifdef PIPE_ARCH_LITTLE_ENDIAN 1102 vap_control_status = R300_VC_NO_SWAP; 1103#else 1104 vap_control_status = R300_VC_32BIT_SWAP; 1105#endif 1106 1107 /* If no TCL engine is present, turn off the HW TCL. */ 1108 if (!r300_screen(pipe->screen)->caps.has_tcl) { 1109 vap_control_status |= R300_VAP_TCL_BYPASS; 1110 } 1111 1112 /* Point size width and height. */ 1113 point_size = 1114 pack_float_16_6x(state->point_size) | 1115 (pack_float_16_6x(state->point_size) << R300_POINTSIZE_X_SHIFT); 1116 1117 /* Point size clamping. */ 1118 if (state->point_size_per_vertex) { 1119 /* Per-vertex point size. 1120 * Clamp to [0, max FB size] */ 1121 float min_psiz = util_get_min_point_size(state); 1122 float max_psiz = pipe->screen->get_paramf(pipe->screen, 1123 PIPE_CAPF_MAX_POINT_WIDTH); 1124 point_minmax = 1125 (pack_float_16_6x(min_psiz) << R300_GA_POINT_MINMAX_MIN_SHIFT) | 1126 (pack_float_16_6x(max_psiz) << R300_GA_POINT_MINMAX_MAX_SHIFT); 1127 } else { 1128 /* We cannot disable the point-size vertex output, 1129 * so clamp it. */ 1130 float psiz = state->point_size; 1131 point_minmax = 1132 (pack_float_16_6x(psiz) << R300_GA_POINT_MINMAX_MIN_SHIFT) | 1133 (pack_float_16_6x(psiz) << R300_GA_POINT_MINMAX_MAX_SHIFT); 1134 } 1135 1136 /* Line control. */ 1137 line_control = pack_float_16_6x(state->line_width) | 1138 R300_GA_LINE_CNTL_END_TYPE_COMP; 1139 1140 /* Enable polygon mode */ 1141 polygon_mode = 0; 1142 if (state->fill_front != PIPE_POLYGON_MODE_FILL || 1143 state->fill_back != PIPE_POLYGON_MODE_FILL) { 1144 polygon_mode = R300_GA_POLY_MODE_DUAL; 1145 } 1146 1147 /* Front face */ 1148 if (state->front_ccw) 1149 cull_mode = R300_FRONT_FACE_CCW; 1150 else 1151 cull_mode = R300_FRONT_FACE_CW; 1152 1153 /* Polygon offset */ 1154 polygon_offset_enable = 0; 1155 if (util_get_offset(state, state->fill_front)) { 1156 polygon_offset_enable |= R300_FRONT_ENABLE; 1157 } 1158 if (util_get_offset(state, state->fill_back)) { 1159 polygon_offset_enable |= R300_BACK_ENABLE; 1160 } 1161 1162 rs->polygon_offset_enable = polygon_offset_enable != 0; 1163 1164 /* Polygon mode */ 1165 if (polygon_mode) { 1166 polygon_mode |= 1167 r300_translate_polygon_mode_front(state->fill_front); 1168 polygon_mode |= 1169 r300_translate_polygon_mode_back(state->fill_back); 1170 } 1171 1172 if (state->cull_face & PIPE_FACE_FRONT) { 1173 cull_mode |= R300_CULL_FRONT; 1174 } 1175 if (state->cull_face & PIPE_FACE_BACK) { 1176 cull_mode |= R300_CULL_BACK; 1177 } 1178 1179 if (state->line_stipple_enable) { 1180 line_stipple_config = 1181 R300_GA_LINE_STIPPLE_CONFIG_LINE_RESET_LINE | 1182 (fui((float)state->line_stipple_factor) & 1183 R300_GA_LINE_STIPPLE_CONFIG_STIPPLE_SCALE_MASK); 1184 /* XXX this might need to be scaled up */ 1185 line_stipple_value = state->line_stipple_pattern; 1186 } else { 1187 line_stipple_config = 0; 1188 line_stipple_value = 0; 1189 } 1190 1191 if (state->flatshade) { 1192 rs->color_control = R300_SHADE_MODEL_FLAT; 1193 } else { 1194 rs->color_control = R300_SHADE_MODEL_SMOOTH; 1195 } 1196 1197 clip_rule = state->scissor ? 0xAAAA : 0xFFFF; 1198 1199 /* Point sprites coord mode */ 1200 if (rs->rs.sprite_coord_enable) { 1201 switch (state->sprite_coord_mode) { 1202 case PIPE_SPRITE_COORD_UPPER_LEFT: 1203 point_texcoord_top = 0.0f; 1204 point_texcoord_bottom = 1.0f; 1205 break; 1206 case PIPE_SPRITE_COORD_LOWER_LEFT: 1207 point_texcoord_top = 1.0f; 1208 point_texcoord_bottom = 0.0f; 1209 break; 1210 } 1211 } 1212 1213 if (r300_screen(pipe->screen)->caps.has_tcl) { 1214 vap_clip_cntl = (state->clip_plane_enable & 63) | 1215 R300_PS_UCP_MODE_CLIP_AS_TRIFAN; 1216 } else { 1217 vap_clip_cntl = R300_CLIP_DISABLE; 1218 } 1219 1220 /* Vertex color clamping. FP20 means no clamping. */ 1221 round_mode = 1222 R300_GA_ROUND_MODE_GEOMETRY_ROUND_NEAREST | 1223 (!vclamp ? (R300_GA_ROUND_MODE_RGB_CLAMP_FP20 | 1224 R300_GA_ROUND_MODE_ALPHA_CLAMP_FP20) : 0); 1225 1226 /* Build the main command buffer. */ 1227 BEGIN_CB(rs->cb_main, RS_STATE_MAIN_SIZE); 1228 OUT_CB_REG(R300_VAP_CNTL_STATUS, vap_control_status); 1229 OUT_CB_REG(R300_VAP_CLIP_CNTL, vap_clip_cntl); 1230 OUT_CB_REG(R300_GA_POINT_SIZE, point_size); 1231 OUT_CB_REG_SEQ(R300_GA_POINT_MINMAX, 2); 1232 OUT_CB(point_minmax); 1233 OUT_CB(line_control); 1234 OUT_CB_REG_SEQ(R300_SU_POLY_OFFSET_ENABLE, 2); 1235 OUT_CB(polygon_offset_enable); 1236 rs->cull_mode_index = 11; 1237 OUT_CB(cull_mode); 1238 OUT_CB_REG(R300_GA_LINE_STIPPLE_CONFIG, line_stipple_config); 1239 OUT_CB_REG(R300_GA_LINE_STIPPLE_VALUE, line_stipple_value); 1240 OUT_CB_REG(R300_GA_POLY_MODE, polygon_mode); 1241 OUT_CB_REG(R300_GA_ROUND_MODE, round_mode); 1242 OUT_CB_REG(R300_SC_CLIP_RULE, clip_rule); 1243 OUT_CB_REG_SEQ(R300_GA_POINT_S0, 4); 1244 OUT_CB_32F(point_texcoord_left); 1245 OUT_CB_32F(point_texcoord_bottom); 1246 OUT_CB_32F(point_texcoord_right); 1247 OUT_CB_32F(point_texcoord_top); 1248 END_CB; 1249 1250 /* Build the two command buffers for polygon offset setup. */ 1251 if (polygon_offset_enable) { 1252 float scale = state->offset_scale * 12; 1253 float offset = state->offset_units * 4; 1254 1255 BEGIN_CB(rs->cb_poly_offset_zb16, 5); 1256 OUT_CB_REG_SEQ(R300_SU_POLY_OFFSET_FRONT_SCALE, 4); 1257 OUT_CB_32F(scale); 1258 OUT_CB_32F(offset); 1259 OUT_CB_32F(scale); 1260 OUT_CB_32F(offset); 1261 END_CB; 1262 1263 offset = state->offset_units * 2; 1264 1265 BEGIN_CB(rs->cb_poly_offset_zb24, 5); 1266 OUT_CB_REG_SEQ(R300_SU_POLY_OFFSET_FRONT_SCALE, 4); 1267 OUT_CB_32F(scale); 1268 OUT_CB_32F(offset); 1269 OUT_CB_32F(scale); 1270 OUT_CB_32F(offset); 1271 END_CB; 1272 } 1273 1274 return (void*)rs; 1275} 1276 1277/* Bind rasterizer state. */ 1278static void r300_bind_rs_state(struct pipe_context* pipe, void* state) 1279{ 1280 struct r300_context* r300 = r300_context(pipe); 1281 struct r300_rs_state* rs = (struct r300_rs_state*)state; 1282 int last_sprite_coord_enable = r300->sprite_coord_enable; 1283 boolean last_two_sided_color = r300->two_sided_color; 1284 1285 if (r300->draw && rs) { 1286 draw_set_rasterizer_state(r300->draw, &rs->rs_draw, state); 1287 } 1288 1289 if (rs) { 1290 r300->polygon_offset_enabled = rs->polygon_offset_enable; 1291 r300->sprite_coord_enable = rs->rs.sprite_coord_enable; 1292 r300->two_sided_color = rs->rs.light_twoside; 1293 } else { 1294 r300->polygon_offset_enabled = FALSE; 1295 r300->sprite_coord_enable = 0; 1296 r300->two_sided_color = FALSE; 1297 } 1298 1299 UPDATE_STATE(state, r300->rs_state); 1300 r300->rs_state.size = RS_STATE_MAIN_SIZE + (r300->polygon_offset_enabled ? 5 : 0); 1301 1302 if (last_sprite_coord_enable != r300->sprite_coord_enable || 1303 last_two_sided_color != r300->two_sided_color) { 1304 r300_mark_atom_dirty(r300, &r300->rs_block_state); 1305 } 1306} 1307 1308/* Free rasterizer state. */ 1309static void r300_delete_rs_state(struct pipe_context* pipe, void* state) 1310{ 1311 FREE(state); 1312} 1313 1314static void* 1315 r300_create_sampler_state(struct pipe_context* pipe, 1316 const struct pipe_sampler_state* state) 1317{ 1318 struct r300_context* r300 = r300_context(pipe); 1319 struct r300_sampler_state* sampler = CALLOC_STRUCT(r300_sampler_state); 1320 boolean is_r500 = r300->screen->caps.is_r500; 1321 int lod_bias; 1322 1323 sampler->state = *state; 1324 1325 /* r300 doesn't handle CLAMP and MIRROR_CLAMP correctly when either MAG 1326 * or MIN filter is NEAREST. Since texwrap produces same results 1327 * for CLAMP and CLAMP_TO_EDGE, we use them instead. */ 1328 if (sampler->state.min_img_filter == PIPE_TEX_FILTER_NEAREST || 1329 sampler->state.mag_img_filter == PIPE_TEX_FILTER_NEAREST) { 1330 /* Wrap S. */ 1331 if (sampler->state.wrap_s == PIPE_TEX_WRAP_CLAMP) 1332 sampler->state.wrap_s = PIPE_TEX_WRAP_CLAMP_TO_EDGE; 1333 else if (sampler->state.wrap_s == PIPE_TEX_WRAP_MIRROR_CLAMP) 1334 sampler->state.wrap_s = PIPE_TEX_WRAP_MIRROR_CLAMP_TO_EDGE; 1335 1336 /* Wrap T. */ 1337 if (sampler->state.wrap_t == PIPE_TEX_WRAP_CLAMP) 1338 sampler->state.wrap_t = PIPE_TEX_WRAP_CLAMP_TO_EDGE; 1339 else if (sampler->state.wrap_t == PIPE_TEX_WRAP_MIRROR_CLAMP) 1340 sampler->state.wrap_t = PIPE_TEX_WRAP_MIRROR_CLAMP_TO_EDGE; 1341 1342 /* Wrap R. */ 1343 if (sampler->state.wrap_r == PIPE_TEX_WRAP_CLAMP) 1344 sampler->state.wrap_r = PIPE_TEX_WRAP_CLAMP_TO_EDGE; 1345 else if (sampler->state.wrap_r == PIPE_TEX_WRAP_MIRROR_CLAMP) 1346 sampler->state.wrap_r = PIPE_TEX_WRAP_MIRROR_CLAMP_TO_EDGE; 1347 } 1348 1349 sampler->filter0 |= 1350 (r300_translate_wrap(sampler->state.wrap_s) << R300_TX_WRAP_S_SHIFT) | 1351 (r300_translate_wrap(sampler->state.wrap_t) << R300_TX_WRAP_T_SHIFT) | 1352 (r300_translate_wrap(sampler->state.wrap_r) << R300_TX_WRAP_R_SHIFT); 1353 1354 sampler->filter0 |= r300_translate_tex_filters(state->min_img_filter, 1355 state->mag_img_filter, 1356 state->min_mip_filter, 1357 state->max_anisotropy > 1); 1358 1359 sampler->filter0 |= r300_anisotropy(state->max_anisotropy); 1360 1361 /* Unfortunately, r300-r500 don't support floating-point mipmap lods. */ 1362 /* We must pass these to the merge function to clamp them properly. */ 1363 sampler->min_lod = (unsigned)MAX2(state->min_lod, 0); 1364 sampler->max_lod = (unsigned)MAX2(ceilf(state->max_lod), 0); 1365 1366 lod_bias = CLAMP((int)(state->lod_bias * 32 + 1), -(1 << 9), (1 << 9) - 1); 1367 1368 sampler->filter1 |= (lod_bias << R300_LOD_BIAS_SHIFT) & R300_LOD_BIAS_MASK; 1369 1370 /* This is very high quality anisotropic filtering for R5xx. 1371 * It's good for benchmarking the performance of texturing but 1372 * in practice we don't want to slow down the driver because it's 1373 * a pretty good performance killer. Feel free to play with it. */ 1374 if (DBG_ON(r300, DBG_ANISOHQ) && is_r500) { 1375 sampler->filter1 |= r500_anisotropy(state->max_anisotropy); 1376 } 1377 1378 /* R500-specific fixups and optimizations */ 1379 if (r300->screen->caps.is_r500) { 1380 sampler->filter1 |= R500_BORDER_FIX; 1381 } 1382 1383 return (void*)sampler; 1384} 1385 1386static void r300_bind_sampler_states(struct pipe_context* pipe, 1387 unsigned count, 1388 void** states) 1389{ 1390 struct r300_context* r300 = r300_context(pipe); 1391 struct r300_textures_state* state = 1392 (struct r300_textures_state*)r300->textures_state.state; 1393 unsigned tex_units = r300->screen->caps.num_tex_units; 1394 1395 if (count > tex_units) { 1396 return; 1397 } 1398 1399 memcpy(state->sampler_states, states, sizeof(void*) * count); 1400 state->sampler_state_count = count; 1401 1402 r300_mark_atom_dirty(r300, &r300->textures_state); 1403} 1404 1405static void r300_lacks_vertex_textures(struct pipe_context* pipe, 1406 unsigned count, 1407 void** states) 1408{ 1409} 1410 1411static void r300_delete_sampler_state(struct pipe_context* pipe, void* state) 1412{ 1413 FREE(state); 1414} 1415 1416static uint32_t r300_assign_texture_cache_region(unsigned index, unsigned num) 1417{ 1418 /* This looks like a hack, but I believe it's suppose to work like 1419 * that. To illustrate how this works, let's assume you have 5 textures. 1420 * From docs, 5 and the successive numbers are: 1421 * 1422 * FOURTH_1 = 5 1423 * FOURTH_2 = 6 1424 * FOURTH_3 = 7 1425 * EIGHTH_0 = 8 1426 * EIGHTH_1 = 9 1427 * 1428 * First 3 textures will get 3/4 of size of the cache, divived evenly 1429 * between them. The last 1/4 of the cache must be divided between 1430 * the last 2 textures, each will therefore get 1/8 of the cache. 1431 * Why not just to use "5 + texture_index" ? 1432 * 1433 * This simple trick works for all "num" <= 16. 1434 */ 1435 if (num <= 1) 1436 return R300_TX_CACHE(R300_TX_CACHE_WHOLE); 1437 else 1438 return R300_TX_CACHE(num + index); 1439} 1440 1441static void r300_set_fragment_sampler_views(struct pipe_context* pipe, 1442 unsigned count, 1443 struct pipe_sampler_view** views) 1444{ 1445 struct r300_context* r300 = r300_context(pipe); 1446 struct r300_textures_state* state = 1447 (struct r300_textures_state*)r300->textures_state.state; 1448 struct r300_resource *texture; 1449 unsigned i, real_num_views = 0, view_index = 0; 1450 unsigned tex_units = r300->screen->caps.num_tex_units; 1451 boolean dirty_tex = FALSE; 1452 1453 if (count > tex_units) { 1454 return; 1455 } 1456 1457 /* Calculate the real number of views. */ 1458 for (i = 0; i < count; i++) { 1459 if (views[i]) 1460 real_num_views++; 1461 } 1462 1463 for (i = 0; i < count; i++) { 1464 pipe_sampler_view_reference( 1465 (struct pipe_sampler_view**)&state->sampler_views[i], 1466 views[i]); 1467 1468 if (!views[i]) { 1469 continue; 1470 } 1471 1472 /* A new sampler view (= texture)... */ 1473 dirty_tex = TRUE; 1474 1475 /* Set the texrect factor in the fragment shader. 1476 * Needed for RECT and NPOT fallback. */ 1477 texture = r300_resource(views[i]->texture); 1478 if (texture->tex.is_npot) { 1479 r300_mark_atom_dirty(r300, &r300->fs_rc_constant_state); 1480 } 1481 1482 state->sampler_views[i]->texcache_region = 1483 r300_assign_texture_cache_region(view_index, real_num_views); 1484 view_index++; 1485 } 1486 1487 for (i = count; i < tex_units; i++) { 1488 if (state->sampler_views[i]) { 1489 pipe_sampler_view_reference( 1490 (struct pipe_sampler_view**)&state->sampler_views[i], 1491 NULL); 1492 } 1493 } 1494 1495 state->sampler_view_count = count; 1496 1497 r300_mark_atom_dirty(r300, &r300->textures_state); 1498 1499 if (dirty_tex) { 1500 r300_mark_atom_dirty(r300, &r300->texture_cache_inval); 1501 } 1502} 1503 1504struct pipe_sampler_view * 1505r300_create_sampler_view_custom(struct pipe_context *pipe, 1506 struct pipe_resource *texture, 1507 const struct pipe_sampler_view *templ, 1508 unsigned width0_override, 1509 unsigned height0_override) 1510{ 1511 struct r300_sampler_view *view = CALLOC_STRUCT(r300_sampler_view); 1512 struct r300_resource *tex = r300_resource(texture); 1513 boolean is_r500 = r300_screen(pipe->screen)->caps.is_r500; 1514 boolean dxtc_swizzle = r300_screen(pipe->screen)->caps.dxtc_swizzle; 1515 1516 if (view) { 1517 unsigned hwformat; 1518 1519 view->base = *templ; 1520 view->base.reference.count = 1; 1521 view->base.context = pipe; 1522 view->base.texture = NULL; 1523 pipe_resource_reference(&view->base.texture, texture); 1524 1525 view->width0_override = width0_override; 1526 view->height0_override = height0_override; 1527 view->swizzle[0] = templ->swizzle_r; 1528 view->swizzle[1] = templ->swizzle_g; 1529 view->swizzle[2] = templ->swizzle_b; 1530 view->swizzle[3] = templ->swizzle_a; 1531 1532 hwformat = r300_translate_texformat(templ->format, 1533 view->swizzle, 1534 is_r500, 1535 dxtc_swizzle); 1536 1537 if (hwformat == ~0) { 1538 fprintf(stderr, "r300: Ooops. Got unsupported format %s in %s.\n", 1539 util_format_short_name(templ->format), __func__); 1540 } 1541 assert(hwformat != ~0); 1542 1543 r300_texture_setup_format_state(r300_screen(pipe->screen), tex, 1544 templ->format, 0, 1545 width0_override, height0_override, 1546 &view->format); 1547 view->format.format1 |= hwformat; 1548 if (is_r500) { 1549 view->format.format2 |= r500_tx_format_msb_bit(templ->format); 1550 } 1551 } 1552 1553 return (struct pipe_sampler_view*)view; 1554} 1555 1556static struct pipe_sampler_view * 1557r300_create_sampler_view(struct pipe_context *pipe, 1558 struct pipe_resource *texture, 1559 const struct pipe_sampler_view *templ) 1560{ 1561 return r300_create_sampler_view_custom(pipe, texture, templ, 1562 r300_resource(texture)->tex.width0, 1563 r300_resource(texture)->tex.height0); 1564} 1565 1566 1567static void 1568r300_sampler_view_destroy(struct pipe_context *pipe, 1569 struct pipe_sampler_view *view) 1570{ 1571 pipe_resource_reference(&view->texture, NULL); 1572 FREE(view); 1573} 1574 1575static void r300_set_scissor_state(struct pipe_context* pipe, 1576 const struct pipe_scissor_state* state) 1577{ 1578 struct r300_context* r300 = r300_context(pipe); 1579 1580 memcpy(r300->scissor_state.state, state, 1581 sizeof(struct pipe_scissor_state)); 1582 1583 r300_mark_atom_dirty(r300, &r300->scissor_state); 1584} 1585 1586static void r300_set_viewport_state(struct pipe_context* pipe, 1587 const struct pipe_viewport_state* state) 1588{ 1589 struct r300_context* r300 = r300_context(pipe); 1590 struct r300_viewport_state* viewport = 1591 (struct r300_viewport_state*)r300->viewport_state.state; 1592 1593 r300->viewport = *state; 1594 1595 if (r300->draw) { 1596 draw_set_viewport_state(r300->draw, state); 1597 viewport->vte_control = R300_VTX_XY_FMT | R300_VTX_Z_FMT; 1598 return; 1599 } 1600 1601 /* Do the transform in HW. */ 1602 viewport->vte_control = R300_VTX_W0_FMT; 1603 1604 if (state->scale[0] != 1.0f) { 1605 viewport->xscale = state->scale[0]; 1606 viewport->vte_control |= R300_VPORT_X_SCALE_ENA; 1607 } 1608 if (state->scale[1] != 1.0f) { 1609 viewport->yscale = state->scale[1]; 1610 viewport->vte_control |= R300_VPORT_Y_SCALE_ENA; 1611 } 1612 if (state->scale[2] != 1.0f) { 1613 viewport->zscale = state->scale[2]; 1614 viewport->vte_control |= R300_VPORT_Z_SCALE_ENA; 1615 } 1616 if (state->translate[0] != 0.0f) { 1617 viewport->xoffset = state->translate[0]; 1618 viewport->vte_control |= R300_VPORT_X_OFFSET_ENA; 1619 } 1620 if (state->translate[1] != 0.0f) { 1621 viewport->yoffset = state->translate[1]; 1622 viewport->vte_control |= R300_VPORT_Y_OFFSET_ENA; 1623 } 1624 if (state->translate[2] != 0.0f) { 1625 viewport->zoffset = state->translate[2]; 1626 viewport->vte_control |= R300_VPORT_Z_OFFSET_ENA; 1627 } 1628 1629 r300_mark_atom_dirty(r300, &r300->viewport_state); 1630 if (r300->fs.state && r300_fs(r300)->shader && 1631 r300_fs(r300)->shader->inputs.wpos != ATTR_UNUSED) { 1632 r300_mark_atom_dirty(r300, &r300->fs_rc_constant_state); 1633 } 1634} 1635 1636static void r300_set_vertex_buffers_hwtcl(struct pipe_context* pipe, 1637 unsigned count, 1638 const struct pipe_vertex_buffer* buffers) 1639{ 1640 struct r300_context* r300 = r300_context(pipe); 1641 1642 /* There must be at least one vertex buffer set, otherwise it locks up. */ 1643 if (!count) { 1644 buffers = &r300->dummy_vb; 1645 count = 1; 1646 } 1647 1648 util_copy_vertex_buffers(r300->vertex_buffer, 1649 &r300->nr_vertex_buffers, 1650 buffers, count); 1651 1652 r300->vertex_arrays_dirty = TRUE; 1653} 1654 1655static void r300_set_vertex_buffers_swtcl(struct pipe_context* pipe, 1656 unsigned count, 1657 const struct pipe_vertex_buffer* buffers) 1658{ 1659 struct r300_context* r300 = r300_context(pipe); 1660 unsigned i; 1661 1662 util_copy_vertex_buffers(r300->vertex_buffer, 1663 &r300->nr_vertex_buffers, 1664 buffers, count); 1665 draw_set_vertex_buffers(r300->draw, count, buffers); 1666 1667 for (i = 0; i < count; i++) { 1668 if (buffers[i].user_buffer) { 1669 draw_set_mapped_vertex_buffer(r300->draw, i, 1670 buffers[i].user_buffer); 1671 } else if (buffers[i].buffer) { 1672 draw_set_mapped_vertex_buffer(r300->draw, i, 1673 r300_resource(buffers[i].buffer)->malloced_buffer); 1674 } 1675 } 1676} 1677 1678static void r300_set_index_buffer_hwtcl(struct pipe_context* pipe, 1679 const struct pipe_index_buffer *ib) 1680{ 1681 struct r300_context* r300 = r300_context(pipe); 1682 1683 if (ib) { 1684 pipe_resource_reference(&r300->index_buffer.buffer, ib->buffer); 1685 memcpy(&r300->index_buffer, ib, sizeof(*ib)); 1686 } else { 1687 pipe_resource_reference(&r300->index_buffer.buffer, NULL); 1688 } 1689} 1690 1691static void r300_set_index_buffer_swtcl(struct pipe_context* pipe, 1692 const struct pipe_index_buffer *ib) 1693{ 1694 struct r300_context* r300 = r300_context(pipe); 1695 1696 if (ib) { 1697 const void *buf = NULL; 1698 if (ib->user_buffer) { 1699 buf = ib->user_buffer; 1700 } else if (ib->buffer) { 1701 buf = r300_resource(ib->buffer)->malloced_buffer; 1702 } 1703 draw_set_indexes(r300->draw, 1704 (const ubyte *) buf + ib->offset, 1705 ib->index_size); 1706 } 1707} 1708 1709/* Initialize the PSC tables. */ 1710static void r300_vertex_psc(struct r300_vertex_element_state *velems) 1711{ 1712 struct r300_vertex_stream_state *vstream = &velems->vertex_stream; 1713 uint16_t type, swizzle; 1714 enum pipe_format format; 1715 unsigned i; 1716 1717 /* Vertex shaders have no semantics on their inputs, 1718 * so PSC should just route stuff based on the vertex elements, 1719 * and not on attrib information. */ 1720 for (i = 0; i < velems->count; i++) { 1721 format = velems->velem[i].src_format; 1722 1723 type = r300_translate_vertex_data_type(format); 1724 if (type == R300_INVALID_FORMAT) { 1725 fprintf(stderr, "r300: Bad vertex format %s.\n", 1726 util_format_short_name(format)); 1727 assert(0); 1728 abort(); 1729 } 1730 1731 type |= i << R300_DST_VEC_LOC_SHIFT; 1732 swizzle = r300_translate_vertex_data_swizzle(format); 1733 1734 if (i & 1) { 1735 vstream->vap_prog_stream_cntl[i >> 1] |= type << 16; 1736 vstream->vap_prog_stream_cntl_ext[i >> 1] |= swizzle << 16; 1737 } else { 1738 vstream->vap_prog_stream_cntl[i >> 1] |= type; 1739 vstream->vap_prog_stream_cntl_ext[i >> 1] |= swizzle; 1740 } 1741 } 1742 1743 /* Set the last vector in the PSC. */ 1744 if (i) { 1745 i -= 1; 1746 } 1747 vstream->vap_prog_stream_cntl[i >> 1] |= 1748 (R300_LAST_VEC << (i & 1 ? 16 : 0)); 1749 1750 vstream->count = (i >> 1) + 1; 1751} 1752 1753static void* r300_create_vertex_elements_state(struct pipe_context* pipe, 1754 unsigned count, 1755 const struct pipe_vertex_element* attribs) 1756{ 1757 struct r300_vertex_element_state *velems; 1758 unsigned i; 1759 struct pipe_vertex_element dummy_attrib = {0}; 1760 1761 /* R300 Programmable Stream Control (PSC) doesn't support 0 vertex elements. */ 1762 if (!count) { 1763 dummy_attrib.src_format = PIPE_FORMAT_R8G8B8A8_UNORM; 1764 attribs = &dummy_attrib; 1765 count = 1; 1766 } else if (count > 16) { 1767 fprintf(stderr, "r300: More than 16 vertex elements are not supported," 1768 " requested %i, using 16.\n", count); 1769 count = 16; 1770 } 1771 1772 velems = CALLOC_STRUCT(r300_vertex_element_state); 1773 if (!velems) 1774 return NULL; 1775 1776 velems->count = count; 1777 memcpy(velems->velem, attribs, sizeof(struct pipe_vertex_element) * count); 1778 1779 if (r300_screen(pipe->screen)->caps.has_tcl) { 1780 /* Setup PSC. 1781 * The unused components will be replaced by (..., 0, 1). */ 1782 r300_vertex_psc(velems); 1783 1784 for (i = 0; i < count; i++) { 1785 velems->format_size[i] = 1786 align(util_format_get_blocksize(velems->velem[i].src_format), 4); 1787 velems->vertex_size_dwords += velems->format_size[i] / 4; 1788 } 1789 } 1790 1791 return velems; 1792} 1793 1794static void r300_bind_vertex_elements_state(struct pipe_context *pipe, 1795 void *state) 1796{ 1797 struct r300_context *r300 = r300_context(pipe); 1798 struct r300_vertex_element_state *velems = state; 1799 1800 if (velems == NULL) { 1801 return; 1802 } 1803 1804 r300->velems = velems; 1805 1806 if (r300->draw) { 1807 draw_set_vertex_elements(r300->draw, velems->count, velems->velem); 1808 return; 1809 } 1810 1811 UPDATE_STATE(&velems->vertex_stream, r300->vertex_stream_state); 1812 r300->vertex_stream_state.size = (1 + velems->vertex_stream.count) * 2; 1813 r300->vertex_arrays_dirty = TRUE; 1814} 1815 1816static void r300_delete_vertex_elements_state(struct pipe_context *pipe, void *state) 1817{ 1818 FREE(state); 1819} 1820 1821static void* r300_create_vs_state(struct pipe_context* pipe, 1822 const struct pipe_shader_state* shader) 1823{ 1824 struct r300_context* r300 = r300_context(pipe); 1825 struct r300_vertex_shader* vs = CALLOC_STRUCT(r300_vertex_shader); 1826 1827 /* Copy state directly into shader. */ 1828 vs->state = *shader; 1829 vs->state.tokens = tgsi_dup_tokens(shader->tokens); 1830 1831 if (r300->screen->caps.has_tcl) { 1832 r300_init_vs_outputs(r300, vs); 1833 r300_translate_vertex_shader(r300, vs); 1834 } else { 1835 r300_draw_init_vertex_shader(r300, vs); 1836 } 1837 1838 return vs; 1839} 1840 1841static void r300_bind_vs_state(struct pipe_context* pipe, void* shader) 1842{ 1843 struct r300_context* r300 = r300_context(pipe); 1844 struct r300_vertex_shader* vs = (struct r300_vertex_shader*)shader; 1845 1846 if (vs == NULL) { 1847 r300->vs_state.state = NULL; 1848 return; 1849 } 1850 if (vs == r300->vs_state.state) { 1851 return; 1852 } 1853 r300->vs_state.state = vs; 1854 1855 /* The majority of the RS block bits is dependent on the vertex shader. */ 1856 r300_mark_atom_dirty(r300, &r300->rs_block_state); /* Will be updated before the emission. */ 1857 1858 if (r300->screen->caps.has_tcl) { 1859 unsigned fc_op_dwords = r300->screen->caps.is_r500 ? 3 : 2; 1860 r300_mark_atom_dirty(r300, &r300->vs_state); 1861 r300->vs_state.size = vs->code.length + 9 + 1862 (R300_VS_MAX_FC_OPS * fc_op_dwords + 4); 1863 1864 r300_mark_atom_dirty(r300, &r300->vs_constants); 1865 r300->vs_constants.size = 1866 2 + 1867 (vs->externals_count ? vs->externals_count * 4 + 3 : 0) + 1868 (vs->immediates_count ? vs->immediates_count * 4 + 3 : 0); 1869 1870 ((struct r300_constant_buffer*)r300->vs_constants.state)->remap_table = 1871 vs->code.constants_remap_table; 1872 1873 r300_mark_atom_dirty(r300, &r300->pvs_flush); 1874 } else { 1875 draw_bind_vertex_shader(r300->draw, 1876 (struct draw_vertex_shader*)vs->draw_vs); 1877 } 1878} 1879 1880static void r300_delete_vs_state(struct pipe_context* pipe, void* shader) 1881{ 1882 struct r300_context* r300 = r300_context(pipe); 1883 struct r300_vertex_shader* vs = (struct r300_vertex_shader*)shader; 1884 1885 if (r300->screen->caps.has_tcl) { 1886 rc_constants_destroy(&vs->code.constants); 1887 if (vs->code.constants_remap_table) 1888 FREE(vs->code.constants_remap_table); 1889 } else { 1890 draw_delete_vertex_shader(r300->draw, 1891 (struct draw_vertex_shader*)vs->draw_vs); 1892 } 1893 1894 FREE((void*)vs->state.tokens); 1895 FREE(shader); 1896} 1897 1898static void r300_set_constant_buffer(struct pipe_context *pipe, 1899 uint shader, uint index, 1900 struct pipe_constant_buffer *cb) 1901{ 1902 struct r300_context* r300 = r300_context(pipe); 1903 struct r300_constant_buffer *cbuf; 1904 uint32_t *mapped; 1905 1906 if (!cb) 1907 return; 1908 1909 switch (shader) { 1910 case PIPE_SHADER_VERTEX: 1911 cbuf = (struct r300_constant_buffer*)r300->vs_constants.state; 1912 break; 1913 case PIPE_SHADER_FRAGMENT: 1914 cbuf = (struct r300_constant_buffer*)r300->fs_constants.state; 1915 break; 1916 default: 1917 return; 1918 } 1919 1920 1921 if (cb->user_buffer) 1922 mapped = (uint32_t*)cb->user_buffer; 1923 else { 1924 struct r300_resource *rbuf = r300_resource(cb->buffer); 1925 1926 if (rbuf && rbuf->malloced_buffer) 1927 mapped = (uint32_t*)rbuf->malloced_buffer; 1928 else 1929 return; 1930 } 1931 1932 if (shader == PIPE_SHADER_FRAGMENT || 1933 (shader == PIPE_SHADER_VERTEX && r300->screen->caps.has_tcl)) { 1934 cbuf->ptr = mapped; 1935 } 1936 1937 if (shader == PIPE_SHADER_VERTEX) { 1938 if (r300->screen->caps.has_tcl) { 1939 struct r300_vertex_shader *vs = 1940 (struct r300_vertex_shader*)r300->vs_state.state; 1941 1942 if (!vs) { 1943 cbuf->buffer_base = 0; 1944 return; 1945 } 1946 1947 cbuf->buffer_base = r300->vs_const_base; 1948 r300->vs_const_base += vs->code.constants.Count; 1949 if (r300->vs_const_base > R500_MAX_PVS_CONST_VECS) { 1950 r300->vs_const_base = vs->code.constants.Count; 1951 cbuf->buffer_base = 0; 1952 r300_mark_atom_dirty(r300, &r300->pvs_flush); 1953 } 1954 r300_mark_atom_dirty(r300, &r300->vs_constants); 1955 } else if (r300->draw) { 1956 draw_set_mapped_constant_buffer(r300->draw, PIPE_SHADER_VERTEX, 1957 0, mapped, cb->buffer_size); 1958 } 1959 } else if (shader == PIPE_SHADER_FRAGMENT) { 1960 r300_mark_atom_dirty(r300, &r300->fs_constants); 1961 } 1962} 1963 1964static void r300_texture_barrier(struct pipe_context *pipe) 1965{ 1966 struct r300_context *r300 = r300_context(pipe); 1967 1968 r300_mark_atom_dirty(r300, &r300->gpu_flush); 1969 r300_mark_atom_dirty(r300, &r300->texture_cache_inval); 1970} 1971 1972void r300_init_state_functions(struct r300_context* r300) 1973{ 1974 r300->context.create_blend_state = r300_create_blend_state; 1975 r300->context.bind_blend_state = r300_bind_blend_state; 1976 r300->context.delete_blend_state = r300_delete_blend_state; 1977 1978 r300->context.set_blend_color = r300_set_blend_color; 1979 1980 r300->context.set_clip_state = r300_set_clip_state; 1981 r300->context.set_sample_mask = r300_set_sample_mask; 1982 1983 r300->context.set_constant_buffer = r300_set_constant_buffer; 1984 1985 r300->context.create_depth_stencil_alpha_state = r300_create_dsa_state; 1986 r300->context.bind_depth_stencil_alpha_state = r300_bind_dsa_state; 1987 r300->context.delete_depth_stencil_alpha_state = r300_delete_dsa_state; 1988 1989 r300->context.set_stencil_ref = r300_set_stencil_ref; 1990 1991 r300->context.set_framebuffer_state = r300_set_framebuffer_state; 1992 1993 r300->context.create_fs_state = r300_create_fs_state; 1994 r300->context.bind_fs_state = r300_bind_fs_state; 1995 r300->context.delete_fs_state = r300_delete_fs_state; 1996 1997 r300->context.set_polygon_stipple = r300_set_polygon_stipple; 1998 1999 r300->context.create_rasterizer_state = r300_create_rs_state; 2000 r300->context.bind_rasterizer_state = r300_bind_rs_state; 2001 r300->context.delete_rasterizer_state = r300_delete_rs_state; 2002 2003 r300->context.create_sampler_state = r300_create_sampler_state; 2004 r300->context.bind_fragment_sampler_states = r300_bind_sampler_states; 2005 r300->context.bind_vertex_sampler_states = r300_lacks_vertex_textures; 2006 r300->context.delete_sampler_state = r300_delete_sampler_state; 2007 2008 r300->context.set_fragment_sampler_views = r300_set_fragment_sampler_views; 2009 r300->context.create_sampler_view = r300_create_sampler_view; 2010 r300->context.sampler_view_destroy = r300_sampler_view_destroy; 2011 2012 r300->context.set_scissor_state = r300_set_scissor_state; 2013 2014 r300->context.set_viewport_state = r300_set_viewport_state; 2015 2016 if (r300->screen->caps.has_tcl) { 2017 r300->context.set_vertex_buffers = r300_set_vertex_buffers_hwtcl; 2018 r300->context.set_index_buffer = r300_set_index_buffer_hwtcl; 2019 } else { 2020 r300->context.set_vertex_buffers = r300_set_vertex_buffers_swtcl; 2021 r300->context.set_index_buffer = r300_set_index_buffer_swtcl; 2022 } 2023 2024 r300->context.create_vertex_elements_state = r300_create_vertex_elements_state; 2025 r300->context.bind_vertex_elements_state = r300_bind_vertex_elements_state; 2026 r300->context.delete_vertex_elements_state = r300_delete_vertex_elements_state; 2027 2028 r300->context.create_vs_state = r300_create_vs_state; 2029 r300->context.bind_vs_state = r300_bind_vs_state; 2030 r300->context.delete_vs_state = r300_delete_vs_state; 2031 2032 r300->context.texture_barrier = r300_texture_barrier; 2033} 2034