10578287155cb60143bcf70fdf5e1c2beb0b92c07cerion/*---------------------------------------------------------------*/ 2752f90673ebbb6b2f55fc5e46606dea371313713sewardj/*--- begin host_arm_defs.h ---*/ 30578287155cb60143bcf70fdf5e1c2beb0b92c07cerion/*---------------------------------------------------------------*/ 40578287155cb60143bcf70fdf5e1c2beb0b92c07cerion 50578287155cb60143bcf70fdf5e1c2beb0b92c07cerion/* 6752f90673ebbb6b2f55fc5e46606dea371313713sewardj This file is part of Valgrind, a dynamic binary instrumentation 7752f90673ebbb6b2f55fc5e46606dea371313713sewardj framework. 80578287155cb60143bcf70fdf5e1c2beb0b92c07cerion 9785952d4bf502fa756b2ac58595fd31fe0f88559sewardj Copyright (C) 2004-2015 OpenWorks LLP 10752f90673ebbb6b2f55fc5e46606dea371313713sewardj info@open-works.net 110578287155cb60143bcf70fdf5e1c2beb0b92c07cerion 12752f90673ebbb6b2f55fc5e46606dea371313713sewardj This program is free software; you can redistribute it and/or 13752f90673ebbb6b2f55fc5e46606dea371313713sewardj modify it under the terms of the GNU General Public License as 14752f90673ebbb6b2f55fc5e46606dea371313713sewardj published by the Free Software Foundation; either version 2 of the 15752f90673ebbb6b2f55fc5e46606dea371313713sewardj License, or (at your option) any later version. 160578287155cb60143bcf70fdf5e1c2beb0b92c07cerion 17752f90673ebbb6b2f55fc5e46606dea371313713sewardj This program is distributed in the hope that it will be useful, but 18752f90673ebbb6b2f55fc5e46606dea371313713sewardj WITHOUT ANY WARRANTY; without even the implied warranty of 19752f90673ebbb6b2f55fc5e46606dea371313713sewardj MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 20752f90673ebbb6b2f55fc5e46606dea371313713sewardj General Public License for more details. 21752f90673ebbb6b2f55fc5e46606dea371313713sewardj 22752f90673ebbb6b2f55fc5e46606dea371313713sewardj You should have received a copy of the GNU General Public License 23752f90673ebbb6b2f55fc5e46606dea371313713sewardj along with this program; if not, write to the Free Software 24752f90673ebbb6b2f55fc5e46606dea371313713sewardj Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 257bd6ffe203f3aa9e7b25f7eae40a9b9cf48710cfsewardj 02110-1301, USA. 267bd6ffe203f3aa9e7b25f7eae40a9b9cf48710cfsewardj 27752f90673ebbb6b2f55fc5e46606dea371313713sewardj The GNU General Public License is contained in the file COPYING. 280578287155cb60143bcf70fdf5e1c2beb0b92c07cerion*/ 290578287155cb60143bcf70fdf5e1c2beb0b92c07cerion 30cef7d3e3df4796e35b4521158d9dc058f034aa87sewardj#ifndef __VEX_HOST_ARM_DEFS_H 31cef7d3e3df4796e35b4521158d9dc058f034aa87sewardj#define __VEX_HOST_ARM_DEFS_H 320578287155cb60143bcf70fdf5e1c2beb0b92c07cerion 3358a637b6675d4d68e13d18b75cea7eee2a2a91feflorian#include "libvex_basictypes.h" 3458a637b6675d4d68e13d18b75cea7eee2a2a91feflorian#include "libvex.h" // VexArch 3558a637b6675d4d68e13d18b75cea7eee2a2a91feflorian#include "host_generic_regs.h" // HReg 3658a637b6675d4d68e13d18b75cea7eee2a2a91feflorian 376c60b32ab93e77a2709549dbc6eaa649eb915204sewardjextern UInt arm_hwcaps; 386c60b32ab93e77a2709549dbc6eaa649eb915204sewardj 390578287155cb60143bcf70fdf5e1c2beb0b92c07cerion 400578287155cb60143bcf70fdf5e1c2beb0b92c07cerion/* --------- Registers. --------- */ 410578287155cb60143bcf70fdf5e1c2beb0b92c07cerion 42a5b502299bfc9d97f4c2c9f61cdc1a0a65e1da61sewardj#define ST_IN static inline 43a5b502299bfc9d97f4c2c9f61cdc1a0a65e1da61sewardjST_IN HReg hregARM_R4 ( void ) { return mkHReg(False, HRcInt32, 4, 0); } 44a5b502299bfc9d97f4c2c9f61cdc1a0a65e1da61sewardjST_IN HReg hregARM_R5 ( void ) { return mkHReg(False, HRcInt32, 5, 1); } 45a5b502299bfc9d97f4c2c9f61cdc1a0a65e1da61sewardjST_IN HReg hregARM_R6 ( void ) { return mkHReg(False, HRcInt32, 6, 2); } 46a5b502299bfc9d97f4c2c9f61cdc1a0a65e1da61sewardjST_IN HReg hregARM_R7 ( void ) { return mkHReg(False, HRcInt32, 7, 3); } 47a5b502299bfc9d97f4c2c9f61cdc1a0a65e1da61sewardjST_IN HReg hregARM_R10 ( void ) { return mkHReg(False, HRcInt32, 10, 4); } 48a5b502299bfc9d97f4c2c9f61cdc1a0a65e1da61sewardjST_IN HReg hregARM_R11 ( void ) { return mkHReg(False, HRcInt32, 11, 5); } 49a5b502299bfc9d97f4c2c9f61cdc1a0a65e1da61sewardj 50a5b502299bfc9d97f4c2c9f61cdc1a0a65e1da61sewardjST_IN HReg hregARM_R0 ( void ) { return mkHReg(False, HRcInt32, 0, 6); } 51a5b502299bfc9d97f4c2c9f61cdc1a0a65e1da61sewardjST_IN HReg hregARM_R1 ( void ) { return mkHReg(False, HRcInt32, 1, 7); } 52a5b502299bfc9d97f4c2c9f61cdc1a0a65e1da61sewardjST_IN HReg hregARM_R2 ( void ) { return mkHReg(False, HRcInt32, 2, 8); } 53a5b502299bfc9d97f4c2c9f61cdc1a0a65e1da61sewardjST_IN HReg hregARM_R3 ( void ) { return mkHReg(False, HRcInt32, 3, 9); } 54a5b502299bfc9d97f4c2c9f61cdc1a0a65e1da61sewardjST_IN HReg hregARM_R9 ( void ) { return mkHReg(False, HRcInt32, 9, 10); } 55a5b502299bfc9d97f4c2c9f61cdc1a0a65e1da61sewardj 56a5b502299bfc9d97f4c2c9f61cdc1a0a65e1da61sewardjST_IN HReg hregARM_D8 ( void ) { return mkHReg(False, HRcFlt64, 8, 11); } 57a5b502299bfc9d97f4c2c9f61cdc1a0a65e1da61sewardjST_IN HReg hregARM_D9 ( void ) { return mkHReg(False, HRcFlt64, 9, 12); } 58a5b502299bfc9d97f4c2c9f61cdc1a0a65e1da61sewardjST_IN HReg hregARM_D10 ( void ) { return mkHReg(False, HRcFlt64, 10, 13); } 59a5b502299bfc9d97f4c2c9f61cdc1a0a65e1da61sewardjST_IN HReg hregARM_D11 ( void ) { return mkHReg(False, HRcFlt64, 11, 14); } 60a5b502299bfc9d97f4c2c9f61cdc1a0a65e1da61sewardjST_IN HReg hregARM_D12 ( void ) { return mkHReg(False, HRcFlt64, 12, 15); } 61a5b502299bfc9d97f4c2c9f61cdc1a0a65e1da61sewardj 62a5b502299bfc9d97f4c2c9f61cdc1a0a65e1da61sewardjST_IN HReg hregARM_S26 ( void ) { return mkHReg(False, HRcFlt32, 26, 16); } 63a5b502299bfc9d97f4c2c9f61cdc1a0a65e1da61sewardjST_IN HReg hregARM_S27 ( void ) { return mkHReg(False, HRcFlt32, 27, 17); } 64a5b502299bfc9d97f4c2c9f61cdc1a0a65e1da61sewardjST_IN HReg hregARM_S28 ( void ) { return mkHReg(False, HRcFlt32, 28, 18); } 65a5b502299bfc9d97f4c2c9f61cdc1a0a65e1da61sewardjST_IN HReg hregARM_S29 ( void ) { return mkHReg(False, HRcFlt32, 29, 19); } 66a5b502299bfc9d97f4c2c9f61cdc1a0a65e1da61sewardjST_IN HReg hregARM_S30 ( void ) { return mkHReg(False, HRcFlt32, 30, 20); } 67a5b502299bfc9d97f4c2c9f61cdc1a0a65e1da61sewardj 68a5b502299bfc9d97f4c2c9f61cdc1a0a65e1da61sewardjST_IN HReg hregARM_Q8 ( void ) { return mkHReg(False, HRcVec128, 8, 21); } 69a5b502299bfc9d97f4c2c9f61cdc1a0a65e1da61sewardjST_IN HReg hregARM_Q9 ( void ) { return mkHReg(False, HRcVec128, 9, 22); } 70a5b502299bfc9d97f4c2c9f61cdc1a0a65e1da61sewardjST_IN HReg hregARM_Q10 ( void ) { return mkHReg(False, HRcVec128, 10, 23); } 71a5b502299bfc9d97f4c2c9f61cdc1a0a65e1da61sewardjST_IN HReg hregARM_Q11 ( void ) { return mkHReg(False, HRcVec128, 11, 24); } 72a5b502299bfc9d97f4c2c9f61cdc1a0a65e1da61sewardjST_IN HReg hregARM_Q12 ( void ) { return mkHReg(False, HRcVec128, 12, 25); } 73a5b502299bfc9d97f4c2c9f61cdc1a0a65e1da61sewardj 74a5b502299bfc9d97f4c2c9f61cdc1a0a65e1da61sewardjST_IN HReg hregARM_R8 ( void ) { return mkHReg(False, HRcInt32, 8, 26); } 75a5b502299bfc9d97f4c2c9f61cdc1a0a65e1da61sewardjST_IN HReg hregARM_R12 ( void ) { return mkHReg(False, HRcInt32, 12, 27); } 76a5b502299bfc9d97f4c2c9f61cdc1a0a65e1da61sewardjST_IN HReg hregARM_R13 ( void ) { return mkHReg(False, HRcInt32, 13, 28); } 77a5b502299bfc9d97f4c2c9f61cdc1a0a65e1da61sewardjST_IN HReg hregARM_R14 ( void ) { return mkHReg(False, HRcInt32, 14, 29); } 78a5b502299bfc9d97f4c2c9f61cdc1a0a65e1da61sewardjST_IN HReg hregARM_R15 ( void ) { return mkHReg(False, HRcInt32, 15, 30); } 79a5b502299bfc9d97f4c2c9f61cdc1a0a65e1da61sewardjST_IN HReg hregARM_Q13 ( void ) { return mkHReg(False, HRcVec128, 13, 31); } 80a5b502299bfc9d97f4c2c9f61cdc1a0a65e1da61sewardjST_IN HReg hregARM_Q14 ( void ) { return mkHReg(False, HRcVec128, 14, 32); } 81a5b502299bfc9d97f4c2c9f61cdc1a0a65e1da61sewardjST_IN HReg hregARM_Q15 ( void ) { return mkHReg(False, HRcVec128, 15, 33); } 82a5b502299bfc9d97f4c2c9f61cdc1a0a65e1da61sewardj#undef ST_IN 830578287155cb60143bcf70fdf5e1c2beb0b92c07cerion 840578287155cb60143bcf70fdf5e1c2beb0b92c07cerionextern void ppHRegARM ( HReg ); 850578287155cb60143bcf70fdf5e1c2beb0b92c07cerion 866c299f3acab617581ea504e45fbb6cab24c2b29fsewardj/* Number of registers used arg passing in function calls */ 876c299f3acab617581ea504e45fbb6cab24c2b29fsewardj#define ARM_N_ARGREGS 4 /* r0, r1, r2, r3 */ 880578287155cb60143bcf70fdf5e1c2beb0b92c07cerion 890578287155cb60143bcf70fdf5e1c2beb0b92c07cerion 906c299f3acab617581ea504e45fbb6cab24c2b29fsewardj/* --------- Condition codes. --------- */ 910578287155cb60143bcf70fdf5e1c2beb0b92c07cerion 920578287155cb60143bcf70fdf5e1c2beb0b92c07ceriontypedef 930578287155cb60143bcf70fdf5e1c2beb0b92c07cerion enum { 946c299f3acab617581ea504e45fbb6cab24c2b29fsewardj ARMcc_EQ = 0, /* equal : Z=1 */ 956c299f3acab617581ea504e45fbb6cab24c2b29fsewardj ARMcc_NE = 1, /* not equal : Z=0 */ 960578287155cb60143bcf70fdf5e1c2beb0b92c07cerion 976c299f3acab617581ea504e45fbb6cab24c2b29fsewardj ARMcc_HS = 2, /* >=u (higher or same) : C=1 */ 986c299f3acab617581ea504e45fbb6cab24c2b29fsewardj ARMcc_LO = 3, /* <u (lower) : C=0 */ 990578287155cb60143bcf70fdf5e1c2beb0b92c07cerion 1006c299f3acab617581ea504e45fbb6cab24c2b29fsewardj ARMcc_MI = 4, /* minus (negative) : N=1 */ 1016c299f3acab617581ea504e45fbb6cab24c2b29fsewardj ARMcc_PL = 5, /* plus (zero or +ve) : N=0 */ 1020578287155cb60143bcf70fdf5e1c2beb0b92c07cerion 1036c299f3acab617581ea504e45fbb6cab24c2b29fsewardj ARMcc_VS = 6, /* overflow : V=1 */ 1046c299f3acab617581ea504e45fbb6cab24c2b29fsewardj ARMcc_VC = 7, /* no overflow : V=0 */ 1050578287155cb60143bcf70fdf5e1c2beb0b92c07cerion 1066c299f3acab617581ea504e45fbb6cab24c2b29fsewardj ARMcc_HI = 8, /* >u (higher) : C=1 && Z=0 */ 1076c299f3acab617581ea504e45fbb6cab24c2b29fsewardj ARMcc_LS = 9, /* <=u (lower or same) : C=0 || Z=1 */ 1080578287155cb60143bcf70fdf5e1c2beb0b92c07cerion 1096c299f3acab617581ea504e45fbb6cab24c2b29fsewardj ARMcc_GE = 10, /* >=s (signed greater or equal) : N=V */ 1106c299f3acab617581ea504e45fbb6cab24c2b29fsewardj ARMcc_LT = 11, /* <s (signed less than) : N!=V */ 1110578287155cb60143bcf70fdf5e1c2beb0b92c07cerion 1126c299f3acab617581ea504e45fbb6cab24c2b29fsewardj ARMcc_GT = 12, /* >s (signed greater) : Z=0 && N=V */ 1136c299f3acab617581ea504e45fbb6cab24c2b29fsewardj ARMcc_LE = 13, /* <=s (signed less or equal) : Z=1 || N!=V */ 1140578287155cb60143bcf70fdf5e1c2beb0b92c07cerion 1156c299f3acab617581ea504e45fbb6cab24c2b29fsewardj ARMcc_AL = 14, /* always (unconditional) */ 1166c299f3acab617581ea504e45fbb6cab24c2b29fsewardj ARMcc_NV = 15 /* never (basically undefined meaning), deprecated */ 1170578287155cb60143bcf70fdf5e1c2beb0b92c07cerion } 1180578287155cb60143bcf70fdf5e1c2beb0b92c07cerion ARMCondCode; 1190578287155cb60143bcf70fdf5e1c2beb0b92c07cerion 12055085f8680acc89d727e321f3b34cae1a8c4093aflorianextern const HChar* showARMCondCode ( ARMCondCode ); 1210578287155cb60143bcf70fdf5e1c2beb0b92c07cerion 1220578287155cb60143bcf70fdf5e1c2beb0b92c07cerion 1230578287155cb60143bcf70fdf5e1c2beb0b92c07cerion 1240578287155cb60143bcf70fdf5e1c2beb0b92c07cerion/* --------- Memory address expressions (amodes). --------- */ 1250578287155cb60143bcf70fdf5e1c2beb0b92c07cerion 1260578287155cb60143bcf70fdf5e1c2beb0b92c07cerion/* --- Addressing Mode 1 --- */ 1270578287155cb60143bcf70fdf5e1c2beb0b92c07ceriontypedef 1280578287155cb60143bcf70fdf5e1c2beb0b92c07cerion enum { 1296c299f3acab617581ea504e45fbb6cab24c2b29fsewardj ARMam1_RI=1, /* reg +/- imm12 */ 1306c299f3acab617581ea504e45fbb6cab24c2b29fsewardj ARMam1_RRS /* reg1 + (reg2 << 0, 1 2 or 3) */ 1310578287155cb60143bcf70fdf5e1c2beb0b92c07cerion } 1320578287155cb60143bcf70fdf5e1c2beb0b92c07cerion ARMAMode1Tag; 1330578287155cb60143bcf70fdf5e1c2beb0b92c07cerion 1340578287155cb60143bcf70fdf5e1c2beb0b92c07ceriontypedef 1350578287155cb60143bcf70fdf5e1c2beb0b92c07cerion struct { 1366c299f3acab617581ea504e45fbb6cab24c2b29fsewardj ARMAMode1Tag tag; 1376c299f3acab617581ea504e45fbb6cab24c2b29fsewardj union { 1386c299f3acab617581ea504e45fbb6cab24c2b29fsewardj struct { 1396c299f3acab617581ea504e45fbb6cab24c2b29fsewardj HReg reg; 1406c299f3acab617581ea504e45fbb6cab24c2b29fsewardj Int simm13; /* -4095 .. +4095 */ 1416c299f3acab617581ea504e45fbb6cab24c2b29fsewardj } RI; 1426c299f3acab617581ea504e45fbb6cab24c2b29fsewardj struct { 1436c299f3acab617581ea504e45fbb6cab24c2b29fsewardj HReg base; 1446c299f3acab617581ea504e45fbb6cab24c2b29fsewardj HReg index; 1456c299f3acab617581ea504e45fbb6cab24c2b29fsewardj UInt shift; /* 0, 1 2 or 3 */ 1466c299f3acab617581ea504e45fbb6cab24c2b29fsewardj } RRS; 1476c299f3acab617581ea504e45fbb6cab24c2b29fsewardj } ARMam1; 1480578287155cb60143bcf70fdf5e1c2beb0b92c07cerion } 1490578287155cb60143bcf70fdf5e1c2beb0b92c07cerion ARMAMode1; 1500578287155cb60143bcf70fdf5e1c2beb0b92c07cerion 1516c299f3acab617581ea504e45fbb6cab24c2b29fsewardjextern ARMAMode1* ARMAMode1_RI ( HReg reg, Int simm13 ); 1526c299f3acab617581ea504e45fbb6cab24c2b29fsewardjextern ARMAMode1* ARMAMode1_RRS ( HReg base, HReg index, UInt shift ); 1530578287155cb60143bcf70fdf5e1c2beb0b92c07cerion 1540578287155cb60143bcf70fdf5e1c2beb0b92c07cerionextern void ppARMAMode1 ( ARMAMode1* ); 1550578287155cb60143bcf70fdf5e1c2beb0b92c07cerion 1560578287155cb60143bcf70fdf5e1c2beb0b92c07cerion 1570578287155cb60143bcf70fdf5e1c2beb0b92c07cerion/* --- Addressing Mode 2 --- */ 1580578287155cb60143bcf70fdf5e1c2beb0b92c07ceriontypedef 1590578287155cb60143bcf70fdf5e1c2beb0b92c07cerion enum { 1606c299f3acab617581ea504e45fbb6cab24c2b29fsewardj ARMam2_RI=3, /* reg +/- imm8 */ 1616c299f3acab617581ea504e45fbb6cab24c2b29fsewardj ARMam2_RR /* reg1 + reg2 */ 1620578287155cb60143bcf70fdf5e1c2beb0b92c07cerion } 1630578287155cb60143bcf70fdf5e1c2beb0b92c07cerion ARMAMode2Tag; 1640578287155cb60143bcf70fdf5e1c2beb0b92c07cerion 1650578287155cb60143bcf70fdf5e1c2beb0b92c07ceriontypedef 1660578287155cb60143bcf70fdf5e1c2beb0b92c07cerion struct { 1670578287155cb60143bcf70fdf5e1c2beb0b92c07cerion ARMAMode2Tag tag; 1680578287155cb60143bcf70fdf5e1c2beb0b92c07cerion union { 1690578287155cb60143bcf70fdf5e1c2beb0b92c07cerion struct { 1706c299f3acab617581ea504e45fbb6cab24c2b29fsewardj HReg reg; 1716c299f3acab617581ea504e45fbb6cab24c2b29fsewardj Int simm9; /* -255 .. 255 */ 1720578287155cb60143bcf70fdf5e1c2beb0b92c07cerion } RI; 1730578287155cb60143bcf70fdf5e1c2beb0b92c07cerion struct { 1746c299f3acab617581ea504e45fbb6cab24c2b29fsewardj HReg base; 1756c299f3acab617581ea504e45fbb6cab24c2b29fsewardj HReg index; 1766c299f3acab617581ea504e45fbb6cab24c2b29fsewardj } RR; 17782edbb3e13d1758cabcbfd36fab8f955cf980153cerion } ARMam2; 1780578287155cb60143bcf70fdf5e1c2beb0b92c07cerion } 1790578287155cb60143bcf70fdf5e1c2beb0b92c07cerion ARMAMode2; 1800578287155cb60143bcf70fdf5e1c2beb0b92c07cerion 1816c299f3acab617581ea504e45fbb6cab24c2b29fsewardjextern ARMAMode2* ARMAMode2_RI ( HReg reg, Int simm9 ); 1826c299f3acab617581ea504e45fbb6cab24c2b29fsewardjextern ARMAMode2* ARMAMode2_RR ( HReg base, HReg index ); 1830578287155cb60143bcf70fdf5e1c2beb0b92c07cerion 1840578287155cb60143bcf70fdf5e1c2beb0b92c07cerionextern void ppARMAMode2 ( ARMAMode2* ); 1850578287155cb60143bcf70fdf5e1c2beb0b92c07cerion 1860578287155cb60143bcf70fdf5e1c2beb0b92c07cerion 1876c299f3acab617581ea504e45fbb6cab24c2b29fsewardj/* --- Addressing Mode suitable for VFP --- */ 1886c299f3acab617581ea504e45fbb6cab24c2b29fsewardj/* The simm11 is encoded as 8 bits + 1 sign bit, 1896c299f3acab617581ea504e45fbb6cab24c2b29fsewardj so can only be 0 % 4. */ 1906c299f3acab617581ea504e45fbb6cab24c2b29fsewardjtypedef 1916c299f3acab617581ea504e45fbb6cab24c2b29fsewardj struct { 1926c299f3acab617581ea504e45fbb6cab24c2b29fsewardj HReg reg; 1936c299f3acab617581ea504e45fbb6cab24c2b29fsewardj Int simm11; /* -1020, -1016 .. 1016, 1020 */ 1946c299f3acab617581ea504e45fbb6cab24c2b29fsewardj } 1956c299f3acab617581ea504e45fbb6cab24c2b29fsewardj ARMAModeV; 1966c299f3acab617581ea504e45fbb6cab24c2b29fsewardj 1976c299f3acab617581ea504e45fbb6cab24c2b29fsewardjextern ARMAModeV* mkARMAModeV ( HReg reg, Int simm11 ); 1986c299f3acab617581ea504e45fbb6cab24c2b29fsewardj 1996c299f3acab617581ea504e45fbb6cab24c2b29fsewardjextern void ppARMAModeV ( ARMAModeV* ); 2006c299f3acab617581ea504e45fbb6cab24c2b29fsewardj 2016c60b32ab93e77a2709549dbc6eaa649eb915204sewardj/* --- Addressing Mode suitable for Neon --- */ 2026c60b32ab93e77a2709549dbc6eaa649eb915204sewardjtypedef 2036c60b32ab93e77a2709549dbc6eaa649eb915204sewardj enum { 204b48eddb441c460f9bf10210416925b16fdaf85c4sewardj ARMamN_R=5, 2056c60b32ab93e77a2709549dbc6eaa649eb915204sewardj ARMamN_RR 2066c60b32ab93e77a2709549dbc6eaa649eb915204sewardj /* ... */ 2076c60b32ab93e77a2709549dbc6eaa649eb915204sewardj } 2086c60b32ab93e77a2709549dbc6eaa649eb915204sewardj ARMAModeNTag; 2096c60b32ab93e77a2709549dbc6eaa649eb915204sewardj 2106c60b32ab93e77a2709549dbc6eaa649eb915204sewardjtypedef 2116c60b32ab93e77a2709549dbc6eaa649eb915204sewardj struct { 2126c60b32ab93e77a2709549dbc6eaa649eb915204sewardj ARMAModeNTag tag; 2136c60b32ab93e77a2709549dbc6eaa649eb915204sewardj union { 2146c60b32ab93e77a2709549dbc6eaa649eb915204sewardj struct { 2156c60b32ab93e77a2709549dbc6eaa649eb915204sewardj HReg rN; 2166c60b32ab93e77a2709549dbc6eaa649eb915204sewardj HReg rM; 2176c60b32ab93e77a2709549dbc6eaa649eb915204sewardj } RR; 2186c60b32ab93e77a2709549dbc6eaa649eb915204sewardj struct { 2196c60b32ab93e77a2709549dbc6eaa649eb915204sewardj HReg rN; 2206c60b32ab93e77a2709549dbc6eaa649eb915204sewardj } R; 2216c60b32ab93e77a2709549dbc6eaa649eb915204sewardj /* ... */ 2226c60b32ab93e77a2709549dbc6eaa649eb915204sewardj } ARMamN; 2236c60b32ab93e77a2709549dbc6eaa649eb915204sewardj } 2246c60b32ab93e77a2709549dbc6eaa649eb915204sewardj ARMAModeN; 2256c60b32ab93e77a2709549dbc6eaa649eb915204sewardj 2266c60b32ab93e77a2709549dbc6eaa649eb915204sewardjextern ARMAModeN* mkARMAModeN_RR ( HReg, HReg ); 2276c60b32ab93e77a2709549dbc6eaa649eb915204sewardjextern ARMAModeN* mkARMAModeN_R ( HReg ); 2286c60b32ab93e77a2709549dbc6eaa649eb915204sewardjextern void ppARMAModeN ( ARMAModeN* ); 2296c299f3acab617581ea504e45fbb6cab24c2b29fsewardj 2306c299f3acab617581ea504e45fbb6cab24c2b29fsewardj/* --------- Reg or imm-8x4 operands --------- */ 2316c299f3acab617581ea504e45fbb6cab24c2b29fsewardj/* a.k.a (a very restricted form of) Shifter Operand, 2326c299f3acab617581ea504e45fbb6cab24c2b29fsewardj in the ARM parlance. */ 2336c299f3acab617581ea504e45fbb6cab24c2b29fsewardj 2340578287155cb60143bcf70fdf5e1c2beb0b92c07ceriontypedef 2350578287155cb60143bcf70fdf5e1c2beb0b92c07cerion enum { 236b48eddb441c460f9bf10210416925b16fdaf85c4sewardj ARMri84_I84=7, /* imm8 `ror` (2 * imm4) */ 2376c299f3acab617581ea504e45fbb6cab24c2b29fsewardj ARMri84_R /* reg */ 2380578287155cb60143bcf70fdf5e1c2beb0b92c07cerion } 2396c299f3acab617581ea504e45fbb6cab24c2b29fsewardj ARMRI84Tag; 2400578287155cb60143bcf70fdf5e1c2beb0b92c07cerion 2410578287155cb60143bcf70fdf5e1c2beb0b92c07ceriontypedef 2420578287155cb60143bcf70fdf5e1c2beb0b92c07cerion struct { 2436c299f3acab617581ea504e45fbb6cab24c2b29fsewardj ARMRI84Tag tag; 2440578287155cb60143bcf70fdf5e1c2beb0b92c07cerion union { 2450578287155cb60143bcf70fdf5e1c2beb0b92c07cerion struct { 2466c299f3acab617581ea504e45fbb6cab24c2b29fsewardj UShort imm8; 2476c299f3acab617581ea504e45fbb6cab24c2b29fsewardj UShort imm4; 2486c299f3acab617581ea504e45fbb6cab24c2b29fsewardj } I84; 2490578287155cb60143bcf70fdf5e1c2beb0b92c07cerion struct { 2506c299f3acab617581ea504e45fbb6cab24c2b29fsewardj HReg reg; 2516c299f3acab617581ea504e45fbb6cab24c2b29fsewardj } R; 2526c299f3acab617581ea504e45fbb6cab24c2b29fsewardj } ARMri84; 2530578287155cb60143bcf70fdf5e1c2beb0b92c07cerion } 2546c299f3acab617581ea504e45fbb6cab24c2b29fsewardj ARMRI84; 2550578287155cb60143bcf70fdf5e1c2beb0b92c07cerion 2566c299f3acab617581ea504e45fbb6cab24c2b29fsewardjextern ARMRI84* ARMRI84_I84 ( UShort imm8, UShort imm4 ); 2576c299f3acab617581ea504e45fbb6cab24c2b29fsewardjextern ARMRI84* ARMRI84_R ( HReg ); 2580578287155cb60143bcf70fdf5e1c2beb0b92c07cerion 2596c299f3acab617581ea504e45fbb6cab24c2b29fsewardjextern void ppARMRI84 ( ARMRI84* ); 2606c299f3acab617581ea504e45fbb6cab24c2b29fsewardj 2616c299f3acab617581ea504e45fbb6cab24c2b29fsewardj 2626c299f3acab617581ea504e45fbb6cab24c2b29fsewardj/* --------- Reg or imm5 operands --------- */ 2636c299f3acab617581ea504e45fbb6cab24c2b29fsewardjtypedef 2646c299f3acab617581ea504e45fbb6cab24c2b29fsewardj enum { 265b48eddb441c460f9bf10210416925b16fdaf85c4sewardj ARMri5_I5=9, /* imm5, 1 .. 31 only (no zero!) */ 2666c299f3acab617581ea504e45fbb6cab24c2b29fsewardj ARMri5_R /* reg */ 2676c299f3acab617581ea504e45fbb6cab24c2b29fsewardj } 2686c299f3acab617581ea504e45fbb6cab24c2b29fsewardj ARMRI5Tag; 2690578287155cb60143bcf70fdf5e1c2beb0b92c07cerion 2706c299f3acab617581ea504e45fbb6cab24c2b29fsewardjtypedef 2716c299f3acab617581ea504e45fbb6cab24c2b29fsewardj struct { 2726c299f3acab617581ea504e45fbb6cab24c2b29fsewardj ARMRI5Tag tag; 2736c299f3acab617581ea504e45fbb6cab24c2b29fsewardj union { 2746c299f3acab617581ea504e45fbb6cab24c2b29fsewardj struct { 2756c299f3acab617581ea504e45fbb6cab24c2b29fsewardj UInt imm5; 2766c299f3acab617581ea504e45fbb6cab24c2b29fsewardj } I5; 2776c299f3acab617581ea504e45fbb6cab24c2b29fsewardj struct { 2786c299f3acab617581ea504e45fbb6cab24c2b29fsewardj HReg reg; 2796c299f3acab617581ea504e45fbb6cab24c2b29fsewardj } R; 2806c299f3acab617581ea504e45fbb6cab24c2b29fsewardj } ARMri5; 2816c299f3acab617581ea504e45fbb6cab24c2b29fsewardj } 2826c299f3acab617581ea504e45fbb6cab24c2b29fsewardj ARMRI5; 2830578287155cb60143bcf70fdf5e1c2beb0b92c07cerion 2846c299f3acab617581ea504e45fbb6cab24c2b29fsewardjextern ARMRI5* ARMRI5_I5 ( UInt imm5 ); 2856c299f3acab617581ea504e45fbb6cab24c2b29fsewardjextern ARMRI5* ARMRI5_R ( HReg ); 2860578287155cb60143bcf70fdf5e1c2beb0b92c07cerion 2876c299f3acab617581ea504e45fbb6cab24c2b29fsewardjextern void ppARMRI5 ( ARMRI5* ); 2880578287155cb60143bcf70fdf5e1c2beb0b92c07cerion 2896c60b32ab93e77a2709549dbc6eaa649eb915204sewardj/* -------- Neon Immediate operand -------- */ 2906c60b32ab93e77a2709549dbc6eaa649eb915204sewardj 2916c60b32ab93e77a2709549dbc6eaa649eb915204sewardj/* imm8 = abcdefgh, B = NOT(b); 2926c60b32ab93e77a2709549dbc6eaa649eb915204sewardj 2936c60b32ab93e77a2709549dbc6eaa649eb915204sewardjtype | value (64bit binary) 2946c60b32ab93e77a2709549dbc6eaa649eb915204sewardj-----+------------------------------------------------------------------------- 2956c60b32ab93e77a2709549dbc6eaa649eb915204sewardj 0 | 00000000 00000000 00000000 abcdefgh 00000000 00000000 00000000 abcdefgh 2966c60b32ab93e77a2709549dbc6eaa649eb915204sewardj 1 | 00000000 00000000 abcdefgh 00000000 00000000 00000000 abcdefgh 00000000 2976c60b32ab93e77a2709549dbc6eaa649eb915204sewardj 2 | 00000000 abcdefgh 00000000 00000000 00000000 abcdefgh 00000000 00000000 2986c60b32ab93e77a2709549dbc6eaa649eb915204sewardj 3 | abcdefgh 00000000 00000000 00000000 abcdefgh 00000000 00000000 00000000 2996c60b32ab93e77a2709549dbc6eaa649eb915204sewardj 4 | 00000000 abcdefgh 00000000 abcdefgh 00000000 abcdefgh 00000000 abcdefgh 3006c60b32ab93e77a2709549dbc6eaa649eb915204sewardj 5 | abcdefgh 00000000 abcdefgh 00000000 abcdefgh 00000000 abcdefgh 00000000 3016c60b32ab93e77a2709549dbc6eaa649eb915204sewardj 6 | abcdefgh abcdefgh abcdefgh abcdefgh abcdefgh abcdefgh abcdefgh abcdefgh 3026c60b32ab93e77a2709549dbc6eaa649eb915204sewardj 7 | 00000000 00000000 abcdefgh 11111111 00000000 00000000 abcdefgh 11111111 3036c60b32ab93e77a2709549dbc6eaa649eb915204sewardj 8 | 00000000 abcdefgh 11111111 11111111 00000000 abcdefgh 11111111 11111111 3046c60b32ab93e77a2709549dbc6eaa649eb915204sewardj 9 | aaaaaaaa bbbbbbbb cccccccc dddddddd eeeeeeee ffffffff gggggggg hhhhhhhh 3056c60b32ab93e77a2709549dbc6eaa649eb915204sewardj 10 | aBbbbbbc defgh000 00000000 00000000 aBbbbbbc defgh000 00000000 00000000 3066c60b32ab93e77a2709549dbc6eaa649eb915204sewardj-----+------------------------------------------------------------------------- 3076c60b32ab93e77a2709549dbc6eaa649eb915204sewardj 3086c60b32ab93e77a2709549dbc6eaa649eb915204sewardjType 10 is: 3096c60b32ab93e77a2709549dbc6eaa649eb915204sewardj (-1)^S * 2^exp * mantissa 3106c60b32ab93e77a2709549dbc6eaa649eb915204sewardjwhere S = a, exp = UInt(B:c:d) - 3, mantissa = (16 + UInt(e:f:g:h)) / 16 3116c60b32ab93e77a2709549dbc6eaa649eb915204sewardj*/ 3126c60b32ab93e77a2709549dbc6eaa649eb915204sewardj 3136c60b32ab93e77a2709549dbc6eaa649eb915204sewardjtypedef 3146c60b32ab93e77a2709549dbc6eaa649eb915204sewardj struct { 3156c60b32ab93e77a2709549dbc6eaa649eb915204sewardj UInt type; 3166c60b32ab93e77a2709549dbc6eaa649eb915204sewardj UInt imm8; 3176c60b32ab93e77a2709549dbc6eaa649eb915204sewardj } 3186c60b32ab93e77a2709549dbc6eaa649eb915204sewardj ARMNImm; 3196c60b32ab93e77a2709549dbc6eaa649eb915204sewardj 3206c60b32ab93e77a2709549dbc6eaa649eb915204sewardjextern ARMNImm* ARMNImm_TI ( UInt type, UInt imm8 ); 3216c60b32ab93e77a2709549dbc6eaa649eb915204sewardjextern ULong ARMNImm_to_Imm64 ( ARMNImm* ); 3226c60b32ab93e77a2709549dbc6eaa649eb915204sewardjextern ARMNImm* Imm64_to_ARMNImm ( ULong ); 3236c60b32ab93e77a2709549dbc6eaa649eb915204sewardj 3246c60b32ab93e77a2709549dbc6eaa649eb915204sewardjextern void ppARMNImm ( ARMNImm* ); 3256c60b32ab93e77a2709549dbc6eaa649eb915204sewardj 3266c60b32ab93e77a2709549dbc6eaa649eb915204sewardj/* ------ Neon Register or Scalar Operand ------ */ 3276c60b32ab93e77a2709549dbc6eaa649eb915204sewardj 3286c60b32ab93e77a2709549dbc6eaa649eb915204sewardjtypedef 3296c60b32ab93e77a2709549dbc6eaa649eb915204sewardj enum { 330b48eddb441c460f9bf10210416925b16fdaf85c4sewardj ARMNRS_Reg=11, 3316c60b32ab93e77a2709549dbc6eaa649eb915204sewardj ARMNRS_Scalar 3326c60b32ab93e77a2709549dbc6eaa649eb915204sewardj } 3336c60b32ab93e77a2709549dbc6eaa649eb915204sewardj ARMNRS_tag; 3346c60b32ab93e77a2709549dbc6eaa649eb915204sewardj 3356c60b32ab93e77a2709549dbc6eaa649eb915204sewardjtypedef 3366c60b32ab93e77a2709549dbc6eaa649eb915204sewardj struct { 3376c60b32ab93e77a2709549dbc6eaa649eb915204sewardj ARMNRS_tag tag; 3386c60b32ab93e77a2709549dbc6eaa649eb915204sewardj HReg reg; 3396c60b32ab93e77a2709549dbc6eaa649eb915204sewardj UInt index; 3406c60b32ab93e77a2709549dbc6eaa649eb915204sewardj } 3416c60b32ab93e77a2709549dbc6eaa649eb915204sewardj ARMNRS; 3426c60b32ab93e77a2709549dbc6eaa649eb915204sewardj 3436c60b32ab93e77a2709549dbc6eaa649eb915204sewardjextern ARMNRS* mkARMNRS(ARMNRS_tag, HReg reg, UInt index); 3446c60b32ab93e77a2709549dbc6eaa649eb915204sewardjextern void ppARMNRS ( ARMNRS* ); 3450578287155cb60143bcf70fdf5e1c2beb0b92c07cerion 3466c299f3acab617581ea504e45fbb6cab24c2b29fsewardj/* --------- Instructions. --------- */ 3470578287155cb60143bcf70fdf5e1c2beb0b92c07cerion 3486c299f3acab617581ea504e45fbb6cab24c2b29fsewardj/* --------- */ 3490578287155cb60143bcf70fdf5e1c2beb0b92c07ceriontypedef 3500578287155cb60143bcf70fdf5e1c2beb0b92c07cerion enum { 351b48eddb441c460f9bf10210416925b16fdaf85c4sewardj ARMalu_ADD=20, /* plain 32-bit add */ 3526c299f3acab617581ea504e45fbb6cab24c2b29fsewardj ARMalu_ADDS, /* 32-bit add, and set the flags */ 3536c299f3acab617581ea504e45fbb6cab24c2b29fsewardj ARMalu_ADC, /* 32-bit add with carry */ 3546c299f3acab617581ea504e45fbb6cab24c2b29fsewardj ARMalu_SUB, /* plain 32-bit subtract */ 3556c299f3acab617581ea504e45fbb6cab24c2b29fsewardj ARMalu_SUBS, /* 32-bit subtract, and set the flags */ 3566c299f3acab617581ea504e45fbb6cab24c2b29fsewardj ARMalu_SBC, /* 32-bit subtract with carry */ 3576c299f3acab617581ea504e45fbb6cab24c2b29fsewardj ARMalu_AND, 3586c299f3acab617581ea504e45fbb6cab24c2b29fsewardj ARMalu_BIC, 3596c299f3acab617581ea504e45fbb6cab24c2b29fsewardj ARMalu_OR, 3606c299f3acab617581ea504e45fbb6cab24c2b29fsewardj ARMalu_XOR 3610578287155cb60143bcf70fdf5e1c2beb0b92c07cerion } 3626c299f3acab617581ea504e45fbb6cab24c2b29fsewardj ARMAluOp; 3636c299f3acab617581ea504e45fbb6cab24c2b29fsewardj 36455085f8680acc89d727e321f3b34cae1a8c4093aflorianextern const HChar* showARMAluOp ( ARMAluOp op ); 3656c299f3acab617581ea504e45fbb6cab24c2b29fsewardj 3660578287155cb60143bcf70fdf5e1c2beb0b92c07cerion 3670578287155cb60143bcf70fdf5e1c2beb0b92c07ceriontypedef 3686c299f3acab617581ea504e45fbb6cab24c2b29fsewardj enum { 369b48eddb441c460f9bf10210416925b16fdaf85c4sewardj ARMsh_SHL=40, 3706c299f3acab617581ea504e45fbb6cab24c2b29fsewardj ARMsh_SHR, 3716c299f3acab617581ea504e45fbb6cab24c2b29fsewardj ARMsh_SAR 3726c299f3acab617581ea504e45fbb6cab24c2b29fsewardj } 3736c299f3acab617581ea504e45fbb6cab24c2b29fsewardj ARMShiftOp; 3740578287155cb60143bcf70fdf5e1c2beb0b92c07cerion 37555085f8680acc89d727e321f3b34cae1a8c4093aflorianextern const HChar* showARMShiftOp ( ARMShiftOp op ); 37682edbb3e13d1758cabcbfd36fab8f955cf980153cerion 3770578287155cb60143bcf70fdf5e1c2beb0b92c07cerion 3786c299f3acab617581ea504e45fbb6cab24c2b29fsewardjtypedef 3796c299f3acab617581ea504e45fbb6cab24c2b29fsewardj enum { 380b48eddb441c460f9bf10210416925b16fdaf85c4sewardj ARMun_NEG=50, 3816c299f3acab617581ea504e45fbb6cab24c2b29fsewardj ARMun_NOT, 3826c299f3acab617581ea504e45fbb6cab24c2b29fsewardj ARMun_CLZ 3836c299f3acab617581ea504e45fbb6cab24c2b29fsewardj } 3846c299f3acab617581ea504e45fbb6cab24c2b29fsewardj ARMUnaryOp; 3850578287155cb60143bcf70fdf5e1c2beb0b92c07cerion 38655085f8680acc89d727e321f3b34cae1a8c4093aflorianextern const HChar* showARMUnaryOp ( ARMUnaryOp op ); 3870578287155cb60143bcf70fdf5e1c2beb0b92c07cerion 3880578287155cb60143bcf70fdf5e1c2beb0b92c07cerion 3890578287155cb60143bcf70fdf5e1c2beb0b92c07ceriontypedef 3900578287155cb60143bcf70fdf5e1c2beb0b92c07cerion enum { 391b48eddb441c460f9bf10210416925b16fdaf85c4sewardj ARMmul_PLAIN=60, 3926c299f3acab617581ea504e45fbb6cab24c2b29fsewardj ARMmul_ZX, 3936c299f3acab617581ea504e45fbb6cab24c2b29fsewardj ARMmul_SX 3940578287155cb60143bcf70fdf5e1c2beb0b92c07cerion } 3956c299f3acab617581ea504e45fbb6cab24c2b29fsewardj ARMMulOp; 3960578287155cb60143bcf70fdf5e1c2beb0b92c07cerion 39755085f8680acc89d727e321f3b34cae1a8c4093aflorianextern const HChar* showARMMulOp ( ARMMulOp op ); 3986c299f3acab617581ea504e45fbb6cab24c2b29fsewardj 3996c299f3acab617581ea504e45fbb6cab24c2b29fsewardj 4006c299f3acab617581ea504e45fbb6cab24c2b29fsewardjtypedef 4016c299f3acab617581ea504e45fbb6cab24c2b29fsewardj enum { 402b48eddb441c460f9bf10210416925b16fdaf85c4sewardj ARMvfp_ADD=70, 4036c299f3acab617581ea504e45fbb6cab24c2b29fsewardj ARMvfp_SUB, 4046c299f3acab617581ea504e45fbb6cab24c2b29fsewardj ARMvfp_MUL, 4056c299f3acab617581ea504e45fbb6cab24c2b29fsewardj ARMvfp_DIV 4066c299f3acab617581ea504e45fbb6cab24c2b29fsewardj } 4076c299f3acab617581ea504e45fbb6cab24c2b29fsewardj ARMVfpOp; 4080578287155cb60143bcf70fdf5e1c2beb0b92c07cerion 40955085f8680acc89d727e321f3b34cae1a8c4093aflorianextern const HChar* showARMVfpOp ( ARMVfpOp op ); 4106c299f3acab617581ea504e45fbb6cab24c2b29fsewardj 4116c299f3acab617581ea504e45fbb6cab24c2b29fsewardj 4126c299f3acab617581ea504e45fbb6cab24c2b29fsewardjtypedef 4136c299f3acab617581ea504e45fbb6cab24c2b29fsewardj enum { 414b48eddb441c460f9bf10210416925b16fdaf85c4sewardj ARMvfpu_COPY=80, 4156c299f3acab617581ea504e45fbb6cab24c2b29fsewardj ARMvfpu_NEG, 4166c299f3acab617581ea504e45fbb6cab24c2b29fsewardj ARMvfpu_ABS, 4176c299f3acab617581ea504e45fbb6cab24c2b29fsewardj ARMvfpu_SQRT 4186c299f3acab617581ea504e45fbb6cab24c2b29fsewardj } 4196c299f3acab617581ea504e45fbb6cab24c2b29fsewardj ARMVfpUnaryOp; 4206c299f3acab617581ea504e45fbb6cab24c2b29fsewardj 42155085f8680acc89d727e321f3b34cae1a8c4093aflorianextern const HChar* showARMVfpUnaryOp ( ARMVfpUnaryOp op ); 4220578287155cb60143bcf70fdf5e1c2beb0b92c07cerion 4236c60b32ab93e77a2709549dbc6eaa649eb915204sewardjtypedef 4246c60b32ab93e77a2709549dbc6eaa649eb915204sewardj enum { 425b48eddb441c460f9bf10210416925b16fdaf85c4sewardj ARMneon_VAND=90, 4266c60b32ab93e77a2709549dbc6eaa649eb915204sewardj ARMneon_VORR, 4276c60b32ab93e77a2709549dbc6eaa649eb915204sewardj ARMneon_VXOR, 4286c60b32ab93e77a2709549dbc6eaa649eb915204sewardj ARMneon_VADD, 4296c60b32ab93e77a2709549dbc6eaa649eb915204sewardj ARMneon_VADDFP, 4306c60b32ab93e77a2709549dbc6eaa649eb915204sewardj ARMneon_VRHADDS, 4316c60b32ab93e77a2709549dbc6eaa649eb915204sewardj ARMneon_VRHADDU, 4326c60b32ab93e77a2709549dbc6eaa649eb915204sewardj ARMneon_VPADDFP, 4336c60b32ab93e77a2709549dbc6eaa649eb915204sewardj ARMneon_VABDFP, 4346c60b32ab93e77a2709549dbc6eaa649eb915204sewardj ARMneon_VSUB, 4356c60b32ab93e77a2709549dbc6eaa649eb915204sewardj ARMneon_VSUBFP, 4366c60b32ab93e77a2709549dbc6eaa649eb915204sewardj ARMneon_VMAXU, 4376c60b32ab93e77a2709549dbc6eaa649eb915204sewardj ARMneon_VMAXS, 4386c60b32ab93e77a2709549dbc6eaa649eb915204sewardj ARMneon_VMAXF, 4396c60b32ab93e77a2709549dbc6eaa649eb915204sewardj ARMneon_VMINU, 4406c60b32ab93e77a2709549dbc6eaa649eb915204sewardj ARMneon_VMINS, 4416c60b32ab93e77a2709549dbc6eaa649eb915204sewardj ARMneon_VMINF, 4426c60b32ab93e77a2709549dbc6eaa649eb915204sewardj ARMneon_VQADDU, 4436c60b32ab93e77a2709549dbc6eaa649eb915204sewardj ARMneon_VQADDS, 4446c60b32ab93e77a2709549dbc6eaa649eb915204sewardj ARMneon_VQSUBU, 4456c60b32ab93e77a2709549dbc6eaa649eb915204sewardj ARMneon_VQSUBS, 4466c60b32ab93e77a2709549dbc6eaa649eb915204sewardj ARMneon_VCGTU, 4476c60b32ab93e77a2709549dbc6eaa649eb915204sewardj ARMneon_VCGTS, 4486c60b32ab93e77a2709549dbc6eaa649eb915204sewardj ARMneon_VCGEU, 4496c60b32ab93e77a2709549dbc6eaa649eb915204sewardj ARMneon_VCGES, 4506c60b32ab93e77a2709549dbc6eaa649eb915204sewardj ARMneon_VCGTF, 4516c60b32ab93e77a2709549dbc6eaa649eb915204sewardj ARMneon_VCGEF, 4526c60b32ab93e77a2709549dbc6eaa649eb915204sewardj ARMneon_VCEQ, 4536c60b32ab93e77a2709549dbc6eaa649eb915204sewardj ARMneon_VCEQF, 4546c60b32ab93e77a2709549dbc6eaa649eb915204sewardj ARMneon_VEXT, 4556c60b32ab93e77a2709549dbc6eaa649eb915204sewardj ARMneon_VMUL, 4566c60b32ab93e77a2709549dbc6eaa649eb915204sewardj ARMneon_VMULFP, 4576c60b32ab93e77a2709549dbc6eaa649eb915204sewardj ARMneon_VMULLU, 4586c60b32ab93e77a2709549dbc6eaa649eb915204sewardj ARMneon_VMULLS, 4596c60b32ab93e77a2709549dbc6eaa649eb915204sewardj ARMneon_VMULP, 4606c60b32ab93e77a2709549dbc6eaa649eb915204sewardj ARMneon_VMULLP, 4616c60b32ab93e77a2709549dbc6eaa649eb915204sewardj ARMneon_VQDMULH, 4626c60b32ab93e77a2709549dbc6eaa649eb915204sewardj ARMneon_VQRDMULH, 4636c60b32ab93e77a2709549dbc6eaa649eb915204sewardj ARMneon_VPADD, 4646c60b32ab93e77a2709549dbc6eaa649eb915204sewardj ARMneon_VPMINU, 4656c60b32ab93e77a2709549dbc6eaa649eb915204sewardj ARMneon_VPMINS, 4666c60b32ab93e77a2709549dbc6eaa649eb915204sewardj ARMneon_VPMINF, 4676c60b32ab93e77a2709549dbc6eaa649eb915204sewardj ARMneon_VPMAXU, 4686c60b32ab93e77a2709549dbc6eaa649eb915204sewardj ARMneon_VPMAXS, 4696c60b32ab93e77a2709549dbc6eaa649eb915204sewardj ARMneon_VPMAXF, 4706c60b32ab93e77a2709549dbc6eaa649eb915204sewardj ARMneon_VTBL, 4716c60b32ab93e77a2709549dbc6eaa649eb915204sewardj ARMneon_VQDMULL, 4726c60b32ab93e77a2709549dbc6eaa649eb915204sewardj ARMneon_VRECPS, 4736c60b32ab93e77a2709549dbc6eaa649eb915204sewardj ARMneon_VRSQRTS, 474e84eeb4f96db568593145aecade598565c71693bsewardj ARMneon_INVALID 4756c60b32ab93e77a2709549dbc6eaa649eb915204sewardj /* ... */ 4766c60b32ab93e77a2709549dbc6eaa649eb915204sewardj } 4776c60b32ab93e77a2709549dbc6eaa649eb915204sewardj ARMNeonBinOp; 4786c60b32ab93e77a2709549dbc6eaa649eb915204sewardj 4796c60b32ab93e77a2709549dbc6eaa649eb915204sewardjtypedef 4806c60b32ab93e77a2709549dbc6eaa649eb915204sewardj enum { 481b48eddb441c460f9bf10210416925b16fdaf85c4sewardj ARMneon_VSHL=150, 4826c60b32ab93e77a2709549dbc6eaa649eb915204sewardj ARMneon_VSAL, /* Yah, not SAR but SAL */ 4836c60b32ab93e77a2709549dbc6eaa649eb915204sewardj ARMneon_VQSHL, 4846c60b32ab93e77a2709549dbc6eaa649eb915204sewardj ARMneon_VQSAL 4856c60b32ab93e77a2709549dbc6eaa649eb915204sewardj } 4866c60b32ab93e77a2709549dbc6eaa649eb915204sewardj ARMNeonShiftOp; 4876c60b32ab93e77a2709549dbc6eaa649eb915204sewardj 4886c60b32ab93e77a2709549dbc6eaa649eb915204sewardjtypedef 4896c60b32ab93e77a2709549dbc6eaa649eb915204sewardj enum { 490b48eddb441c460f9bf10210416925b16fdaf85c4sewardj ARMneon_COPY=160, 4916c60b32ab93e77a2709549dbc6eaa649eb915204sewardj ARMneon_COPYLU, 4926c60b32ab93e77a2709549dbc6eaa649eb915204sewardj ARMneon_COPYLS, 4936c60b32ab93e77a2709549dbc6eaa649eb915204sewardj ARMneon_COPYN, 4946c60b32ab93e77a2709549dbc6eaa649eb915204sewardj ARMneon_COPYQNSS, 4956c60b32ab93e77a2709549dbc6eaa649eb915204sewardj ARMneon_COPYQNUS, 4966c60b32ab93e77a2709549dbc6eaa649eb915204sewardj ARMneon_COPYQNUU, 4976c60b32ab93e77a2709549dbc6eaa649eb915204sewardj ARMneon_NOT, 4986c60b32ab93e77a2709549dbc6eaa649eb915204sewardj ARMneon_EQZ, 4996c60b32ab93e77a2709549dbc6eaa649eb915204sewardj ARMneon_DUP, 5006c60b32ab93e77a2709549dbc6eaa649eb915204sewardj ARMneon_PADDLS, 5016c60b32ab93e77a2709549dbc6eaa649eb915204sewardj ARMneon_PADDLU, 5026c60b32ab93e77a2709549dbc6eaa649eb915204sewardj ARMneon_CNT, 5036c60b32ab93e77a2709549dbc6eaa649eb915204sewardj ARMneon_CLZ, 5046c60b32ab93e77a2709549dbc6eaa649eb915204sewardj ARMneon_CLS, 5056c60b32ab93e77a2709549dbc6eaa649eb915204sewardj ARMneon_VCVTxFPxINT, 5066c60b32ab93e77a2709549dbc6eaa649eb915204sewardj ARMneon_VQSHLNSS, 5076c60b32ab93e77a2709549dbc6eaa649eb915204sewardj ARMneon_VQSHLNUU, 5086c60b32ab93e77a2709549dbc6eaa649eb915204sewardj ARMneon_VQSHLNUS, 5096c60b32ab93e77a2709549dbc6eaa649eb915204sewardj ARMneon_VCVTFtoU, 5106c60b32ab93e77a2709549dbc6eaa649eb915204sewardj ARMneon_VCVTFtoS, 5116c60b32ab93e77a2709549dbc6eaa649eb915204sewardj ARMneon_VCVTUtoF, 5126c60b32ab93e77a2709549dbc6eaa649eb915204sewardj ARMneon_VCVTStoF, 5136c60b32ab93e77a2709549dbc6eaa649eb915204sewardj ARMneon_VCVTFtoFixedU, 5146c60b32ab93e77a2709549dbc6eaa649eb915204sewardj ARMneon_VCVTFtoFixedS, 5156c60b32ab93e77a2709549dbc6eaa649eb915204sewardj ARMneon_VCVTFixedUtoF, 5166c60b32ab93e77a2709549dbc6eaa649eb915204sewardj ARMneon_VCVTFixedStoF, 5176c60b32ab93e77a2709549dbc6eaa649eb915204sewardj ARMneon_VCVTF16toF32, 5186c60b32ab93e77a2709549dbc6eaa649eb915204sewardj ARMneon_VCVTF32toF16, 5196c60b32ab93e77a2709549dbc6eaa649eb915204sewardj ARMneon_REV16, 5206c60b32ab93e77a2709549dbc6eaa649eb915204sewardj ARMneon_REV32, 5216c60b32ab93e77a2709549dbc6eaa649eb915204sewardj ARMneon_REV64, 5226c60b32ab93e77a2709549dbc6eaa649eb915204sewardj ARMneon_ABS, 5236c60b32ab93e77a2709549dbc6eaa649eb915204sewardj ARMneon_VNEGF, 5246aa87a6864b2f3c9d766784dd13a2d321a8b08bdsewardj ARMneon_VRECIP, 5256aa87a6864b2f3c9d766784dd13a2d321a8b08bdsewardj ARMneon_VRECIPF, 5266aa87a6864b2f3c9d766784dd13a2d321a8b08bdsewardj ARMneon_VABSFP, 5276aa87a6864b2f3c9d766784dd13a2d321a8b08bdsewardj ARMneon_VRSQRTEFP, 5286aa87a6864b2f3c9d766784dd13a2d321a8b08bdsewardj ARMneon_VRSQRTE 5296c60b32ab93e77a2709549dbc6eaa649eb915204sewardj /* ... */ 5306c60b32ab93e77a2709549dbc6eaa649eb915204sewardj } 5316c60b32ab93e77a2709549dbc6eaa649eb915204sewardj ARMNeonUnOp; 5326c60b32ab93e77a2709549dbc6eaa649eb915204sewardj 5336c60b32ab93e77a2709549dbc6eaa649eb915204sewardjtypedef 5346c60b32ab93e77a2709549dbc6eaa649eb915204sewardj enum { 535b48eddb441c460f9bf10210416925b16fdaf85c4sewardj ARMneon_SETELEM=200, 5366c60b32ab93e77a2709549dbc6eaa649eb915204sewardj ARMneon_GETELEMU, 5376aa87a6864b2f3c9d766784dd13a2d321a8b08bdsewardj ARMneon_GETELEMS, 5386aa87a6864b2f3c9d766784dd13a2d321a8b08bdsewardj ARMneon_VDUP, 5396c60b32ab93e77a2709549dbc6eaa649eb915204sewardj } 5406c60b32ab93e77a2709549dbc6eaa649eb915204sewardj ARMNeonUnOpS; 5416c60b32ab93e77a2709549dbc6eaa649eb915204sewardj 5426c60b32ab93e77a2709549dbc6eaa649eb915204sewardjtypedef 5436c60b32ab93e77a2709549dbc6eaa649eb915204sewardj enum { 544b48eddb441c460f9bf10210416925b16fdaf85c4sewardj ARMneon_TRN=210, 5456c60b32ab93e77a2709549dbc6eaa649eb915204sewardj ARMneon_ZIP, 5466c60b32ab93e77a2709549dbc6eaa649eb915204sewardj ARMneon_UZP 5476c60b32ab93e77a2709549dbc6eaa649eb915204sewardj /* ... */ 5486c60b32ab93e77a2709549dbc6eaa649eb915204sewardj } 5496c60b32ab93e77a2709549dbc6eaa649eb915204sewardj ARMNeonDualOp; 5506c60b32ab93e77a2709549dbc6eaa649eb915204sewardj 55155085f8680acc89d727e321f3b34cae1a8c4093aflorianextern const HChar* showARMNeonBinOp ( ARMNeonBinOp op ); 55255085f8680acc89d727e321f3b34cae1a8c4093aflorianextern const HChar* showARMNeonUnOp ( ARMNeonUnOp op ); 55355085f8680acc89d727e321f3b34cae1a8c4093aflorianextern const HChar* showARMNeonUnOpS ( ARMNeonUnOpS op ); 55455085f8680acc89d727e321f3b34cae1a8c4093aflorianextern const HChar* showARMNeonShiftOp ( ARMNeonShiftOp op ); 55555085f8680acc89d727e321f3b34cae1a8c4093aflorianextern const HChar* showARMNeonDualOp ( ARMNeonDualOp op ); 55655085f8680acc89d727e321f3b34cae1a8c4093aflorianextern const HChar* showARMNeonBinOpDataType ( ARMNeonBinOp op ); 55755085f8680acc89d727e321f3b34cae1a8c4093aflorianextern const HChar* showARMNeonUnOpDataType ( ARMNeonUnOp op ); 55855085f8680acc89d727e321f3b34cae1a8c4093aflorianextern const HChar* showARMNeonUnOpSDataType ( ARMNeonUnOpS op ); 55955085f8680acc89d727e321f3b34cae1a8c4093aflorianextern const HChar* showARMNeonShiftOpDataType ( ARMNeonShiftOp op ); 56055085f8680acc89d727e321f3b34cae1a8c4093aflorianextern const HChar* showARMNeonDualOpDataType ( ARMNeonDualOp op ); 5610578287155cb60143bcf70fdf5e1c2beb0b92c07cerion 5620578287155cb60143bcf70fdf5e1c2beb0b92c07ceriontypedef 5630578287155cb60143bcf70fdf5e1c2beb0b92c07cerion enum { 5646c299f3acab617581ea504e45fbb6cab24c2b29fsewardj /* baseline */ 565b48eddb441c460f9bf10210416925b16fdaf85c4sewardj ARMin_Alu=220, 5666c299f3acab617581ea504e45fbb6cab24c2b29fsewardj ARMin_Shift, 5676c299f3acab617581ea504e45fbb6cab24c2b29fsewardj ARMin_Unary, 5686c299f3acab617581ea504e45fbb6cab24c2b29fsewardj ARMin_CmpOrTst, 5696c299f3acab617581ea504e45fbb6cab24c2b29fsewardj ARMin_Mov, 5706c299f3acab617581ea504e45fbb6cab24c2b29fsewardj ARMin_Imm32, 5716c299f3acab617581ea504e45fbb6cab24c2b29fsewardj ARMin_LdSt32, 5726c299f3acab617581ea504e45fbb6cab24c2b29fsewardj ARMin_LdSt16, 5736c299f3acab617581ea504e45fbb6cab24c2b29fsewardj ARMin_LdSt8U, 5746c299f3acab617581ea504e45fbb6cab24c2b29fsewardj ARMin_Ld8S, 575c6f970f1fadb640d69c78ac2669efab5c08f1e8dsewardj ARMin_XDirect, /* direct transfer to GA */ 576c6f970f1fadb640d69c78ac2669efab5c08f1e8dsewardj ARMin_XIndir, /* indirect transfer to GA */ 577c6f970f1fadb640d69c78ac2669efab5c08f1e8dsewardj ARMin_XAssisted, /* assisted transfer to GA */ 5786c299f3acab617581ea504e45fbb6cab24c2b29fsewardj ARMin_CMov, 5796c299f3acab617581ea504e45fbb6cab24c2b29fsewardj ARMin_Call, 5806c299f3acab617581ea504e45fbb6cab24c2b29fsewardj ARMin_Mul, 5816c299f3acab617581ea504e45fbb6cab24c2b29fsewardj ARMin_LdrEX, 5826c299f3acab617581ea504e45fbb6cab24c2b29fsewardj ARMin_StrEX, 5836c299f3acab617581ea504e45fbb6cab24c2b29fsewardj /* vfp */ 5846c299f3acab617581ea504e45fbb6cab24c2b29fsewardj ARMin_VLdStD, 5856c299f3acab617581ea504e45fbb6cab24c2b29fsewardj ARMin_VLdStS, 5866c299f3acab617581ea504e45fbb6cab24c2b29fsewardj ARMin_VAluD, 5876c299f3acab617581ea504e45fbb6cab24c2b29fsewardj ARMin_VAluS, 5886c299f3acab617581ea504e45fbb6cab24c2b29fsewardj ARMin_VUnaryD, 5896c299f3acab617581ea504e45fbb6cab24c2b29fsewardj ARMin_VUnaryS, 5906c299f3acab617581ea504e45fbb6cab24c2b29fsewardj ARMin_VCmpD, 5916c299f3acab617581ea504e45fbb6cab24c2b29fsewardj ARMin_VCMovD, 5926c299f3acab617581ea504e45fbb6cab24c2b29fsewardj ARMin_VCMovS, 5936c299f3acab617581ea504e45fbb6cab24c2b29fsewardj ARMin_VCvtSD, 5946c299f3acab617581ea504e45fbb6cab24c2b29fsewardj ARMin_VXferD, 5956c299f3acab617581ea504e45fbb6cab24c2b29fsewardj ARMin_VXferS, 5966c299f3acab617581ea504e45fbb6cab24c2b29fsewardj ARMin_VCvtID, 597412098cf3166995b33b34e20b96eae9845e74a50sewardj ARMin_FPSCR, 5986c60b32ab93e77a2709549dbc6eaa649eb915204sewardj ARMin_MFence, 5996d615ba78d168bb4319120fff5ce83d3f7433022sewardj ARMin_CLREX, 6006c60b32ab93e77a2709549dbc6eaa649eb915204sewardj /* Neon */ 6016c60b32ab93e77a2709549dbc6eaa649eb915204sewardj ARMin_NLdStQ, 6026c60b32ab93e77a2709549dbc6eaa649eb915204sewardj ARMin_NLdStD, 6036c60b32ab93e77a2709549dbc6eaa649eb915204sewardj ARMin_NUnary, 6046c60b32ab93e77a2709549dbc6eaa649eb915204sewardj ARMin_NUnaryS, 6056c60b32ab93e77a2709549dbc6eaa649eb915204sewardj ARMin_NDual, 6066c60b32ab93e77a2709549dbc6eaa649eb915204sewardj ARMin_NBinary, 6076c60b32ab93e77a2709549dbc6eaa649eb915204sewardj ARMin_NBinaryS, 6086c60b32ab93e77a2709549dbc6eaa649eb915204sewardj ARMin_NShift, 609f78a81c0427ba930ee9ab73f41d1570e013af3acsewardj ARMin_NShl64, // special case 64-bit shift of Dreg by immediate 6106c60b32ab93e77a2709549dbc6eaa649eb915204sewardj ARMin_NeonImm, 6116c60b32ab93e77a2709549dbc6eaa649eb915204sewardj ARMin_NCMovQ, 6126c60b32ab93e77a2709549dbc6eaa649eb915204sewardj /* This is not a NEON instruction. Actually there is no corresponding 6136c60b32ab93e77a2709549dbc6eaa649eb915204sewardj instruction in ARM instruction set at all. We need this one to 6146c60b32ab93e77a2709549dbc6eaa649eb915204sewardj generate spill/reload of 128-bit registers since current register 6156c60b32ab93e77a2709549dbc6eaa649eb915204sewardj allocator demands them to consist of no more than two instructions. 6166c60b32ab93e77a2709549dbc6eaa649eb915204sewardj We will split this instruction into 2 or 3 ARM instructions on the 6176c60b32ab93e77a2709549dbc6eaa649eb915204sewardj emiting phase. 6186c60b32ab93e77a2709549dbc6eaa649eb915204sewardj NOTE: source and destination registers should be different! */ 619c6f970f1fadb640d69c78ac2669efab5c08f1e8dsewardj ARMin_Add32, 620c6f970f1fadb640d69c78ac2669efab5c08f1e8dsewardj ARMin_EvCheck, /* Event check */ 621c6f970f1fadb640d69c78ac2669efab5c08f1e8dsewardj ARMin_ProfInc /* 64-bit profile counter increment */ 6220578287155cb60143bcf70fdf5e1c2beb0b92c07cerion } 6230578287155cb60143bcf70fdf5e1c2beb0b92c07cerion ARMInstrTag; 6240578287155cb60143bcf70fdf5e1c2beb0b92c07cerion 6256c299f3acab617581ea504e45fbb6cab24c2b29fsewardj/* Destinations are on the LEFT (first operand) */ 6260578287155cb60143bcf70fdf5e1c2beb0b92c07cerion 6270578287155cb60143bcf70fdf5e1c2beb0b92c07ceriontypedef 6280578287155cb60143bcf70fdf5e1c2beb0b92c07cerion struct { 6290578287155cb60143bcf70fdf5e1c2beb0b92c07cerion ARMInstrTag tag; 6300578287155cb60143bcf70fdf5e1c2beb0b92c07cerion union { 6316c299f3acab617581ea504e45fbb6cab24c2b29fsewardj /* ADD/SUB/AND/OR/XOR, vanilla ALU op */ 6326c299f3acab617581ea504e45fbb6cab24c2b29fsewardj struct { 6336c299f3acab617581ea504e45fbb6cab24c2b29fsewardj ARMAluOp op; 6346c299f3acab617581ea504e45fbb6cab24c2b29fsewardj HReg dst; 6356c299f3acab617581ea504e45fbb6cab24c2b29fsewardj HReg argL; 6366c299f3acab617581ea504e45fbb6cab24c2b29fsewardj ARMRI84* argR; 6376c299f3acab617581ea504e45fbb6cab24c2b29fsewardj } Alu; 6386c299f3acab617581ea504e45fbb6cab24c2b29fsewardj /* SHL/SHR/SAR, 2nd arg is reg or imm */ 6396c299f3acab617581ea504e45fbb6cab24c2b29fsewardj struct { 6406c299f3acab617581ea504e45fbb6cab24c2b29fsewardj ARMShiftOp op; 6416c299f3acab617581ea504e45fbb6cab24c2b29fsewardj HReg dst; 6426c299f3acab617581ea504e45fbb6cab24c2b29fsewardj HReg argL; 6436c299f3acab617581ea504e45fbb6cab24c2b29fsewardj ARMRI5* argR; 6446c299f3acab617581ea504e45fbb6cab24c2b29fsewardj } Shift; 6456c299f3acab617581ea504e45fbb6cab24c2b29fsewardj /* NOT/NEG/CLZ */ 6466c299f3acab617581ea504e45fbb6cab24c2b29fsewardj struct { 6476c299f3acab617581ea504e45fbb6cab24c2b29fsewardj ARMUnaryOp op; 6486c299f3acab617581ea504e45fbb6cab24c2b29fsewardj HReg dst; 6496c299f3acab617581ea504e45fbb6cab24c2b29fsewardj HReg src; 6506c299f3acab617581ea504e45fbb6cab24c2b29fsewardj } Unary; 6516c299f3acab617581ea504e45fbb6cab24c2b29fsewardj /* CMP/TST; subtract/and, discard result, set NZCV */ 6526c299f3acab617581ea504e45fbb6cab24c2b29fsewardj struct { 6536c299f3acab617581ea504e45fbb6cab24c2b29fsewardj Bool isCmp; 6546c299f3acab617581ea504e45fbb6cab24c2b29fsewardj HReg argL; 6556c299f3acab617581ea504e45fbb6cab24c2b29fsewardj ARMRI84* argR; 6566c299f3acab617581ea504e45fbb6cab24c2b29fsewardj } CmpOrTst; 6576c299f3acab617581ea504e45fbb6cab24c2b29fsewardj /* MOV dst, src -- reg-reg (or reg-imm8x4) move */ 6586c299f3acab617581ea504e45fbb6cab24c2b29fsewardj struct { 6596c299f3acab617581ea504e45fbb6cab24c2b29fsewardj HReg dst; 6606c299f3acab617581ea504e45fbb6cab24c2b29fsewardj ARMRI84* src; 6616c299f3acab617581ea504e45fbb6cab24c2b29fsewardj } Mov; 6626c299f3acab617581ea504e45fbb6cab24c2b29fsewardj /* Pseudo-insn; make a 32-bit immediate */ 6636c299f3acab617581ea504e45fbb6cab24c2b29fsewardj struct { 6646c299f3acab617581ea504e45fbb6cab24c2b29fsewardj HReg dst; 6656c299f3acab617581ea504e45fbb6cab24c2b29fsewardj UInt imm32; 6666c299f3acab617581ea504e45fbb6cab24c2b29fsewardj } Imm32; 667cfe046e178666280b87da998b1b52ecda03ecd89sewardj /* 32-bit load or store, may be conditional */ 6686c299f3acab617581ea504e45fbb6cab24c2b29fsewardj struct { 669cfe046e178666280b87da998b1b52ecda03ecd89sewardj ARMCondCode cc; /* ARMcc_NV is not allowed */ 670cfe046e178666280b87da998b1b52ecda03ecd89sewardj Bool isLoad; 671cfe046e178666280b87da998b1b52ecda03ecd89sewardj HReg rD; 672cfe046e178666280b87da998b1b52ecda03ecd89sewardj ARMAMode1* amode; 6736c299f3acab617581ea504e45fbb6cab24c2b29fsewardj } LdSt32; 674cfe046e178666280b87da998b1b52ecda03ecd89sewardj /* 16-bit load or store, may be conditional */ 6756c299f3acab617581ea504e45fbb6cab24c2b29fsewardj struct { 676cfe046e178666280b87da998b1b52ecda03ecd89sewardj ARMCondCode cc; /* ARMcc_NV is not allowed */ 677cfe046e178666280b87da998b1b52ecda03ecd89sewardj Bool isLoad; 678cfe046e178666280b87da998b1b52ecda03ecd89sewardj Bool signedLoad; 679cfe046e178666280b87da998b1b52ecda03ecd89sewardj HReg rD; 680cfe046e178666280b87da998b1b52ecda03ecd89sewardj ARMAMode2* amode; 6816c299f3acab617581ea504e45fbb6cab24c2b29fsewardj } LdSt16; 682cfe046e178666280b87da998b1b52ecda03ecd89sewardj /* 8-bit (unsigned) load or store, may be conditional */ 6836c299f3acab617581ea504e45fbb6cab24c2b29fsewardj struct { 684cfe046e178666280b87da998b1b52ecda03ecd89sewardj ARMCondCode cc; /* ARMcc_NV is not allowed */ 685cfe046e178666280b87da998b1b52ecda03ecd89sewardj Bool isLoad; 686cfe046e178666280b87da998b1b52ecda03ecd89sewardj HReg rD; 687cfe046e178666280b87da998b1b52ecda03ecd89sewardj ARMAMode1* amode; 6886c299f3acab617581ea504e45fbb6cab24c2b29fsewardj } LdSt8U; 689cfe046e178666280b87da998b1b52ecda03ecd89sewardj /* 8-bit signed load, may be conditional */ 6906c299f3acab617581ea504e45fbb6cab24c2b29fsewardj struct { 691cfe046e178666280b87da998b1b52ecda03ecd89sewardj ARMCondCode cc; /* ARMcc_NV is not allowed */ 692cfe046e178666280b87da998b1b52ecda03ecd89sewardj HReg rD; 693cfe046e178666280b87da998b1b52ecda03ecd89sewardj ARMAMode2* amode; 6946c299f3acab617581ea504e45fbb6cab24c2b29fsewardj } Ld8S; 695c6f970f1fadb640d69c78ac2669efab5c08f1e8dsewardj /* Update the guest R15T value, then exit requesting to chain 696c6f970f1fadb640d69c78ac2669efab5c08f1e8dsewardj to it. May be conditional. Urr, use of Addr32 implicitly 697c6f970f1fadb640d69c78ac2669efab5c08f1e8dsewardj assumes that wordsize(guest) == wordsize(host). */ 698c6f970f1fadb640d69c78ac2669efab5c08f1e8dsewardj struct { 699c6f970f1fadb640d69c78ac2669efab5c08f1e8dsewardj Addr32 dstGA; /* next guest address */ 700c6f970f1fadb640d69c78ac2669efab5c08f1e8dsewardj ARMAMode1* amR15T; /* amode in guest state for R15T */ 701c6f970f1fadb640d69c78ac2669efab5c08f1e8dsewardj ARMCondCode cond; /* can be ARMcc_AL */ 702c6f970f1fadb640d69c78ac2669efab5c08f1e8dsewardj Bool toFastEP; /* chain to the slow or fast point? */ 703c6f970f1fadb640d69c78ac2669efab5c08f1e8dsewardj } XDirect; 704c6f970f1fadb640d69c78ac2669efab5c08f1e8dsewardj /* Boring transfer to a guest address not known at JIT time. 705c6f970f1fadb640d69c78ac2669efab5c08f1e8dsewardj Not chainable. May be conditional. */ 7066c299f3acab617581ea504e45fbb6cab24c2b29fsewardj struct { 707c6f970f1fadb640d69c78ac2669efab5c08f1e8dsewardj HReg dstGA; 708c6f970f1fadb640d69c78ac2669efab5c08f1e8dsewardj ARMAMode1* amR15T; 709c6f970f1fadb640d69c78ac2669efab5c08f1e8dsewardj ARMCondCode cond; /* can be ARMcc_AL */ 710c6f970f1fadb640d69c78ac2669efab5c08f1e8dsewardj } XIndir; 711c6f970f1fadb640d69c78ac2669efab5c08f1e8dsewardj /* Assisted transfer to a guest address, most general case. 712c6f970f1fadb640d69c78ac2669efab5c08f1e8dsewardj Not chainable. May be conditional. */ 713c6f970f1fadb640d69c78ac2669efab5c08f1e8dsewardj struct { 714c6f970f1fadb640d69c78ac2669efab5c08f1e8dsewardj HReg dstGA; 715c6f970f1fadb640d69c78ac2669efab5c08f1e8dsewardj ARMAMode1* amR15T; 716c6f970f1fadb640d69c78ac2669efab5c08f1e8dsewardj ARMCondCode cond; /* can be ARMcc_AL */ 7176c299f3acab617581ea504e45fbb6cab24c2b29fsewardj IRJumpKind jk; 718c6f970f1fadb640d69c78ac2669efab5c08f1e8dsewardj } XAssisted; 7196c299f3acab617581ea504e45fbb6cab24c2b29fsewardj /* Mov src to dst on the given condition, which may not 7206c299f3acab617581ea504e45fbb6cab24c2b29fsewardj be ARMcc_AL. */ 7216c299f3acab617581ea504e45fbb6cab24c2b29fsewardj struct { 7226c299f3acab617581ea504e45fbb6cab24c2b29fsewardj ARMCondCode cond; 7236c299f3acab617581ea504e45fbb6cab24c2b29fsewardj HReg dst; 7246c299f3acab617581ea504e45fbb6cab24c2b29fsewardj ARMRI84* src; 7256c299f3acab617581ea504e45fbb6cab24c2b29fsewardj } CMov; 7266c299f3acab617581ea504e45fbb6cab24c2b29fsewardj /* Pseudo-insn. Call target (an absolute address), on given 7276c299f3acab617581ea504e45fbb6cab24c2b29fsewardj condition (which could be ARMcc_AL). */ 7286c299f3acab617581ea504e45fbb6cab24c2b29fsewardj struct { 7296c299f3acab617581ea504e45fbb6cab24c2b29fsewardj ARMCondCode cond; 73093a09742b0de3d61718882c2d999f64be402564dflorian Addr32 target; 7316c299f3acab617581ea504e45fbb6cab24c2b29fsewardj Int nArgRegs; /* # regs carrying args: 0 .. 4 */ 732cfe046e178666280b87da998b1b52ecda03ecd89sewardj RetLoc rloc; /* where the return value will be */ 7336c299f3acab617581ea504e45fbb6cab24c2b29fsewardj } Call; 7346c299f3acab617581ea504e45fbb6cab24c2b29fsewardj /* (PLAIN) 32 * 32 -> 32: r0 = r2 * r3 7356c299f3acab617581ea504e45fbb6cab24c2b29fsewardj (ZX) 32 *u 32 -> 64: r1:r0 = r2 *u r3 7366c299f3acab617581ea504e45fbb6cab24c2b29fsewardj (SX) 32 *s 32 -> 64: r1:r0 = r2 *s r3 7376c299f3acab617581ea504e45fbb6cab24c2b29fsewardj Why hardwired registers? Because the ARM ARM specifies 7386c299f3acab617581ea504e45fbb6cab24c2b29fsewardj (eg for straight MUL) the result (Rd) and the left arg (Rm) 7396c299f3acab617581ea504e45fbb6cab24c2b29fsewardj may not be the same register. That's not a constraint we 7406c299f3acab617581ea504e45fbb6cab24c2b29fsewardj can enforce in the register allocator (without mucho extra 7416c299f3acab617581ea504e45fbb6cab24c2b29fsewardj complexity). Hence hardwire it. At least using caller-saves 7426c299f3acab617581ea504e45fbb6cab24c2b29fsewardj registers, which are less likely to be in use. */ 7436c299f3acab617581ea504e45fbb6cab24c2b29fsewardj struct { 7446c299f3acab617581ea504e45fbb6cab24c2b29fsewardj ARMMulOp op; 7456c299f3acab617581ea504e45fbb6cab24c2b29fsewardj } Mul; 746ff7f5b7ec308d0a2608be80ea9654184baa97272sewardj /* LDREX{,H,B} r2, [r4] and 747ff7f5b7ec308d0a2608be80ea9654184baa97272sewardj LDREXD r2, r3, [r4] (on LE hosts, transferred value is r3:r2) 7486c299f3acab617581ea504e45fbb6cab24c2b29fsewardj Again, hardwired registers since this is not performance 7496c299f3acab617581ea504e45fbb6cab24c2b29fsewardj critical, and there are possibly constraints on the 7506c299f3acab617581ea504e45fbb6cab24c2b29fsewardj registers that we can't express in the register allocator.*/ 7516c299f3acab617581ea504e45fbb6cab24c2b29fsewardj struct { 752ff7f5b7ec308d0a2608be80ea9654184baa97272sewardj Int szB; /* 1, 2, 4 or 8 */ 7536c299f3acab617581ea504e45fbb6cab24c2b29fsewardj } LdrEX; 754ff7f5b7ec308d0a2608be80ea9654184baa97272sewardj /* STREX{,H,B} r0, r2, [r4] and 755ff7f5b7ec308d0a2608be80ea9654184baa97272sewardj STREXD r0, r2, r3, [r4] (on LE hosts, transferred value is r3:r2) 756ff7f5b7ec308d0a2608be80ea9654184baa97272sewardj r0 = SC( [r4] = r2 ) (8, 16, 32 bit transfers) 757ff7f5b7ec308d0a2608be80ea9654184baa97272sewardj r0 = SC( [r4] = r3:r2) (64 bit transfers) 7586c299f3acab617581ea504e45fbb6cab24c2b29fsewardj Ditto comment re fixed registers. */ 7596c299f3acab617581ea504e45fbb6cab24c2b29fsewardj struct { 760ff7f5b7ec308d0a2608be80ea9654184baa97272sewardj Int szB; /* 1, 2, 4 or 8 */ 7616c299f3acab617581ea504e45fbb6cab24c2b29fsewardj } StrEX; 7626c299f3acab617581ea504e45fbb6cab24c2b29fsewardj /* VFP INSTRUCTIONS */ 7636c299f3acab617581ea504e45fbb6cab24c2b29fsewardj /* 64-bit Fp load/store */ 7646c299f3acab617581ea504e45fbb6cab24c2b29fsewardj struct { 7656c299f3acab617581ea504e45fbb6cab24c2b29fsewardj Bool isLoad; 7666c299f3acab617581ea504e45fbb6cab24c2b29fsewardj HReg dD; 7676c299f3acab617581ea504e45fbb6cab24c2b29fsewardj ARMAModeV* amode; 7686c299f3acab617581ea504e45fbb6cab24c2b29fsewardj } VLdStD; 7696c299f3acab617581ea504e45fbb6cab24c2b29fsewardj /* 32-bit Fp load/store */ 7706c299f3acab617581ea504e45fbb6cab24c2b29fsewardj struct { 7716c299f3acab617581ea504e45fbb6cab24c2b29fsewardj Bool isLoad; 7726c299f3acab617581ea504e45fbb6cab24c2b29fsewardj HReg fD; 7736c299f3acab617581ea504e45fbb6cab24c2b29fsewardj ARMAModeV* amode; 7746c299f3acab617581ea504e45fbb6cab24c2b29fsewardj } VLdStS; 7756c299f3acab617581ea504e45fbb6cab24c2b29fsewardj /* 64-bit FP binary arithmetic */ 7766c299f3acab617581ea504e45fbb6cab24c2b29fsewardj struct { 7776c299f3acab617581ea504e45fbb6cab24c2b29fsewardj ARMVfpOp op; 7786c299f3acab617581ea504e45fbb6cab24c2b29fsewardj HReg dst; 7796c299f3acab617581ea504e45fbb6cab24c2b29fsewardj HReg argL; 7806c299f3acab617581ea504e45fbb6cab24c2b29fsewardj HReg argR; 7816c299f3acab617581ea504e45fbb6cab24c2b29fsewardj } VAluD; 7826c299f3acab617581ea504e45fbb6cab24c2b29fsewardj /* 32-bit FP binary arithmetic */ 7836c299f3acab617581ea504e45fbb6cab24c2b29fsewardj struct { 7846c299f3acab617581ea504e45fbb6cab24c2b29fsewardj ARMVfpOp op; 7856c299f3acab617581ea504e45fbb6cab24c2b29fsewardj HReg dst; 7866c299f3acab617581ea504e45fbb6cab24c2b29fsewardj HReg argL; 7876c299f3acab617581ea504e45fbb6cab24c2b29fsewardj HReg argR; 7886c299f3acab617581ea504e45fbb6cab24c2b29fsewardj } VAluS; 7896c299f3acab617581ea504e45fbb6cab24c2b29fsewardj /* 64-bit FP unary, also reg-reg move */ 7906c299f3acab617581ea504e45fbb6cab24c2b29fsewardj struct { 7916c299f3acab617581ea504e45fbb6cab24c2b29fsewardj ARMVfpUnaryOp op; 7926c299f3acab617581ea504e45fbb6cab24c2b29fsewardj HReg dst; 7936c299f3acab617581ea504e45fbb6cab24c2b29fsewardj HReg src; 7946c299f3acab617581ea504e45fbb6cab24c2b29fsewardj } VUnaryD; 7956c299f3acab617581ea504e45fbb6cab24c2b29fsewardj /* 32-bit FP unary, also reg-reg move */ 7966c299f3acab617581ea504e45fbb6cab24c2b29fsewardj struct { 7976c299f3acab617581ea504e45fbb6cab24c2b29fsewardj ARMVfpUnaryOp op; 7986c299f3acab617581ea504e45fbb6cab24c2b29fsewardj HReg dst; 7996c299f3acab617581ea504e45fbb6cab24c2b29fsewardj HReg src; 8006c299f3acab617581ea504e45fbb6cab24c2b29fsewardj } VUnaryS; 8016c299f3acab617581ea504e45fbb6cab24c2b29fsewardj /* 64-bit FP compare and move results to CPSR (FCMPD;FMSTAT) */ 8026c299f3acab617581ea504e45fbb6cab24c2b29fsewardj struct { 8036c299f3acab617581ea504e45fbb6cab24c2b29fsewardj HReg argL; 8046c299f3acab617581ea504e45fbb6cab24c2b29fsewardj HReg argR; 8056c299f3acab617581ea504e45fbb6cab24c2b29fsewardj } VCmpD; 8066c299f3acab617581ea504e45fbb6cab24c2b29fsewardj /* 64-bit FP mov src to dst on the given condition, which may 8076c299f3acab617581ea504e45fbb6cab24c2b29fsewardj not be ARMcc_AL. */ 8086c299f3acab617581ea504e45fbb6cab24c2b29fsewardj struct { 8096c299f3acab617581ea504e45fbb6cab24c2b29fsewardj ARMCondCode cond; 8106c299f3acab617581ea504e45fbb6cab24c2b29fsewardj HReg dst; 8116c299f3acab617581ea504e45fbb6cab24c2b29fsewardj HReg src; 8126c299f3acab617581ea504e45fbb6cab24c2b29fsewardj } VCMovD; 8136c299f3acab617581ea504e45fbb6cab24c2b29fsewardj /* 32-bit FP mov src to dst on the given condition, which may 8146c299f3acab617581ea504e45fbb6cab24c2b29fsewardj not be ARMcc_AL. */ 8156c299f3acab617581ea504e45fbb6cab24c2b29fsewardj struct { 8166c299f3acab617581ea504e45fbb6cab24c2b29fsewardj ARMCondCode cond; 8176c299f3acab617581ea504e45fbb6cab24c2b29fsewardj HReg dst; 8186c299f3acab617581ea504e45fbb6cab24c2b29fsewardj HReg src; 8196c299f3acab617581ea504e45fbb6cab24c2b29fsewardj } VCMovS; 8206c299f3acab617581ea504e45fbb6cab24c2b29fsewardj /* Convert between 32-bit and 64-bit FP values (both ways). 8216c299f3acab617581ea504e45fbb6cab24c2b29fsewardj (FCVTSD, FCVTDS) */ 8226c299f3acab617581ea504e45fbb6cab24c2b29fsewardj struct { 8236c299f3acab617581ea504e45fbb6cab24c2b29fsewardj Bool sToD; /* True: F32->F64. False: F64->F32 */ 8246c299f3acab617581ea504e45fbb6cab24c2b29fsewardj HReg dst; 8256c299f3acab617581ea504e45fbb6cab24c2b29fsewardj HReg src; 8266c299f3acab617581ea504e45fbb6cab24c2b29fsewardj } VCvtSD; 8276c299f3acab617581ea504e45fbb6cab24c2b29fsewardj /* Transfer a VFP D reg to/from two integer registers (VMOV) */ 8286c299f3acab617581ea504e45fbb6cab24c2b29fsewardj struct { 8296c299f3acab617581ea504e45fbb6cab24c2b29fsewardj Bool toD; 8306c299f3acab617581ea504e45fbb6cab24c2b29fsewardj HReg dD; 8316c299f3acab617581ea504e45fbb6cab24c2b29fsewardj HReg rHi; 8326c299f3acab617581ea504e45fbb6cab24c2b29fsewardj HReg rLo; 8336c299f3acab617581ea504e45fbb6cab24c2b29fsewardj } VXferD; 8346c299f3acab617581ea504e45fbb6cab24c2b29fsewardj /* Transfer a VFP S reg to/from an integer register (VMOV) */ 8356c299f3acab617581ea504e45fbb6cab24c2b29fsewardj struct { 8366c299f3acab617581ea504e45fbb6cab24c2b29fsewardj Bool toS; 8376c299f3acab617581ea504e45fbb6cab24c2b29fsewardj HReg fD; 8386c299f3acab617581ea504e45fbb6cab24c2b29fsewardj HReg rLo; 8396c299f3acab617581ea504e45fbb6cab24c2b29fsewardj } VXferS; 8406c299f3acab617581ea504e45fbb6cab24c2b29fsewardj /* Convert between 32-bit ints and 64-bit FP values (both ways 8416c299f3acab617581ea504e45fbb6cab24c2b29fsewardj and both signednesses). (FSITOD, FUITOD, FTOSID, FTOUID) */ 8426c299f3acab617581ea504e45fbb6cab24c2b29fsewardj struct { 8436c299f3acab617581ea504e45fbb6cab24c2b29fsewardj Bool iToD; /* True: I32->F64. False: F64->I32 */ 8446c299f3acab617581ea504e45fbb6cab24c2b29fsewardj Bool syned; /* True: I32 is signed. False: I32 is unsigned */ 8456c299f3acab617581ea504e45fbb6cab24c2b29fsewardj HReg dst; 8466c299f3acab617581ea504e45fbb6cab24c2b29fsewardj HReg src; 8476c299f3acab617581ea504e45fbb6cab24c2b29fsewardj } VCvtID; 8486c299f3acab617581ea504e45fbb6cab24c2b29fsewardj /* Move a 32-bit value to/from the FPSCR (FMXR, FMRX) */ 8496c299f3acab617581ea504e45fbb6cab24c2b29fsewardj struct { 8506c299f3acab617581ea504e45fbb6cab24c2b29fsewardj Bool toFPSCR; 8516c299f3acab617581ea504e45fbb6cab24c2b29fsewardj HReg iReg; 8526c299f3acab617581ea504e45fbb6cab24c2b29fsewardj } FPSCR; 853412098cf3166995b33b34e20b96eae9845e74a50sewardj /* Mem fence. An insn which fences all loads and stores as 854412098cf3166995b33b34e20b96eae9845e74a50sewardj much as possible before continuing. On ARM we emit the 855412098cf3166995b33b34e20b96eae9845e74a50sewardj sequence 856412098cf3166995b33b34e20b96eae9845e74a50sewardj mcr 15,0,r0,c7,c10,4 (DSB) 857412098cf3166995b33b34e20b96eae9845e74a50sewardj mcr 15,0,r0,c7,c10,5 (DMB) 858412098cf3166995b33b34e20b96eae9845e74a50sewardj mcr 15,0,r0,c7,c5,4 (ISB) 859412098cf3166995b33b34e20b96eae9845e74a50sewardj which is probably total overkill, but better safe than 860412098cf3166995b33b34e20b96eae9845e74a50sewardj sorry. 861412098cf3166995b33b34e20b96eae9845e74a50sewardj */ 862412098cf3166995b33b34e20b96eae9845e74a50sewardj struct { 863412098cf3166995b33b34e20b96eae9845e74a50sewardj } MFence; 8646d615ba78d168bb4319120fff5ce83d3f7433022sewardj /* A CLREX instruction. */ 8656d615ba78d168bb4319120fff5ce83d3f7433022sewardj struct { 8666d615ba78d168bb4319120fff5ce83d3f7433022sewardj } CLREX; 8676c60b32ab93e77a2709549dbc6eaa649eb915204sewardj /* Neon data processing instruction: 3 registers of the same 8686c60b32ab93e77a2709549dbc6eaa649eb915204sewardj length */ 8696c60b32ab93e77a2709549dbc6eaa649eb915204sewardj struct { 8706c60b32ab93e77a2709549dbc6eaa649eb915204sewardj ARMNeonBinOp op; 8716c60b32ab93e77a2709549dbc6eaa649eb915204sewardj HReg dst; 8726c60b32ab93e77a2709549dbc6eaa649eb915204sewardj HReg argL; 8736c60b32ab93e77a2709549dbc6eaa649eb915204sewardj HReg argR; 8746c60b32ab93e77a2709549dbc6eaa649eb915204sewardj UInt size; 8756c60b32ab93e77a2709549dbc6eaa649eb915204sewardj Bool Q; 8766c60b32ab93e77a2709549dbc6eaa649eb915204sewardj } NBinary; 8776c60b32ab93e77a2709549dbc6eaa649eb915204sewardj struct { 8786c60b32ab93e77a2709549dbc6eaa649eb915204sewardj ARMNeonBinOp op; 8796c60b32ab93e77a2709549dbc6eaa649eb915204sewardj ARMNRS* dst; 8806c60b32ab93e77a2709549dbc6eaa649eb915204sewardj ARMNRS* argL; 8816c60b32ab93e77a2709549dbc6eaa649eb915204sewardj ARMNRS* argR; 8826c60b32ab93e77a2709549dbc6eaa649eb915204sewardj UInt size; 8836c60b32ab93e77a2709549dbc6eaa649eb915204sewardj Bool Q; 8846c60b32ab93e77a2709549dbc6eaa649eb915204sewardj } NBinaryS; 8856c60b32ab93e77a2709549dbc6eaa649eb915204sewardj struct { 8866c60b32ab93e77a2709549dbc6eaa649eb915204sewardj ARMNeonShiftOp op; 8876c60b32ab93e77a2709549dbc6eaa649eb915204sewardj HReg dst; 8886c60b32ab93e77a2709549dbc6eaa649eb915204sewardj HReg argL; 8896c60b32ab93e77a2709549dbc6eaa649eb915204sewardj HReg argR; 8906c60b32ab93e77a2709549dbc6eaa649eb915204sewardj UInt size; 8916c60b32ab93e77a2709549dbc6eaa649eb915204sewardj Bool Q; 8926c60b32ab93e77a2709549dbc6eaa649eb915204sewardj } NShift; 8936c60b32ab93e77a2709549dbc6eaa649eb915204sewardj struct { 894f78a81c0427ba930ee9ab73f41d1570e013af3acsewardj HReg dst; 895f78a81c0427ba930ee9ab73f41d1570e013af3acsewardj HReg src; 896f78a81c0427ba930ee9ab73f41d1570e013af3acsewardj UInt amt; /* 1..63 only */ 897f78a81c0427ba930ee9ab73f41d1570e013af3acsewardj } NShl64; 898f78a81c0427ba930ee9ab73f41d1570e013af3acsewardj struct { 8996c60b32ab93e77a2709549dbc6eaa649eb915204sewardj Bool isLoad; 9006c60b32ab93e77a2709549dbc6eaa649eb915204sewardj HReg dQ; 9016c60b32ab93e77a2709549dbc6eaa649eb915204sewardj ARMAModeN *amode; 9026c60b32ab93e77a2709549dbc6eaa649eb915204sewardj } NLdStQ; 9036c60b32ab93e77a2709549dbc6eaa649eb915204sewardj struct { 9046c60b32ab93e77a2709549dbc6eaa649eb915204sewardj Bool isLoad; 9056c60b32ab93e77a2709549dbc6eaa649eb915204sewardj HReg dD; 9066c60b32ab93e77a2709549dbc6eaa649eb915204sewardj ARMAModeN *amode; 9076c60b32ab93e77a2709549dbc6eaa649eb915204sewardj } NLdStD; 9086c60b32ab93e77a2709549dbc6eaa649eb915204sewardj struct { 9096aa87a6864b2f3c9d766784dd13a2d321a8b08bdsewardj ARMNeonUnOpS op; 9106c60b32ab93e77a2709549dbc6eaa649eb915204sewardj ARMNRS* dst; 9116c60b32ab93e77a2709549dbc6eaa649eb915204sewardj ARMNRS* src; 9126c60b32ab93e77a2709549dbc6eaa649eb915204sewardj UInt size; 9136c60b32ab93e77a2709549dbc6eaa649eb915204sewardj Bool Q; 9146c60b32ab93e77a2709549dbc6eaa649eb915204sewardj } NUnaryS; 9156c60b32ab93e77a2709549dbc6eaa649eb915204sewardj struct { 9166c60b32ab93e77a2709549dbc6eaa649eb915204sewardj ARMNeonUnOp op; 9176c60b32ab93e77a2709549dbc6eaa649eb915204sewardj HReg dst; 9186c60b32ab93e77a2709549dbc6eaa649eb915204sewardj HReg src; 9196c60b32ab93e77a2709549dbc6eaa649eb915204sewardj UInt size; 9206c60b32ab93e77a2709549dbc6eaa649eb915204sewardj Bool Q; 9216c60b32ab93e77a2709549dbc6eaa649eb915204sewardj } NUnary; 9226c60b32ab93e77a2709549dbc6eaa649eb915204sewardj /* Takes two arguments and modifies them both. */ 9236c60b32ab93e77a2709549dbc6eaa649eb915204sewardj struct { 9246c60b32ab93e77a2709549dbc6eaa649eb915204sewardj ARMNeonDualOp op; 9256c60b32ab93e77a2709549dbc6eaa649eb915204sewardj HReg arg1; 9266c60b32ab93e77a2709549dbc6eaa649eb915204sewardj HReg arg2; 9276c60b32ab93e77a2709549dbc6eaa649eb915204sewardj UInt size; 9286c60b32ab93e77a2709549dbc6eaa649eb915204sewardj Bool Q; 9296c60b32ab93e77a2709549dbc6eaa649eb915204sewardj } NDual; 9306c60b32ab93e77a2709549dbc6eaa649eb915204sewardj struct { 9316c60b32ab93e77a2709549dbc6eaa649eb915204sewardj HReg dst; 9326c60b32ab93e77a2709549dbc6eaa649eb915204sewardj ARMNImm* imm; 9336c60b32ab93e77a2709549dbc6eaa649eb915204sewardj } NeonImm; 9346c60b32ab93e77a2709549dbc6eaa649eb915204sewardj /* 128-bit Neon move src to dst on the given condition, which 9356c60b32ab93e77a2709549dbc6eaa649eb915204sewardj may not be ARMcc_AL. */ 9366c60b32ab93e77a2709549dbc6eaa649eb915204sewardj struct { 9376c60b32ab93e77a2709549dbc6eaa649eb915204sewardj ARMCondCode cond; 9386c60b32ab93e77a2709549dbc6eaa649eb915204sewardj HReg dst; 9396c60b32ab93e77a2709549dbc6eaa649eb915204sewardj HReg src; 9406c60b32ab93e77a2709549dbc6eaa649eb915204sewardj } NCMovQ; 9416c60b32ab93e77a2709549dbc6eaa649eb915204sewardj struct { 9426c60b32ab93e77a2709549dbc6eaa649eb915204sewardj /* Note: rD != rN */ 9436c60b32ab93e77a2709549dbc6eaa649eb915204sewardj HReg rD; 9446c60b32ab93e77a2709549dbc6eaa649eb915204sewardj HReg rN; 9456c60b32ab93e77a2709549dbc6eaa649eb915204sewardj UInt imm32; 9466c60b32ab93e77a2709549dbc6eaa649eb915204sewardj } Add32; 947c6f970f1fadb640d69c78ac2669efab5c08f1e8dsewardj struct { 948c6f970f1fadb640d69c78ac2669efab5c08f1e8dsewardj ARMAMode1* amCounter; 949c6f970f1fadb640d69c78ac2669efab5c08f1e8dsewardj ARMAMode1* amFailAddr; 950c6f970f1fadb640d69c78ac2669efab5c08f1e8dsewardj } EvCheck; 951c6f970f1fadb640d69c78ac2669efab5c08f1e8dsewardj struct { 952c6f970f1fadb640d69c78ac2669efab5c08f1e8dsewardj /* No fields. The address of the counter to inc is 953c6f970f1fadb640d69c78ac2669efab5c08f1e8dsewardj installed later, post-translation, by patching it in, 954c6f970f1fadb640d69c78ac2669efab5c08f1e8dsewardj as it is not known at translation time. */ 955c6f970f1fadb640d69c78ac2669efab5c08f1e8dsewardj } ProfInc; 9560578287155cb60143bcf70fdf5e1c2beb0b92c07cerion } ARMin; 9570578287155cb60143bcf70fdf5e1c2beb0b92c07cerion } 9580578287155cb60143bcf70fdf5e1c2beb0b92c07cerion ARMInstr; 9590578287155cb60143bcf70fdf5e1c2beb0b92c07cerion 960cee303178c1b607c1457346e7bcbf7fb20dbde55cerion 9616c299f3acab617581ea504e45fbb6cab24c2b29fsewardjextern ARMInstr* ARMInstr_Alu ( ARMAluOp, HReg, HReg, ARMRI84* ); 9626c299f3acab617581ea504e45fbb6cab24c2b29fsewardjextern ARMInstr* ARMInstr_Shift ( ARMShiftOp, HReg, HReg, ARMRI5* ); 9636c299f3acab617581ea504e45fbb6cab24c2b29fsewardjextern ARMInstr* ARMInstr_Unary ( ARMUnaryOp, HReg, HReg ); 9646c299f3acab617581ea504e45fbb6cab24c2b29fsewardjextern ARMInstr* ARMInstr_CmpOrTst ( Bool isCmp, HReg, ARMRI84* ); 9656c299f3acab617581ea504e45fbb6cab24c2b29fsewardjextern ARMInstr* ARMInstr_Mov ( HReg, ARMRI84* ); 9666c299f3acab617581ea504e45fbb6cab24c2b29fsewardjextern ARMInstr* ARMInstr_Imm32 ( HReg, UInt ); 967cfe046e178666280b87da998b1b52ecda03ecd89sewardjextern ARMInstr* ARMInstr_LdSt32 ( ARMCondCode, 968cfe046e178666280b87da998b1b52ecda03ecd89sewardj Bool isLoad, HReg, ARMAMode1* ); 969cfe046e178666280b87da998b1b52ecda03ecd89sewardjextern ARMInstr* ARMInstr_LdSt16 ( ARMCondCode, 970cfe046e178666280b87da998b1b52ecda03ecd89sewardj Bool isLoad, Bool signedLoad, 9716c299f3acab617581ea504e45fbb6cab24c2b29fsewardj HReg, ARMAMode2* ); 972cfe046e178666280b87da998b1b52ecda03ecd89sewardjextern ARMInstr* ARMInstr_LdSt8U ( ARMCondCode, 973cfe046e178666280b87da998b1b52ecda03ecd89sewardj Bool isLoad, HReg, ARMAMode1* ); 974cfe046e178666280b87da998b1b52ecda03ecd89sewardjextern ARMInstr* ARMInstr_Ld8S ( ARMCondCode, HReg, ARMAMode2* ); 975c6f970f1fadb640d69c78ac2669efab5c08f1e8dsewardjextern ARMInstr* ARMInstr_XDirect ( Addr32 dstGA, ARMAMode1* amR15T, 976c6f970f1fadb640d69c78ac2669efab5c08f1e8dsewardj ARMCondCode cond, Bool toFastEP ); 977c6f970f1fadb640d69c78ac2669efab5c08f1e8dsewardjextern ARMInstr* ARMInstr_XIndir ( HReg dstGA, ARMAMode1* amR15T, 978c6f970f1fadb640d69c78ac2669efab5c08f1e8dsewardj ARMCondCode cond ); 979c6f970f1fadb640d69c78ac2669efab5c08f1e8dsewardjextern ARMInstr* ARMInstr_XAssisted ( HReg dstGA, ARMAMode1* amR15T, 980c6f970f1fadb640d69c78ac2669efab5c08f1e8dsewardj ARMCondCode cond, IRJumpKind jk ); 9816c299f3acab617581ea504e45fbb6cab24c2b29fsewardjextern ARMInstr* ARMInstr_CMov ( ARMCondCode, HReg dst, ARMRI84* src ); 98293a09742b0de3d61718882c2d999f64be402564dflorianextern ARMInstr* ARMInstr_Call ( ARMCondCode, Addr32, Int nArgRegs, 983cfe046e178666280b87da998b1b52ecda03ecd89sewardj RetLoc rloc ); 9846c299f3acab617581ea504e45fbb6cab24c2b29fsewardjextern ARMInstr* ARMInstr_Mul ( ARMMulOp op ); 9856c299f3acab617581ea504e45fbb6cab24c2b29fsewardjextern ARMInstr* ARMInstr_LdrEX ( Int szB ); 9866c299f3acab617581ea504e45fbb6cab24c2b29fsewardjextern ARMInstr* ARMInstr_StrEX ( Int szB ); 9876c299f3acab617581ea504e45fbb6cab24c2b29fsewardjextern ARMInstr* ARMInstr_VLdStD ( Bool isLoad, HReg, ARMAModeV* ); 9886c299f3acab617581ea504e45fbb6cab24c2b29fsewardjextern ARMInstr* ARMInstr_VLdStS ( Bool isLoad, HReg, ARMAModeV* ); 9896c299f3acab617581ea504e45fbb6cab24c2b29fsewardjextern ARMInstr* ARMInstr_VAluD ( ARMVfpOp op, HReg, HReg, HReg ); 9906c299f3acab617581ea504e45fbb6cab24c2b29fsewardjextern ARMInstr* ARMInstr_VAluS ( ARMVfpOp op, HReg, HReg, HReg ); 9916c299f3acab617581ea504e45fbb6cab24c2b29fsewardjextern ARMInstr* ARMInstr_VUnaryD ( ARMVfpUnaryOp, HReg dst, HReg src ); 9926c299f3acab617581ea504e45fbb6cab24c2b29fsewardjextern ARMInstr* ARMInstr_VUnaryS ( ARMVfpUnaryOp, HReg dst, HReg src ); 9936c299f3acab617581ea504e45fbb6cab24c2b29fsewardjextern ARMInstr* ARMInstr_VCmpD ( HReg argL, HReg argR ); 9946c299f3acab617581ea504e45fbb6cab24c2b29fsewardjextern ARMInstr* ARMInstr_VCMovD ( ARMCondCode, HReg dst, HReg src ); 9956c299f3acab617581ea504e45fbb6cab24c2b29fsewardjextern ARMInstr* ARMInstr_VCMovS ( ARMCondCode, HReg dst, HReg src ); 9966c299f3acab617581ea504e45fbb6cab24c2b29fsewardjextern ARMInstr* ARMInstr_VCvtSD ( Bool sToD, HReg dst, HReg src ); 9976c299f3acab617581ea504e45fbb6cab24c2b29fsewardjextern ARMInstr* ARMInstr_VXferD ( Bool toD, HReg dD, HReg rHi, HReg rLo ); 9986c299f3acab617581ea504e45fbb6cab24c2b29fsewardjextern ARMInstr* ARMInstr_VXferS ( Bool toS, HReg fD, HReg rLo ); 9996c299f3acab617581ea504e45fbb6cab24c2b29fsewardjextern ARMInstr* ARMInstr_VCvtID ( Bool iToD, Bool syned, 10006c299f3acab617581ea504e45fbb6cab24c2b29fsewardj HReg dst, HReg src ); 10016c299f3acab617581ea504e45fbb6cab24c2b29fsewardjextern ARMInstr* ARMInstr_FPSCR ( Bool toFPSCR, HReg iReg ); 1002412098cf3166995b33b34e20b96eae9845e74a50sewardjextern ARMInstr* ARMInstr_MFence ( void ); 10036d615ba78d168bb4319120fff5ce83d3f7433022sewardjextern ARMInstr* ARMInstr_CLREX ( void ); 10046c60b32ab93e77a2709549dbc6eaa649eb915204sewardjextern ARMInstr* ARMInstr_NLdStQ ( Bool isLoad, HReg, ARMAModeN* ); 10056c60b32ab93e77a2709549dbc6eaa649eb915204sewardjextern ARMInstr* ARMInstr_NLdStD ( Bool isLoad, HReg, ARMAModeN* ); 10066c60b32ab93e77a2709549dbc6eaa649eb915204sewardjextern ARMInstr* ARMInstr_NUnary ( ARMNeonUnOp, HReg, HReg, UInt, Bool ); 1007cb9ad0ddb5793ac0652b383dc95606cedeac8118sewardjextern ARMInstr* ARMInstr_NUnaryS ( ARMNeonUnOpS, ARMNRS*, ARMNRS*, 10086c60b32ab93e77a2709549dbc6eaa649eb915204sewardj UInt, Bool ); 10096c60b32ab93e77a2709549dbc6eaa649eb915204sewardjextern ARMInstr* ARMInstr_NDual ( ARMNeonDualOp, HReg, HReg, UInt, Bool ); 10106c60b32ab93e77a2709549dbc6eaa649eb915204sewardjextern ARMInstr* ARMInstr_NBinary ( ARMNeonBinOp, HReg, HReg, HReg, 10116c60b32ab93e77a2709549dbc6eaa649eb915204sewardj UInt, Bool ); 10126c60b32ab93e77a2709549dbc6eaa649eb915204sewardjextern ARMInstr* ARMInstr_NShift ( ARMNeonShiftOp, HReg, HReg, HReg, 10136c60b32ab93e77a2709549dbc6eaa649eb915204sewardj UInt, Bool ); 1014f78a81c0427ba930ee9ab73f41d1570e013af3acsewardjextern ARMInstr* ARMInstr_NShl64 ( HReg, HReg, UInt ); 10156c60b32ab93e77a2709549dbc6eaa649eb915204sewardjextern ARMInstr* ARMInstr_NeonImm ( HReg, ARMNImm* ); 10166c60b32ab93e77a2709549dbc6eaa649eb915204sewardjextern ARMInstr* ARMInstr_NCMovQ ( ARMCondCode, HReg, HReg ); 10176c60b32ab93e77a2709549dbc6eaa649eb915204sewardjextern ARMInstr* ARMInstr_Add32 ( HReg rD, HReg rN, UInt imm32 ); 1018c6f970f1fadb640d69c78ac2669efab5c08f1e8dsewardjextern ARMInstr* ARMInstr_EvCheck ( ARMAMode1* amCounter, 1019c6f970f1fadb640d69c78ac2669efab5c08f1e8dsewardj ARMAMode1* amFailAddr ); 1020c6f970f1fadb640d69c78ac2669efab5c08f1e8dsewardjextern ARMInstr* ARMInstr_ProfInc ( void ); 10210578287155cb60143bcf70fdf5e1c2beb0b92c07cerion 1022d8c64e082224b2e688abdef9219cc76fd82b373bflorianextern void ppARMInstr ( const ARMInstr* ); 10230578287155cb60143bcf70fdf5e1c2beb0b92c07cerion 10240578287155cb60143bcf70fdf5e1c2beb0b92c07cerion 10250578287155cb60143bcf70fdf5e1c2beb0b92c07cerion/* Some functions that insulate the register allocator from details 10260578287155cb60143bcf70fdf5e1c2beb0b92c07cerion of the underlying instruction set. */ 1027d8c64e082224b2e688abdef9219cc76fd82b373bflorianextern void getRegUsage_ARMInstr ( HRegUsage*, const ARMInstr*, Bool ); 10286c299f3acab617581ea504e45fbb6cab24c2b29fsewardjextern void mapRegs_ARMInstr ( HRegRemap*, ARMInstr*, Bool ); 1029d8c64e082224b2e688abdef9219cc76fd82b373bflorianextern Bool isMove_ARMInstr ( const ARMInstr*, HReg*, HReg* ); 1030c6f970f1fadb640d69c78ac2669efab5c08f1e8dsewardjextern Int emit_ARMInstr ( /*MB_MOD*/Bool* is_profInc, 1031d8c64e082224b2e688abdef9219cc76fd82b373bflorian UChar* buf, Int nbuf, const ARMInstr* i, 1032c6f970f1fadb640d69c78ac2669efab5c08f1e8dsewardj Bool mode64, 10339b76916dcc1628e133d57db001563429c6e3a590sewardj VexEndness endness_host, 10348462d113e3efeacceb304222dada8d85f748295aflorian const void* disp_cp_chain_me_to_slowEP, 10358462d113e3efeacceb304222dada8d85f748295aflorian const void* disp_cp_chain_me_to_fastEP, 10368462d113e3efeacceb304222dada8d85f748295aflorian const void* disp_cp_xindir, 10378462d113e3efeacceb304222dada8d85f748295aflorian const void* disp_cp_xassisted ); 10386c299f3acab617581ea504e45fbb6cab24c2b29fsewardj 10396c299f3acab617581ea504e45fbb6cab24c2b29fsewardjextern void genSpill_ARM ( /*OUT*/HInstr** i1, /*OUT*/HInstr** i2, 10406c299f3acab617581ea504e45fbb6cab24c2b29fsewardj HReg rreg, Int offset, Bool ); 10416c299f3acab617581ea504e45fbb6cab24c2b29fsewardjextern void genReload_ARM ( /*OUT*/HInstr** i1, /*OUT*/HInstr** i2, 10426c299f3acab617581ea504e45fbb6cab24c2b29fsewardj HReg rreg, Int offset, Bool ); 10436c299f3acab617581ea504e45fbb6cab24c2b29fsewardj 1044a5b502299bfc9d97f4c2c9f61cdc1a0a65e1da61sewardjextern const RRegUniverse* getRRegUniverse_ARM ( void ); 1045a5b502299bfc9d97f4c2c9f61cdc1a0a65e1da61sewardj 1046cacba8e675988fbf21b08feea1f317a9c896c053florianextern HInstrArray* iselSB_ARM ( const IRSB*, 1047c6f970f1fadb640d69c78ac2669efab5c08f1e8dsewardj VexArch, 1048d8c64e082224b2e688abdef9219cc76fd82b373bflorian const VexArchInfo*, 1049d8c64e082224b2e688abdef9219cc76fd82b373bflorian const VexAbiInfo*, 1050c6f970f1fadb640d69c78ac2669efab5c08f1e8dsewardj Int offs_Host_EvC_Counter, 1051c6f970f1fadb640d69c78ac2669efab5c08f1e8dsewardj Int offs_Host_EvC_FailAddr, 1052c6f970f1fadb640d69c78ac2669efab5c08f1e8dsewardj Bool chainingAllowed, 1053c6f970f1fadb640d69c78ac2669efab5c08f1e8dsewardj Bool addProfInc, 1054dcd6d236c9aef7d4c84369d4c51f6b92ac910127florian Addr max_ga ); 1055c6f970f1fadb640d69c78ac2669efab5c08f1e8dsewardj 1056c6f970f1fadb640d69c78ac2669efab5c08f1e8dsewardj/* How big is an event check? This is kind of a kludge because it 1057c6f970f1fadb640d69c78ac2669efab5c08f1e8dsewardj depends on the offsets of host_EvC_FAILADDR and 1058c6f970f1fadb640d69c78ac2669efab5c08f1e8dsewardj host_EvC_COUNTER. */ 10597ce2cc883c5b36586babec833838951ecf9f2a76florianextern Int evCheckSzB_ARM (void); 1060c6f970f1fadb640d69c78ac2669efab5c08f1e8dsewardj 1061c6f970f1fadb640d69c78ac2669efab5c08f1e8dsewardj/* Perform a chaining and unchaining of an XDirect jump. */ 10629b76916dcc1628e133d57db001563429c6e3a590sewardjextern VexInvalRange chainXDirect_ARM ( VexEndness endness_host, 10639b76916dcc1628e133d57db001563429c6e3a590sewardj void* place_to_chain, 10647d6f81de12e6d8deb3e119ab318f361d97a10a65florian const void* disp_cp_chain_me_EXPECTED, 10657d6f81de12e6d8deb3e119ab318f361d97a10a65florian const void* place_to_jump_to ); 1066c6f970f1fadb640d69c78ac2669efab5c08f1e8dsewardj 10679b76916dcc1628e133d57db001563429c6e3a590sewardjextern VexInvalRange unchainXDirect_ARM ( VexEndness endness_host, 10689b76916dcc1628e133d57db001563429c6e3a590sewardj void* place_to_unchain, 10697d6f81de12e6d8deb3e119ab318f361d97a10a65florian const void* place_to_jump_to_EXPECTED, 10707d6f81de12e6d8deb3e119ab318f361d97a10a65florian const void* disp_cp_chain_me ); 1071c6f970f1fadb640d69c78ac2669efab5c08f1e8dsewardj 1072c6f970f1fadb640d69c78ac2669efab5c08f1e8dsewardj/* Patch the counter location into an existing ProfInc point. */ 10739b76916dcc1628e133d57db001563429c6e3a590sewardjextern VexInvalRange patchProfInc_ARM ( VexEndness endness_host, 10749b76916dcc1628e133d57db001563429c6e3a590sewardj void* place_to_patch, 10757d6f81de12e6d8deb3e119ab318f361d97a10a65florian const ULong* location_of_counter ); 1076c6f970f1fadb640d69c78ac2669efab5c08f1e8dsewardj 10770578287155cb60143bcf70fdf5e1c2beb0b92c07cerion 1078cef7d3e3df4796e35b4521158d9dc058f034aa87sewardj#endif /* ndef __VEX_HOST_ARM_DEFS_H */ 10790578287155cb60143bcf70fdf5e1c2beb0b92c07cerion 10800578287155cb60143bcf70fdf5e1c2beb0b92c07cerion/*---------------------------------------------------------------*/ 1081cef7d3e3df4796e35b4521158d9dc058f034aa87sewardj/*--- end host_arm_defs.h ---*/ 10820578287155cb60143bcf70fdf5e1c2beb0b92c07cerion/*---------------------------------------------------------------*/ 1083