Lines Matching refs:Data

287    Command bytes can not be written to Data Register unless RQM is 1 and DIO is 0.

288 Result bytes can not be read from Data Register unless RQM is 1 and DIO is 1.
358 UINT8 Data;
370 Data = IoRead8 ((UINT16) (PcdGet16 (PcdFdcBaseAddress) + FDC_REGISTER_DTR));
372 *Pointer = Data;
393 UINT8 Data;
405 Data = *Pointer;
406 IoWrite8 ((UINT16) (PcdGet16 (PcdFdcBaseAddress) + FDC_REGISTER_DTR), Data);
561 UINT8 Data;
578 Data = 0x0;
579 Data = (UINT8) (Data | (SELECT_DRV & DevPos));
580 IoWrite8 ((UINT16) (PcdGet16 (PcdFdcBaseAddress) + FDC_REGISTER_DOR), Data);
591 Data |= 0x0C;
592 IoWrite8 ((UINT16) (PcdGet16 (PcdFdcBaseAddress) + FDC_REGISTER_DOR), Data);
603 // Set the Transfer Data Rate
644 UINT8 Data;
673 Data = 0x0C;
674 Data = (UINT8) (Data | (SELECT_DRV & DevPos));
676 Data |= DRVA_MOTOR_ON;
678 Data |= DRVB_MOTOR_ON;
686 IoWrite8 ((UINT16) (PcdGet16 (PcdFdcBaseAddress) + FDC_REGISTER_DOR), Data);
707 UINT8 Data;
718 Data = 0x0C;
719 Data = (UINT8) (Data | (SELECT_DRV & DevPos));
721 IoWrite8 ((UINT16) (PcdGet16 (PcdFdcBaseAddress) + FDC_REGISTER_DOR), Data);
942 UINT8 Data;
947 Data = IoRead8 ((UINT16) (PcdGet16 (PcdFdcBaseAddress) + FDC_REGISTER_DIR));
951 if ((Data & DIR_DCL) == DIR_DCL) {
965 Data = IoRead8 ((UINT16) (PcdGet16 (PcdFdcBaseAddress) + FDC_REGISTER_DIR));
969 if ((Data & DIR_DCL) == DIR_DCL) {
1256 UINT8 Data;
1277 Data = (UINT8) (UINTN) Buffer;
1278 IoWrite8 (R_8237_DMA_BASE_CA_CH2, Data);
1279 Data = (UINT8) ((UINTN) Buffer >> 8);
1280 IoWrite8 (R_8237_DMA_BASE_CA_CH2, Data);
1282 Data = (UINT8) ((UINTN) Buffer >> 16);
1283 IoWrite8 (R_8237_DMA_MEM_LP_CH2, Data);
1289 Data = (UINT8) (Count & 0xff);
1290 IoWrite8 (R_8237_DMA_BASE_CC_CH2, Data);
1291 Data = (UINT8) (Count >> 8);
1292 IoWrite8 (R_8237_DMA_BASE_CC_CH2, Data);
1355 @retval EFI_SUCCESS Data successfully read out.