Lines Matching refs:__v64qi
39 return (__m512i)(__v64qi){ 0, 0, 0, 0, 0, 0, 0, 0,
61 return (__mmask64)__builtin_ia32_pcmpeqb512_mask((__v64qi)__a, (__v64qi)__b,
67 return (__mmask64)__builtin_ia32_pcmpeqb512_mask((__v64qi)__a, (__v64qi)__b,
73 return (__mmask64)__builtin_ia32_ucmpb512_mask((__v64qi)__a, (__v64qi)__b, 0,
79 return (__mmask64)__builtin_ia32_ucmpb512_mask((__v64qi)__a, (__v64qi)__b, 0,
109 return (__mmask64)__builtin_ia32_cmpb512_mask((__v64qi)__a, (__v64qi)__b, 5,
115 return (__mmask64)__builtin_ia32_cmpb512_mask((__v64qi)__a, (__v64qi)__b, 5,
121 return (__mmask64)__builtin_ia32_ucmpb512_mask((__v64qi)__a, (__v64qi)__b, 5,
127 return (__mmask64)__builtin_ia32_ucmpb512_mask((__v64qi)__a, (__v64qi)__b, 5,
157 return (__mmask64)__builtin_ia32_pcmpgtb512_mask((__v64qi)__a, (__v64qi)__b,
163 return (__mmask64)__builtin_ia32_pcmpgtb512_mask((__v64qi)__a, (__v64qi)__b,
169 return (__mmask64)__builtin_ia32_ucmpb512_mask((__v64qi)__a, (__v64qi)__b, 6,
175 return (__mmask64)__builtin_ia32_ucmpb512_mask((__v64qi)__a, (__v64qi)__b, 6,
205 return (__mmask64)__builtin_ia32_cmpb512_mask((__v64qi)__a, (__v64qi)__b, 2,
211 return (__mmask64)__builtin_ia32_cmpb512_mask((__v64qi)__a, (__v64qi)__b, 2,
217 return (__mmask64)__builtin_ia32_ucmpb512_mask((__v64qi)__a, (__v64qi)__b, 2,
223 return (__mmask64)__builtin_ia32_ucmpb512_mask((__v64qi)__a, (__v64qi)__b, 2,
253 return (__mmask64)__builtin_ia32_cmpb512_mask((__v64qi)__a, (__v64qi)__b, 1,
259 return (__mmask64)__builtin_ia32_cmpb512_mask((__v64qi)__a, (__v64qi)__b, 1,
265 return (__mmask64)__builtin_ia32_ucmpb512_mask((__v64qi)__a, (__v64qi)__b, 1,
271 return (__mmask64)__builtin_ia32_ucmpb512_mask((__v64qi)__a, (__v64qi)__b, 1,
301 return (__mmask64)__builtin_ia32_cmpb512_mask((__v64qi)__a, (__v64qi)__b, 4,
307 return (__mmask64)__builtin_ia32_cmpb512_mask((__v64qi)__a, (__v64qi)__b, 4,
313 return (__mmask64)__builtin_ia32_ucmpb512_mask((__v64qi)__a, (__v64qi)__b, 4,
319 return (__mmask64)__builtin_ia32_ucmpb512_mask((__v64qi)__a, (__v64qi)__b, 4,
354 return (__m512i) __builtin_ia32_paddb512_mask ((__v64qi) __A,
355 (__v64qi) __B,
356 (__v64qi) __W,
362 return (__m512i) __builtin_ia32_paddb512_mask ((__v64qi) __A,
363 (__v64qi) __B,
364 (__v64qi) _mm512_setzero_qi(),
375 return (__m512i) __builtin_ia32_psubb512_mask ((__v64qi) __A,
376 (__v64qi) __B,
377 (__v64qi) __W,
383 return (__m512i) __builtin_ia32_psubb512_mask ((__v64qi) __A,
384 (__v64qi) __B,
385 (__v64qi) _mm512_setzero_qi(),
456 (__v64qi) __W,
457 (__v64qi) __A);
471 return (__m512i) __builtin_ia32_pabsb512_mask ((__v64qi) __A,
472 (__v64qi) _mm512_setzero_qi(),
479 return (__m512i) __builtin_ia32_pabsb512_mask ((__v64qi) __A,
480 (__v64qi) __W,
487 return (__m512i) __builtin_ia32_pabsb512_mask ((__v64qi) __A,
488 (__v64qi) _mm512_setzero_qi(),
549 (__v64qi) _mm512_setzero_qi(),
559 (__v64qi) __W,
568 (__v64qi) _mm512_setzero_qi(),
605 (__v64qi) _mm512_setzero_qi(),
615 (__v64qi) __W,
624 (__v64qi) _mm512_setzero_qi(),
631 return (__m512i) __builtin_ia32_paddsb512_mask ((__v64qi) __A,
632 (__v64qi) __B,
633 (__v64qi) _mm512_setzero_qi(),
641 return (__m512i) __builtin_ia32_paddsb512_mask ((__v64qi) __A,
642 (__v64qi) __B,
643 (__v64qi) __W,
650 return (__m512i) __builtin_ia32_paddsb512_mask ((__v64qi) __A,
651 (__v64qi) __B,
652 (__v64qi) _mm512_setzero_qi(),
687 return (__m512i) __builtin_ia32_paddusb512_mask ((__v64qi) __A,
688 (__v64qi) __B,
689 (__v64qi) _mm512_setzero_qi(),
697 return (__m512i) __builtin_ia32_paddusb512_mask ((__v64qi) __A,
698 (__v64qi) __B,
699 (__v64qi) __W,
706 return (__m512i) __builtin_ia32_paddusb512_mask ((__v64qi) __A,
707 (__v64qi) __B,
708 (__v64qi) _mm512_setzero_qi(),
743 return (__m512i) __builtin_ia32_pavgb512_mask ((__v64qi) __A,
744 (__v64qi) __B,
745 (__v64qi) _mm512_setzero_qi(),
753 return (__m512i) __builtin_ia32_pavgb512_mask ((__v64qi) __A,
754 (__v64qi) __B,
755 (__v64qi) __W,
762 return (__m512i) __builtin_ia32_pavgb512_mask ((__v64qi) __A,
763 (__v64qi) __B,
764 (__v64qi) _mm512_setzero_qi(),
799 return (__m512i) __builtin_ia32_pmaxsb512_mask ((__v64qi) __A,
800 (__v64qi) __B,
801 (__v64qi) _mm512_setzero_qi(),
808 return (__m512i) __builtin_ia32_pmaxsb512_mask ((__v64qi) __A,
809 (__v64qi) __B,
810 (__v64qi) _mm512_setzero_qi(),
818 return (__m512i) __builtin_ia32_pmaxsb512_mask ((__v64qi) __A,
819 (__v64qi) __B,
820 (__v64qi) __W,
855 return (__m512i) __builtin_ia32_pmaxub512_mask ((__v64qi) __A,
856 (__v64qi) __B,
857 (__v64qi) _mm512_setzero_qi(),
864 return (__m512i) __builtin_ia32_pmaxub512_mask ((__v64qi) __A,
865 (__v64qi) __B,
866 (__v64qi) _mm512_setzero_qi(),
874 return (__m512i) __builtin_ia32_pmaxub512_mask ((__v64qi) __A,
875 (__v64qi) __B,
876 (__v64qi) __W,
911 return (__m512i) __builtin_ia32_pminsb512_mask ((__v64qi) __A,
912 (__v64qi) __B,
913 (__v64qi) _mm512_setzero_qi(),
920 return (__m512i) __builtin_ia32_pminsb512_mask ((__v64qi) __A,
921 (__v64qi) __B,
922 (__v64qi) _mm512_setzero_qi(),
930 return (__m512i) __builtin_ia32_pminsb512_mask ((__v64qi) __A,
931 (__v64qi) __B,
932 (__v64qi) __W,
967 return (__m512i) __builtin_ia32_pminub512_mask ((__v64qi) __A,
968 (__v64qi) __B,
969 (__v64qi) _mm512_setzero_qi(),
976 return (__m512i) __builtin_ia32_pminub512_mask ((__v64qi) __A,
977 (__v64qi) __B,
978 (__v64qi) _mm512_setzero_qi(),
986 return (__m512i) __builtin_ia32_pminub512_mask ((__v64qi) __A,
987 (__v64qi) __B,
988 (__v64qi) __W,
1023 return (__m512i) __builtin_ia32_pshufb512_mask ((__v64qi) __A,
1024 (__v64qi) __B,
1025 (__v64qi) _mm512_setzero_qi(),
1033 return (__m512i) __builtin_ia32_pshufb512_mask ((__v64qi) __A,
1034 (__v64qi) __B,
1035 (__v64qi) __W,
1042 return (__m512i) __builtin_ia32_pshufb512_mask ((__v64qi) __A,
1043 (__v64qi) __B,
1044 (__v64qi) _mm512_setzero_qi(),
1051 return (__m512i) __builtin_ia32_psubsb512_mask ((__v64qi) __A,
1052 (__v64qi) __B,
1053 (__v64qi) _mm512_setzero_qi(),
1061 return (__m512i) __builtin_ia32_psubsb512_mask ((__v64qi) __A,
1062 (__v64qi) __B,
1063 (__v64qi) __W,
1070 return (__m512i) __builtin_ia32_psubsb512_mask ((__v64qi) __A,
1071 (__v64qi) __B,
1072 (__v64qi) _mm512_setzero_qi(),
1107 return (__m512i) __builtin_ia32_psubusb512_mask ((__v64qi) __A,
1108 (__v64qi) __B,
1109 (__v64qi) _mm512_setzero_qi(),
1117 return (__m512i) __builtin_ia32_psubusb512_mask ((__v64qi) __A,
1118 (__v64qi) __B,
1119 (__v64qi) __W,
1126 return (__m512i) __builtin_ia32_psubusb512_mask ((__v64qi) __A,
1127 (__v64qi) __B,
1128 (__v64qi) _mm512_setzero_qi(),
1286 return (__m512i) __builtin_ia32_pmaddubsw512_mask ((__v64qi) __X,
1287 (__v64qi) __Y,
1295 return (__m512i) __builtin_ia32_pmaddubsw512_mask ((__v64qi) __X,
1296 (__v64qi) __Y,
1303 return (__m512i) __builtin_ia32_pmaddubsw512_mask ((__v64qi) __X,
1304 (__v64qi) __Y,
1417 return (__m512i)__builtin_shufflevector((__v64qi)__A, (__v64qi)__B,
1439 (__v64qi)_mm512_unpackhi_epi8(__A, __B),
1440 (__v64qi)__W);
1446 (__v64qi)_mm512_unpackhi_epi8(__A, __B),
1447 (__v64qi)_mm512_setzero_qi());
1479 return (__m512i)__builtin_shufflevector((__v64qi)__A, (__v64qi)__B,
1501 (__v64qi)_mm512_unpacklo_epi8(__A, __B),
1502 (__v64qi)__W);
1508 (__v64qi)_mm512_unpacklo_epi8(__A, __B),
1509 (__v64qi)_mm512_setzero_qi());
1593 (__mmask64)__builtin_ia32_cmpb512_mask((__v64qi)(__m512i)(a), \
1594 (__v64qi)(__m512i)(b), (int)(p), \
1598 (__mmask64)__builtin_ia32_cmpb512_mask((__v64qi)(__m512i)(a), \
1599 (__v64qi)(__m512i)(b), (int)(p), \
1603 (__mmask64)__builtin_ia32_ucmpb512_mask((__v64qi)(__m512i)(a), \
1604 (__v64qi)(__m512i)(b), (int)(p), \
1608 (__mmask64)__builtin_ia32_ucmpb512_mask((__v64qi)(__m512i)(a), \
1609 (__v64qi)(__m512i)(b), (int)(p), \
1783 (__v64qi)_mm512_setzero_si512(), \
1784 (__v64qi)(__m512i)(a), \
2003 (__v64qi)(__m512i)(a), \
2004 (__v64qi)_mm512_setzero_si512(), \
2090 (__v64qi) __A,
2091 (__v64qi) __W);
2098 (__v64qi) __A,
2099 (__v64qi) _mm512_setzero_hi ());
2106 (__v64qi) __O,
2114 (__v64qi)
2153 return (__m512i) __builtin_ia32_loaddquqi512_mask ((__v64qi *) __P,
2154 (__v64qi) __W,
2161 return (__m512i) __builtin_ia32_loaddquqi512_mask ((__v64qi *) __P,
2162 (__v64qi)
2177 __builtin_ia32_storedquqi512_mask ((__v64qi *) __P,
2178 (__v64qi) __A,
2185 return (__mmask64) __builtin_ia32_ptestmb512 ((__v64qi) __A,
2186 (__v64qi) __B,
2193 return (__mmask64) __builtin_ia32_ptestmb512 ((__v64qi) __A,
2194 (__v64qi) __B, __U);
2215 return (__mmask64) __builtin_ia32_ptestnmb512 ((__v64qi) __A,
2216 (__v64qi) __B,
2223 return (__mmask64) __builtin_ia32_ptestnmb512 ((__v64qi) __A,
2224 (__v64qi) __B, __U);
2245 return (__mmask64) __builtin_ia32_cvtb2mask512 ((__v64qi) __A);
2281 (__v64qi) _mm512_broadcastb_epi8(__A),
2282 (__v64qi) __O);
2289 (__v64qi) _mm512_broadcastb_epi8(__A),
2290 (__v64qi) _mm512_setzero_si512());
2364 (__m512i)__builtin_ia32_palignr512_mask((__v64qi)(__m512i)(A), \
2365 (__v64qi)(__m512i)(B), (int)(N), \
2366 (__v64qi)_mm512_undefined_pd(), \
2370 (__m512i)__builtin_ia32_palignr512_mask((__v64qi)(__m512i)(A), \
2371 (__v64qi)(__m512i)(B), (int)(N), \
2372 (__v64qi)(__m512i)(W), \
2376 (__m512i)__builtin_ia32_palignr512_mask((__v64qi)(__m512i)(A), \
2377 (__v64qi)(__m512i)(B), (int)(N), \
2378 (__v64qi)_mm512_setzero_si512(), \
2382 (__m512i)__builtin_ia32_dbpsadbw512_mask((__v64qi)(__m512i)(A), \
2383 (__v64qi)(__m512i)(B), (int)(imm), \
2388 (__m512i)__builtin_ia32_dbpsadbw512_mask((__v64qi)(__m512i)(A), \
2389 (__v64qi)(__m512i)(B), (int)(imm), \
2394 (__m512i)__builtin_ia32_dbpsadbw512_mask((__v64qi)(__m512i)(A), \
2395 (__v64qi)(__m512i)(B), (int)(imm), \
2402 return (__m512i) __builtin_ia32_psadbw512 ((__v64qi) __A,
2403 (__v64qi) __B);