Cross Reference: /external/llvm/lib/Target/AMDGPU/R600ISelLowering.cpp

Lines Matching refs:R600TargetLowering
33 R600TargetLowering::R600TargetLowering(const TargetMachine &TM,
202 const R600Subtarget *R600TargetLowering::getSubtarget() const {
211 R600TargetLowering::EmitInstrWithCustomInserter(MachineInstr &MI,
612 SDValue R600TargetLowering::LowerOperation(SDValue Op, SelectionDAG &DAG) const {
828 void R600TargetLowering::ReplaceNodeResults(SDNode *N,
864 SDValue R600TargetLowering::vectorToVerticalVector(SelectionDAG &DAG,
882 SDValue R600TargetLowering::LowerEXTRACT_VECTOR_ELT(SDValue Op,
898 SDValue R600TargetLowering::LowerINSERT_VECTOR_ELT(SDValue Op,
915 SDValue R600TargetLowering::LowerGlobalAddress(AMDGPUMachineFunction *MFI,
931 SDValue R600TargetLowering::LowerTrig(SDValue Op, SelectionDAG &DAG) const {
965 SDValue R600TargetLowering::LowerSHLParts(SDValue Op, SelectionDAG &DAG) const {
1001 SDValue R600TargetLowering::LowerSRXParts(SDValue Op, SelectionDAG &DAG) const {
1039 SDValue R600TargetLowering::LowerUADDSUBO(SDValue Op, SelectionDAG &DAG,
1057 SDValue R600TargetLowering::LowerFPTOUINT(SDValue Op, SelectionDAG &DAG) const {
1068 SDValue R600TargetLowering::LowerImplicitParameter(SelectionDAG &DAG, EVT VT,
1084 bool R600TargetLowering::isZero(SDValue Op) const {
1094 bool R600TargetLowering::isHWTrueValue(SDValue Op) const {
1101 bool R600TargetLowering::isHWFalseValue(SDValue Op) const {
1108 SDValue R600TargetLowering::LowerSELECT_CC(SDValue Op, SelectionDAG &DAG) const {
1255 SDValue R600TargetLowering::stackPtrToRegIndex(SDValue Ptr,
1277 void R600TargetLowering::getStackAddress(unsigned StackWidth,
1306 SDValue R600TargetLowering::lowerPrivateTruncStore(StoreSDNode *Store,
1354 SDValue R600TargetLowering::LowerSTORE(SDValue Op, SelectionDAG &DAG) const {
1509 SDValue R600TargetLowering::lowerPrivateExtLoad(SDValue Op,
1565 SDValue R600TargetLowering::LowerLOAD(SDValue Op, SelectionDAG &DAG) const {
1709 SDValue R600TargetLowering::LowerBRCOND(SDValue Op, SelectionDAG &DAG) const {
1718 SDValue R600TargetLowering::lowerFrameIndex(SDValue Op,
1736 SDValue R600TargetLowering::LowerFormalArguments(
1810 EVT R600TargetLowering::getSetCCResultType(const DataLayout &DL, LLVMContext &,
1817 bool R600TargetLowering::allowsMisalignedMemoryAccesses(EVT VT,
1918 SDValue R600TargetLowering::OptimizeSwizzle(SDValue BuildVector, SDValue Swz[4],
1948 SDValue R600TargetLowering::PerformDAGCombine(SDNode *N,
2169 bool R600TargetLowering::FoldOperand(SDNode *ParentNode, unsigned SrcIdx,
2302 SDNode *R600TargetLowering::PostISelFolding(MachineSDNode *Node,