Lines Matching refs:bc

36 static inline unsigned int r600_bytecode_get_num_operands(struct r600_bytecode *bc, struct r600_bytecode_alu *alu)
41 switch (bc->chip_class) {
212 int r700_bytecode_alu_build(struct r600_bytecode *bc, struct r600_bytecode_alu *alu, unsigned id);
257 void r600_bytecode_init(struct r600_bytecode *bc, enum chip_class chip_class, enum radeon_family family)
261 bc->ar_handling = AR_HANDLE_RV6XX;
262 bc->r6xx_nop_after_rel_dst = 1;
264 bc->ar_handling = AR_HANDLE_NORMAL;
265 bc->r6xx_nop_after_rel_dst = 0;
268 LIST_INITHEAD(&bc->cf);
269 bc->chip_class = chip_class;
272 static int r600_bytecode_add_cf(struct r600_bytecode *bc)
278 LIST_ADDTAIL(&cf->list, &bc->cf);
279 if (bc->cf_last) {
280 cf->id = bc->cf_last->id + 2;
281 if (bc->cf_last->eg_alu_extended) {
284 bc->ndw += 2;
287 bc->cf_last = cf;
288 bc->ncf++;
289 bc->ndw += 2;
290 bc->force_add_cf = 0;
291 bc->ar_loaded = 0;
295 int r600_bytecode_add_output(struct r600_bytecode *bc, const struct r600_bytecode_output *output)
299 if (output->gpr >= bc->ngpr)
300 bc->ngpr = output->gpr + 1;
302 if (bc->cf_last && (bc->cf_last->inst == output->inst ||
303 (bc->cf_last->inst == BC_INST(bc, V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_EXPORT) &&
304 output->inst == BC_INST(bc, V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_EXPORT_DONE))) &&
305 output->type == bc->cf_last->output.type &&
306 output->elem_size == bc->cf_last->output.elem_size &&
307 output->swizzle_x == bc->cf_last->output.swizzle_x &&
308 output->swizzle_y == bc->cf_last->output.swizzle_y &&
309 output->swizzle_z == bc->cf_last->output.swizzle_z &&
310 output->swizzle_w == bc->cf_last->output.swizzle_w &&
311 (output->burst_count + bc->cf_last->output.burst_count) <= 16) {
313 if ((output->gpr + output->burst_count) == bc->cf_last->output.gpr &&
314 (output->array_base + output->burst_count) == bc->cf_last->output.array_base) {
316 bc->cf_last->output.end_of_program |= output->end_of_program;
317 bc->cf_last->output.inst = output->inst;
318 bc->cf_last->output.gpr = output->gpr;
319 bc->cf_last->output.array_base = output->array_base;
320 bc->cf_last->output.burst_count += output->burst_count;
323 } else if (output->gpr == (bc->cf_last->output.gpr + bc->cf_last->output.burst_count) &&
324 output->array_base == (bc->cf_last->output.array_base + bc->cf_last->output.burst_count)) {
326 bc->cf_last->output.end_of_program |= output->end_of_program;
327 bc->cf_last->output.inst = output->inst;
328 bc->cf_last->output.burst_count += output->burst_count;
333 r = r600_bytecode_add_cf(bc);
336 bc->cf_last->inst = output->inst;
337 memcpy(&bc->cf_last->output, output, sizeof(struct r600_bytecode_output));
342 static int is_alu_once_inst(struct r600_bytecode *bc, struct r600_bytecode_alu *alu)
344 switch (bc->chip_class) {
423 static int is_alu_reduction_inst(struct r600_bytecode *bc, struct r600_bytecode_alu *alu)
425 switch (bc->chip_class) {
444 static int is_alu_cube_inst(struct r600_bytecode *bc, struct r600_bytecode_alu *alu)
446 switch (bc->chip_class) {
459 static int is_alu_mova_inst(struct r600_bytecode *bc, struct r600_bytecode_alu *alu)
461 switch (bc->chip_class) {
493 static int is_alu_vec_unit_inst(struct r600_bytecode *bc, struct r600_bytecode_alu *alu)
495 switch (bc->chip_class) {
548 static int is_alu_trans_unit_inst(struct r600_bytecode *bc, struct r600_bytecode_alu *alu)
551 switch (bc->chip_class) {
584 static int is_alu_any_unit_inst(struct r600_bytecode *bc, struct r600_bytecode_alu *alu)
586 return !is_alu_vec_unit_inst(bc, alu) &&
587 !is_alu_trans_unit_inst(bc, alu);
590 static int is_nop_inst(struct r600_bytecode *bc, struct r600_bytecode_alu *alu)
592 switch (bc->chip_class) {
603 static int assign_alu_units(struct r600_bytecode *bc, struct r600_bytecode_alu *alu_first,
608 int max_slots = bc->chip_class == CAYMAN ? 4 : 5;
617 else if (is_alu_trans_unit_inst(bc, alu))
619 else if (is_alu_vec_unit_inst(bc, alu))
692 static int reserve_cfile(struct r600_bytecode *bc, struct alu_bank_swizzle *bs, unsigned sel, unsigned chan)
695 if (bc->chip_class >= R700) {
734 static int check_vector(struct r600_bytecode *bc, struct r600_bytecode_alu *alu,
739 num_src = r600_bytecode_get_num_operands(bc, alu);
755 r = reserve_cfile(bc, bs, (alu->src[src].kc_bank<<16) + sel, elem);
764 static int check_scalar(struct r600_bytecode *bc, struct r600_bytecode_alu *alu,
769 num_src = r600_bytecode_get_num_operands(bc, alu);
782 r = reserve_cfile(bc, bs, (alu->src[src].kc_bank<<16) + sel, elem);
810 static int check_and_set_bank_swizzle(struct r600_bytecode *bc,
816 boolean scalar_only = bc->chip_class == CAYMAN ? false : true;
817 int max_slots = bc->chip_class == CAYMAN ? 4 : 5;
855 r = check_vector(bc, slots[i], &bs, bank_swizzle[i]);
864 r = check_scalar(bc, slots[4], &bs, bank_swizzle[4]);
893 static int replace_gpr_with_pv_ps(struct r600_bytecode *bc,
899 int max_slots = bc->chip_class == CAYMAN ? 4 : 5;
901 r = assign_alu_units(bc, alu_prev, prev);
909 if (!is_alu_cube_inst(bc, prev[i]) && is_alu_reduction_inst(bc, prev[i]))
922 num_src = r600_bytecode_get_num_operands(bc, alu);
927 if (bc->chip_class < CAYMAN) {
985 static int r600_bytecode_alu_nliterals(struct r600_bytecode *bc, struct r600_bytecode_alu *alu,
988 unsigned num_src = r600_bytecode_get_num_operands(bc, alu);
1011 static void r600_bytecode_alu_adjust_literals(struct r600_bytecode *bc,
1015 unsigned num_src = r600_bytecode_get_num_operands(bc, alu);
1031 static int merge_inst_groups(struct r600_bytecode *bc, struct r600_bytecode_alu *slots[5],
1043 int max_slots = bc->chip_class == CAYMAN ? 4 : 5;
1045 r = assign_alu_units(bc, alu_prev, prev);
1053 if (is_alu_once_inst(bc, prev[i]))
1059 if (is_alu_once_inst(bc, slots[i]))
1072 if (r600_bytecode_alu_nliterals(bc, prev[i], literal, &nliteral))
1074 if (r600_bytecode_alu_nliterals(bc, prev[i], prev_literal, &prev_nliteral))
1076 if (is_alu_mova_inst(bc, prev[i])) {
1081 num_once_inst += is_alu_once_inst(bc, prev[i]);
1083 if (slots[i] && r600_bytecode_alu_nliterals(bc, slots[i], literal, &nliteral))
1093 if (is_alu_any_unit_inst(bc, slots[i])) {
1096 } else if (is_alu_any_unit_inst(bc, prev[i])) {
1122 num_once_inst += is_alu_once_inst(bc, alu);
1125 if (is_nop_inst(bc, alu))
1136 num_src = r600_bytecode_get_num_operands(bc, alu);
1166 r = check_and_set_bank_swizzle(bc, result);
1173 bc->cf_last->ndw -= align(prev_nliteral, 2);
1181 LIST_ADDTAIL(&result[i]->list, &bc->cf_last->alu);
1186 LIST_ENTRY(struct r600_bytecode_alu, bc->cf_last->alu.prev, list)->last = 1;
1191 bc->cf_last->curr_bs_head = result[i];
1196 bc->cf_last->prev_bs_head = bc->cf_last->prev2_bs_head;
1197 bc->cf_last->prev2_bs_head = NULL;
1203 static int r600_bytecode_alloc_kcache_line(struct r600_bytecode *bc,
1207 int i, kcache_banks = bc->chip_class >= EVERGREEN ? 4 : 2;
1263 static int r600_bytecode_alloc_inst_kcache_lines(struct r600_bytecode *bc,
1278 if ((r = r600_bytecode_alloc_kcache_line(bc, kcache, bank, line)))
1284 static int r600_bytecode_assign_kcache_banks(struct r600_bytecode *bc,
1321 static int r600_bytecode_alloc_kcache_lines(struct r600_bytecode *bc, struct r600_bytecode_alu *alu, int type)
1327 memcpy(kcache, bc->cf_last->kcache, 4 * sizeof(struct r600_bytecode_kcache));
1329 if ((r = r600_bytecode_alloc_inst_kcache_lines(bc, kcache, alu))) {
1331 if ((r = r600_bytecode_add_cf(bc))) {
1334 bc->cf_last->inst = type;
1337 kcache = bc->cf_last->kcache;
1338 if ((r = r600_bytecode_alloc_inst_kcache_lines(bc, kcache, alu))) {
1344 memcpy(bc->cf_last->kcache, kcache, 4 * sizeof(struct r600_bytecode_kcache));
1349 if (bc->chip_class < EVERGREEN)
1351 bc->cf_last->eg_alu_extended = 1;
1357 static int insert_nop_r6xx(struct r600_bytecode *bc)
1368 r = r600_bytecode_add_alu(bc, &alu);
1375 /* load AR register from gpr (bc->ar_reg) with MOVA_INT */
1376 static int load_ar_r6xx(struct r600_bytecode *bc)
1381 if (bc->ar_loaded)
1385 if ((bc->cf_last->ndw>>1) >= 110)
1386 bc->force_add_cf = 1;
1390 alu.src[0].sel = bc->ar_reg;
1393 r = r600_bytecode_add_alu(bc, &alu);
1398 bc->ar_loaded = 1;
1402 /* load AR register from gpr (bc->ar_reg) with MOVA_INT */
1403 static int load_ar(struct r600_bytecode *bc)
1408 if (bc->ar_handling)
1409 return load_ar_r6xx(bc);
1411 if (bc->ar_loaded)
1415 if ((bc->cf_last->ndw>>1) >= 110)
1416 bc->force_add_cf = 1;
1419 alu.inst = BC_INST(bc, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MOVA_INT);
1420 alu.src[0].sel = bc->ar_reg;
1422 r = r600_bytecode_add_alu(bc, &alu);
1426 bc->cf_last->r6xx_uses_waterfall = 1;
1427 bc->ar_loaded = 1;
1431 int r600_bytecode_add_alu_type(struct r600_bytecode *bc, const struct r600_bytecode_alu *alu, int type)
1441 if (bc->cf_last != NULL && bc->cf_last->inst != type) {
1443 if (bc->cf_last->inst == BC_INST(bc, V_SQ_CF_ALU_WORD1_SQ_CF_INST_ALU) &&
1444 type == BC_INST(bc, V_SQ_CF_ALU_WORD1_SQ_CF_INST_ALU_PUSH_BEFORE)) {
1445 LIST_FOR_EACH_ENTRY(lalu, &bc->cf_last->alu, list) {
1447 bc->force_add_cf = 1;
1452 bc->force_add_cf = 1;
1456 if (bc->cf_last == NULL || bc->force_add_cf) {
1457 r = r600_bytecode_add_cf(bc);
1463 bc->cf_last->inst = type;
1467 if (nalu->src[i].rel && !bc->ar_loaded)
1468 load_ar(bc);
1470 if (nalu->dst.rel && !bc->ar_loaded)
1471 load_ar(bc);
1475 if ((r = r600_bytecode_alloc_kcache_lines(bc, nalu, type))) {
1480 if (!bc->cf_last->curr_bs_head) {
1481 bc->cf_last->curr_bs_head = nalu;
1485 if (nalu->src[i].sel >= bc->ngpr && nalu->src[i].sel < 128) {
1486 bc->ngpr = nalu->src[i].sel + 1;
1492 if (nalu->dst.sel >= bc->ngpr) {
1493 bc->ngpr = nalu->dst.sel + 1;
1495 LIST_ADDTAIL(&nalu->list, &bc->cf_last->alu);
1497 bc->cf_last->ndw += 2;
1498 bc->ndw += 2;
1505 int max_slots = bc->chip_class == CAYMAN ? 4 : 5;
1506 r = assign_alu_units(bc, bc->cf_last->curr_bs_head, slots);
1510 if (bc->cf_last->prev_bs_head) {
1511 r = merge_inst_groups(bc, slots, bc->cf_last->prev_bs_head);
1516 if (bc->cf_last->prev_bs_head) {
1517 r = replace_gpr_with_pv_ps(bc, slots, bc->cf_last->prev_bs_head);
1522 r = check_and_set_bank_swizzle(bc, slots);
1528 r = r600_bytecode_alu_nliterals(bc, slots[i], literal, &nliteral);
1533 bc->cf_last->ndw += align(nliteral, 2);
1537 if ((bc->cf_last->ndw >> 1) >= 120) {
1538 bc->force_add_cf = 1;
1541 bc->cf_last->prev2_bs_head = bc->cf_last->prev_bs_head;
1542 bc->cf_last->prev_bs_head = bc->cf_last->curr_bs_head;
1543 bc->cf_last->curr_bs_head = NULL;
1546 if (nalu->dst.rel && bc->r6xx_nop_after_rel_dst)
1547 insert_nop_r6xx(bc);
1552 int r600_bytecode_add_alu(struct r600_bytecode *bc, const struct r600_bytecode_alu *alu)
1554 return r600_bytecode_add_alu_type(bc, alu, BC_INST(bc, V_SQ_CF_ALU_WORD1_SQ_CF_INST_ALU));
1557 static unsigned r600_bytecode_num_tex_and_vtx_instructions(const struct r600_bytecode *bc)
1559 switch (bc->chip_class) {
1569 R600_ERR("Unknown chip class %d.\n", bc->chip_class);
1574 static inline boolean last_inst_was_not_vtx_fetch(struct r600_bytecode *bc)
1576 switch (bc->chip_class) {
1579 return bc->cf_last->inst != V_SQ_CF_WORD1_SQ_CF_INST_VTX &&
1580 bc->cf_last->inst != V_SQ_CF_WORD1_SQ_CF_INST_VTX_TC;
1582 return bc->cf_last->inst != EG_V_SQ_CF_WORD1_SQ_CF_INST_VTX;
1584 return bc->cf_last->inst != CM_V_SQ_CF_WORD1_SQ_CF_INST_TC;
1586 R600_ERR("Unknown chip class %d.\n", bc->chip_class);
1591 int r600_bytecode_add_vtx(struct r600_bytecode *bc, const struct r600_bytecode_vtx *vtx)
1601 if (bc->cf_last == NULL ||
1602 last_inst_was_not_vtx_fetch(bc) ||
1603 bc->force_add_cf) {
1604 r = r600_bytecode_add_cf(bc);
1609 switch (bc->chip_class) {
1612 bc->cf_last->inst = V_SQ_CF_WORD1_SQ_CF_INST_VTX;
1615 bc->cf_last->inst = EG_V_SQ_CF_WORD1_SQ_CF_INST_VTX;
1618 bc->cf_last->inst = CM_V_SQ_CF_WORD1_SQ_CF_INST_TC;
1621 R600_ERR("Unknown chip class %d.\n", bc->chip_class);
1625 LIST_ADDTAIL(&nvtx->list, &bc->cf_last->vtx);
1627 bc->cf_last->ndw += 4;
1628 bc->ndw += 4;
1629 if ((bc->cf_last->ndw / 4) >= r600_bytecode_num_tex_and_vtx_instructions(bc))
1630 bc->force_add_cf = 1;
1632 bc->ngpr = MAX2(bc->ngpr, vtx->src_gpr + 1);
1633 bc->ngpr = MAX2(bc->ngpr, vtx->dst_gpr + 1);
1638 int r600_bytecode_add_tex(struct r600_bytecode *bc, const struct r600_bytecode_tex *tex)
1648 if (bc->cf_last != NULL &&
1649 bc->cf_last->inst == BC_INST(bc, V_SQ_CF_WORD1_SQ_CF_INST_TEX)) {
1651 LIST_FOR_EACH_ENTRY(ttex, &bc->cf_last->tex, list) {
1653 bc->force_add_cf = 1;
1659 bc->force_add_cf = 1;
1663 if (bc->cf_last == NULL ||
1664 bc->cf_last->inst != BC_INST(bc, V_SQ_CF_WORD1_SQ_CF_INST_TEX) ||
1665 bc->force_add_cf) {
1666 r = r600_bytecode_add_cf(bc);
1671 bc->cf_last->inst = BC_INST(bc, V_SQ_CF_WORD1_SQ_CF_INST_TEX);
1673 if (ntex->src_gpr >= bc->ngpr) {
1674 bc->ngpr = ntex->src_gpr + 1;
1676 if (ntex->dst_gpr >= bc->ngpr) {
1677 bc->ngpr = ntex->dst_gpr + 1;
1679 LIST_ADDTAIL(&ntex->list, &bc->cf_last->tex);
1681 bc->cf_last->ndw += 4;
1682 bc->ndw += 4;
1683 if ((bc->cf_last->ndw / 4) >= r600_bytecode_num_tex_and_vtx_instructions(bc))
1684 bc->force_add_cf = 1;
1688 int r600_bytecode_add_cfinst(struct r600_bytecode *bc, int inst)
1691 r = r600_bytecode_add_cf(bc);
1695 bc->cf_last->cond = V_SQ_CF_COND_ACTIVE;
1696 bc->cf_last->inst = inst;
1700 int cm_bytecode_add_cf_end(struct r600_bytecode *bc)
1702 return r600_bytecode_add_cfinst(bc, CM_V_SQ_CF_WORD1_SQ_CF_INST_END);
1706 static int r600_bytecode_vtx_build(struct r600_bytecode *bc, struct r600_bytecode_vtx *vtx, unsigned id)
1708 bc->bytecode[id] = S_SQ_VTX_WORD0_BUFFER_ID(vtx->buffer_id) |
1712 if (bc->chip_class < CAYMAN)
1713 bc->bytecode[id] |= S_SQ_VTX_WORD0_MEGA_FETCH_COUNT(vtx->mega_fetch_count);
1715 bc->bytecode[id++] = S_SQ_VTX_WORD1_DST_SEL_X(vtx->dst_sel_x) |
1725 bc->bytecode[id] = S_SQ_VTX_WORD2_OFFSET(vtx->offset)|
1727 if (bc->chip_class < CAYMAN)
1728 bc->bytecode[id] |= S_SQ_VTX_WORD2_MEGA_FETCH(1);
1730 bc->bytecode[id++] = 0;
1735 static int r600_bytecode_tex_build(struct r600_bytecode *bc, struct r600_bytecode_tex *tex, unsigned id)
1737 bc->bytecode[id++] = S_SQ_TEX_WORD0_TEX_INST(tex->inst) |
1741 bc->bytecode[id++] = S_SQ_TEX_WORD1_DST_GPR(tex->dst_gpr) |
1752 bc->bytecode[id++] = S_SQ_TEX_WORD2_OFFSET_X(tex->offset_x) |
1760 bc->bytecode[id++] = 0;
1765 static int r600_bytecode_alu_build(struct r600_bytecode *bc, struct r600_bytecode_alu *alu, unsigned id)
1768 bc->bytecode[id++] = S_SQ_ALU_WORD0_SRC0_SEL(alu->src[0].sel) |
1781 bc->bytecode[id++] = S_SQ_ALU_WORD1_DST_GPR(alu->dst.sel) |
1792 bc->bytecode[id++] = S_SQ_ALU_WORD1_DST_GPR(alu->dst.sel) |
1817 static int r600_bytecode_cf_build(struct r600_bytecode *bc, struct r600_bytecode_cf *cf)
1826 bc->bytecode[id++] = S_SQ_CF_ALU_WORD0_ADDR(cf->addr >> 1) |
1831 bc->bytecode[id++] = cf->inst |
1836 S_SQ_CF_ALU_WORD1_USES_WATERFALL(bc->chip_class == R600 ? cf->r6xx_uses_waterfall : 0) |
1842 if (bc->chip_class == R700)
1843 r700_bytecode_cf_vtx_build(&bc->bytecode[id], cf);
1845 r600_bytecode_cf_vtx_build(&bc->bytecode[id], cf);
1849 bc->bytecode[id++] = S_SQ_CF_ALLOC_EXPORT_WORD0_RW_GPR(cf->output.gpr) |
1853 bc->bytecode[id++] = S_SQ_CF_ALLOC_EXPORT_WORD1_BURST_COUNT(cf->output.burst_count - 1) |
1866 bc->bytecode[id++] = S_SQ_CF_ALLOC_EXPORT_WORD0_RW_GPR(cf->output.gpr) |
1870 bc->bytecode[id++] = S_SQ_CF_ALLOC_EXPORT_WORD1_BURST_COUNT(cf->output.burst_count - 1) |
1887 bc->bytecode[id++] = S_SQ_CF_WORD0_ADDR(cf->cf_addr >> 1);
1888 bc->bytecode[id++] = cf->inst |
1901 int r600_bytecode_build(struct r600_bytecode *bc)
1912 if (bc->callstack[0].max > 0)
1913 bc->nstack = ((bc->callstack[0].max + 3) >> 2) + 2;
1914 if (bc->type == TGSI_PROCESSOR_VERTEX && !bc->nstack) {
1915 bc->nstack = 1;
1920 addr = bc->cf_last->id + 2;
1921 LIST_FOR_EACH_ENTRY(cf, &bc->cf, list) {
1922 if (bc->chip_class >= EVERGREEN) {
2005 bc->ndw = cf->addr + cf->ndw;
2007 free(bc->bytecode);
2008 bc->bytecode = calloc(1, bc->ndw * 4);
2009 if (bc->bytecode == NULL)
2011 LIST_FOR_EACH_ENTRY(cf, &bc->cf, list) {
2013 if (bc->chip_class >= EVERGREEN) {
2014 r = eg_bytecode_cf_build(bc, cf);
2026 r = r600_bytecode_alu_nliterals(bc, alu, literal, &nliteral);
2029 r600_bytecode_alu_adjust_literals(bc, alu, literal, nliteral);
2030 r600_bytecode_assign_kcache_banks(bc, alu, cf->kcache);
2032 switch(bc->chip_class) {
2035 r = r700_bytecode_alu_build(bc, alu, addr);
2038 R600_ERR("unknown chip class %d.\n", bc->chip_class);
2046 bc->bytecode[addr++] = literal[i];
2055 r = r600_bytecode_vtx_build(bc, vtx, addr);
2063 assert(bc->chip_class >= EVERGREEN);
2064 r = r600_bytecode_vtx_build(bc, vtx, addr);
2070 r = r600_bytecode_tex_build(bc, tex, addr);
2113 r = r600_bytecode_cf_build(bc, cf);
2125 r = r600_bytecode_alu_nliterals(bc, alu, literal, &nliteral);
2128 r600_bytecode_alu_adjust_literals(bc, alu, literal, nliteral);
2129 r600_bytecode_assign_kcache_banks(bc, alu, cf->kcache);
2131 switch(bc->chip_class) {
2133 r = r600_bytecode_alu_build(bc, alu, addr);
2136 r = r700_bytecode_alu_build(bc, alu, addr);
2139 R600_ERR("unknown chip class %d.\n", bc->chip_class);
2147 bc->bytecode[addr++] = literal[i];
2157 r = r600_bytecode_vtx_build(bc, vtx, addr);
2165 r = r600_bytecode_tex_build(bc, tex, addr);
2197 void r600_bytecode_clear(struct r600_bytecode *bc)
2201 free(bc->bytecode);
2202 bc->bytecode = NULL;
2204 LIST_FOR_EACH_ENTRY_SAFE(cf, next_cf, &bc->cf, list) {
2233 void r600_bytecode_dump(struct r600_bytecode *bc)
2245 switch (bc->chip_class) {
2260 fprintf(stderr, "bytecode %d dw -- %d gprs ---------------------\n", bc->ndw, bc->ngpr);
2263 LIST_FOR_EACH_ENTRY(cf, &bc->cf, list) {
2266 if (bc->chip_class >= EVERGREEN) {
2273 fprintf(stderr, "%04d %08X ALU_EXT0 ", id, bc->bytecode[id]);
2278 fprintf(stderr, "%04d %08X ALU_EXT1 ", id, bc->bytecode[id]);
2285 fprintf(stderr, "%04d %08X ALU ", id, bc->bytecode[id]);
2291 fprintf(stderr, "%04d %08X ALU ", id, bc->bytecode[id]);
2300 fprintf(stderr, "%04d %08X TEX/VTX ", id, bc->bytecode[id]);
2303 fprintf(stderr, "%04d %08X TEX/VTX ", id, bc->bytecode[id]);
2309 fprintf(stderr, "%04d %08X EXPORT ", id, bc->bytecode[id]);
2315 fprintf(stderr, "%04d %08X EXPORT ", id, bc->bytecode[id]);
2341 fprintf(stderr, "%04d %08X EXPORT MEM_STREAM%i_BUF%i ", id, bc->bytecode[id],
2351 fprintf(stderr, "%04d %08X EXPORT MEM_STREAM%i_BUF%i ", id, bc->bytecode[id],
2374 fprintf(stderr, "%04d %08X CF ", id, bc->bytecode[id]);
2377 fprintf(stderr, "%04d %08X CF ", id, bc->bytecode[id]);
2383 fprintf(stderr, "%04d %08X CF NATIVE\n", id, bc->bytecode[id]);
2384 fprintf(stderr, "%04d %08X CF NATIVE\n", id + 1, bc->bytecode[id + 1]);
2395 fprintf(stderr, "%04d %08X ALU ", id, bc->bytecode[id]);
2401 fprintf(stderr, "%04d %08X ALU ", id, bc->bytecode[id]);
2411 fprintf(stderr, "%04d %08X TEX/VTX ", id, bc->bytecode[id]);
2414 fprintf(stderr, "%04d %08X TEX/VTX ", id, bc->bytecode[id]);
2420 fprintf(stderr, "%04d %08X EXPORT ", id, bc->bytecode[id]);
2426 fprintf(stderr, "%04d %08X EXPORT ", id, bc->bytecode[id]);
2440 fprintf(stderr, "%04d %08X EXPORT MEM_STREAM%i ", id, bc->bytecode[id],
2448 fprintf(stderr, "%04d %08X EXPORT MEM_STREAM%i ", id, bc->bytecode[id],
2468 fprintf(stderr, "%04d %08X CF ", id, bc->bytecode[id]);
2471 fprintf(stderr, "%04d %08X CF ", id, bc->bytecode[id]);
2484 r600_bytecode_alu_nliterals(bc, alu, literal, &nliteral);
2486 fprintf(stderr, "%04d %08X ", id, bc->bytecode[id]);
2499 fprintf(stderr, "%04d %08X %c ", id, bc->bytecode[id], alu->last ? '*' : ' ');
2523 float *f = (float*)(bc->bytecode + id);
2524 fprintf(stderr, "%04d %08X\t%f (%d)\n", id, bc->bytecode[id], *f,
2525 *(bc->bytecode + id));
2533 fprintf(stderr, "%04d %08X ", id, bc->bytecode[id]);
2539 fprintf(stderr, "%04d %08X ", id, bc->bytecode[id]);
2552 fprintf(stderr, "%04d %08X ", id, bc->bytecode[id]);
2562 fprintf(stderr, "%04d %08X \n", id, bc->bytecode[id]);
2567 fprintf(stderr, "%04d %08X ", id, bc->bytecode[id]);
2573 fprintf(stderr, "%04d %08X ", id, bc->bytecode[id]);
2576 if (bc->chip_class < CAYMAN)
2591 fprintf(stderr, "%04d %08X ", id, bc->bytecode[id]);
2596 fprintf(stderr, "%04d %08X \n", id, bc->bytecode[id]);
2754 struct r600_bytecode bc;
2763 memset(&bc, 0, sizeof(bc));
2764 r600_bytecode_init(&bc, rctx->chip_class, rctx->family);
2772 alu.inst = BC_INST(&bc, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MULHI_UINT);
2781 if ((r = r600_bytecode_add_alu(&bc, &alu))) {
2782 r600_bytecode_clear(&bc);
2789 alu.inst = BC_INST(&bc, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MULHI_UINT);
2798 if ((r = r600_bytecode_add_alu(&bc, &alu))) {
2799 r600_bytecode_clear(&bc);
2812 r600_bytecode_clear(&bc);
2818 r600_bytecode_clear(&bc);
2841 if ((r = r600_bytecode_add_vtx(&bc, &vtx))) {
2842 r600_bytecode_clear(&bc);
2847 r600_bytecode_add_cfinst(&bc, BC_INST(&bc, V_SQ_CF_WORD1_SQ_CF_INST_RETURN));
2849 if ((r = r600_bytecode_build(&bc))) {
2850 r600_bytecode_clear(&bc);
2859 r600_bytecode_dump(&bc);
2863 ve->fs_size = bc.ndw*4;
2870 r600_bytecode_clear(&bc);
2876 r600_bytecode_clear(&bc);
2883 bytecode[i] = bswap_32(bc.bytecode[i]);
2886 memcpy(bytecode, bc.bytecode, ve->fs_size);
2890 r600_bytecode_clear(&bc);