Lines Matching refs:ir
42 this->ir = v->base_ir;
57 new_inst->ir = inst->ir;
355 ir_instruction *ir = (ir_instruction *)node;
357 base_ir = ir;
358 ir->accept(this);
559 vec4_visitor::setup_builtin_uniform_values(ir_variable *ir)
561 const ir_state_slot *const slots = ir->state_slots;
562 assert(ir->state_slots != NULL);
564 for (unsigned int i = 0; i < ir->num_state_slots; i++) {
598 vec4_visitor::emit_bool_to_cond_code(ir_rvalue *ir, uint32_t *predicate)
600 ir_expression *expr = ir->as_expression();
687 ir->accept(this);
706 vec4_visitor::emit_if_gen6(ir_if *ir)
708 ir_expression *expr = ir->condition->as_expression();
782 ir->condition->accept(this);
788 vec4_visitor::visit(ir_variable *ir)
792 if (variable_storage(ir))
795 switch (ir->mode) {
797 reg = new(mem_ctx) dst_reg(ATTR, ir->location);
802 for (int i = ir->location; i < ir->location + type_size(ir->type); i++) {
807 dst.type = brw_type_for_base_type(ir->type);
814 reg = new(mem_ctx) dst_reg(this, ir->type);
816 for (int i = 0; i < type_size(ir->type); i++) {
817 output_reg[ir->location + i] = *reg;
818 output_reg[ir->location + i].reg_offset = i;
819 output_reg[ir->location + i].type =
820 brw_type_for_base_type(ir->type->get_scalar_type());
821 output_reg_annotation[ir->location + i] = ir->name;
827 reg = new(mem_ctx) dst_reg(this, ir->type);
837 if (ir->uniform_block != -1)
843 this->uniform_size[this->uniforms] = type_size(ir->type);
845 if (!strncmp(ir->name, "gl_", 3)) {
846 setup_builtin_uniform_values(ir);
848 setup_uniform_values(ir->location, ir->type);
860 switch (ir->location) {
877 reg->type = brw_type_for_base_type(ir->type);
878 hash_table_insert(this->variable_ht, reg, ir);
882 vec4_visitor::visit(ir_loop *ir)
891 if (ir->counter != NULL) {
892 this->base_ir = ir->counter;
893 ir->counter->accept(this);
894 counter = *(variable_storage(ir->counter));
896 if (ir->from != NULL) {
897 this->base_ir = ir->from;
898 ir->from->accept(this);
906 if (ir->to) {
907 this->base_ir = ir->to;
908 ir->to->accept(this);
911 brw_conditional_for_comparison(ir->cmp)));
917 visit_instructions(&ir->body_instructions);
920 if (ir->increment) {
921 this->base_ir = ir->increment;
922 ir->increment->accept(this);
930 vec4_visitor::visit(ir_loop_jump *ir)
932 switch (ir->mode) {
944 vec4_visitor::visit(ir_function_signature *ir)
947 (void)ir;
951 vec4_visitor::visit(ir_function *ir)
956 if (strcmp(ir->name, "main") == 0) {
960 sig = ir->matching_signature(&empty);
969 vec4_visitor::try_emit_sat(ir_expression *ir)
971 ir_rvalue *sat_src = ir->as_rvalue_to_saturate();
978 this->result = src_reg(this, ir->type);
1001 vec4_visitor::visit(ir_expression *ir)
1004 src_reg op[Elements(ir->operands)];
1009 if (try_emit_sat(ir))
1012 for (operand = 0; operand < ir->get_num_operands(); operand++) {
1014 ir->operands[operand]->accept(this);
1017 ir->operands[operand]->print();
1025 assert(!ir->operands[operand]->type->is_matrix());
1028 int vector_elements = ir->operands[0]->type->vector_elements;
1029 if (ir->operands[1]) {
1031 ir->operands[1]->type->vector_elements);
1039 result_src = src_reg(this, ir->type);
1048 result_dst.writemask = (1 << ir->type->vector_elements) - 1;
1050 switch (ir->operation) {
1120 if (ir->type->is_integer()) {
1140 assert(ir->type->is_integer());
1145 assert(ir->type->is_integer());
1156 brw_conditional_for_comparison(ir->operation)));
1163 if (ir->operands[0]->type->is_vector() ||
1164 ir->operands[1]->type->is_vector()) {
1176 if (ir->operands[0]->type->is_vector() ||
1177 ir->operands[1]->type->is_vector()) {
1210 assert(ir->operands[0]->type->is_vector());
1211 assert(ir->operands[0]->type == ir->operands[1]->type);
1212 emit_dp(result_dst, op[0], op[1], ir->operands[0]->type->vector_elements);
1318 if (ir->type->base_type == GLSL_TYPE_INT)
1325 ir_constant *uniform_block = ir->operands[0]->as_constant();
1326 ir_constant *const_offset_ir = ir->operands[1]->as_constant();
1331 assert(ir->type->is_vector() || ir->type->is_scalar());
1352 packed_consts.swizzle = swizzle_for_size(ir->type->vector_elements);
1359 if (ir->type->base_type == GLSL_TYPE_BOOL) {
1377 vec4_visitor::visit(ir_swizzle *ir)
1388 ir->val->accept(this);
1392 for (i = 0; i < ir->type->vector_elements; i++) {
1395 swizzle[i] = BRW_GET_SWZ(src.swizzle, ir->mask.x);
1398 swizzle[i] = BRW_GET_SWZ(src.swizzle, ir->mask.y);
1401 swizzle[i] = BRW_GET_SWZ(src.swizzle, ir->mask.z);
1404 swizzle[i] = BRW_GET_SWZ(src.swizzle, ir->mask.w);
1410 swizzle[i] = swizzle[ir->type->vector_elements - 1];
1419 vec4_visitor::visit(ir_dereference_variable *ir)
1421 const struct glsl_type *type = ir->type;
1422 dst_reg *reg = variable_storage(ir->var);
1425 fail("Failed to find variable storage for %s\n", ir->var->name);
1433 if (ir->var->mode == ir_var_system_value)
1441 vec4_visitor::visit(ir_dereference_array *ir)
1445 int element_size = type_size(ir->type);
1447 constant_index = ir->array_index->constant_expression_value();
1449 ir->array->accept(this);
1459 ir->array_index->accept(this);
1484 if (ir->type->is_scalar() || ir->type->is_vector() || ir->type->is_matrix())
1485 src.swizzle = swizzle_for_size(ir->type->vector_elements);
1488 src.type = brw_type_for_base_type(ir->type);
1494 vec4_visitor::visit(ir_dereference_record *ir)
1497 const glsl_type *struct_type = ir->record->type;
1500 ir->record->accept(this);
1503 if (strcmp(struct_type->fields.structure[i].name, ir->field) == 0)
1509 if (ir->type->is_scalar() || ir->type->is_vector() || ir->type->is_matrix())
1510 this->result.swizzle = swizzle_for_size(ir->type->vector_elements);
1513 this->result.type = brw_type_for_base_type(ir->type);
1524 get_assignment_lhs(ir_dereference *ir, vec4_visitor *v)
1530 assert(ir->as_dereference());
1531 ir_dereference_array *deref_array = ir->as_dereference_array();
1539 ir->accept(v);
1597 vec4_visitor::try_rewrite_rhs_to_dst(ir_assignment *ir,
1604 if (ir->condition)
1648 vec4_visitor::visit(ir_assignment *ir)
1650 dst_reg dst = get_assignment_lhs(ir->lhs, this);
1653 if (!ir->lhs->type->is_scalar() &&
1654 !ir->lhs->type->is_vector()) {
1655 ir->rhs->accept(this);
1658 if (ir->condition) {
1659 emit_bool_to_cond_code(ir->condition, &predicate);
1667 (ir->rhs->type->is_matrix()
1668 ? swizzle_for_size(ir->rhs->type->vector_elements)
1671 emit_block_move(&dst, &src, ir->rhs->type, predicate);
1681 ir->rhs->accept(this);
1691 assert(ir->lhs->type->is_vector() ||
1692 ir->lhs->type->is_scalar());
1693 dst.writemask = ir->write_mask;
1704 * glsl ir treats write_mask as dictating how many channels are
1717 if (try_rewrite_rhs_to_dst(ir, dst, src, pre_rhs_inst, last_rhs_inst)) {
1721 if (ir->condition) {
1722 emit_bool_to_cond_code(ir->condition, &predicate);
1725 for (i = 0; i < type_size(ir->lhs->type); i++) {
1735 vec4_visitor::emit_constant_values(dst_reg *dst, ir_constant *ir)
1737 if (ir->type->base_type == GLSL_TYPE_STRUCT) {
1738 foreach_list(node, &ir->components) {
1746 if (ir->type->is_array()) {
1747 for (unsigned int i = 0; i < ir->type->length; i++) {
1748 emit_constant_values(dst, ir->array_elements[i]);
1753 if (ir->type->is_matrix()) {
1754 for (int i = 0; i < ir->type->matrix_columns; i++) {
1755 float *vec = &ir->value.f[i * ir->type->vector_elements];
1757 for (int j = 0; j < ir->type->vector_elements; j++) {
1768 int remaining_writemask = (1 << ir->type->vector_elements) - 1;
1770 for (int i = 0; i < ir->type->vector_elements; i++) {
1775 dst->type = brw_type_for_base_type(ir->type);
1781 for (int j = i + 1; j < ir->type->vector_elements; j++) {
1782 if (ir->type->base_type == GLSL_TYPE_BOOL) {
1783 if (ir->value.b[i] == ir->value.b[j])
1789 if (ir->value.u[i] == ir->value.u[j])
1794 switch (ir->type->base_type) {
1796 emit(MOV(*dst, src_reg(ir->value.f[i])));
1799 emit(MOV(*dst, src_reg(ir->value.i[i])));
1802 emit(MOV(*dst, src_reg(ir->value.u[i])));
1805 emit(MOV(*dst, src_reg(ir->value.b[i])));
1818 vec4_visitor::visit(ir_constant *ir)
1820 dst_reg dst = dst_reg(this, ir->type);
1823 emit_constant_values(&dst, ir);
1827 vec4_visitor::visit(ir_call *ir)
1833 vec4_visitor::visit(ir_texture *ir)
1835 int sampler = _mesa_get_sampler_uniform_value(ir->sampler, prog, &vp->Base);
1838 assert(!ir->projector);
1845 if (ir->coordinate) {
1846 ir->coordinate->accept(this);
1851 if (ir->shadow_comparitor) {
1852 ir->shadow_comparitor->accept(this);
1858 switch (ir->op) {
1866 ir->lod_info.lod->accept(this);
1868 lod_type = ir->lod_info.lod->type;
1871 ir->lod_info.grad.dPdx->accept(this);
1874 ir->lod_info.grad.dPdy->accept(this);
1877 lod_type = ir->lod_info.grad.dPdx->type;
1884 switch (ir->op) {
1903 inst->header_present = ir->offset || intel->gen < 5;
1907 inst->dst = dst_reg(this, ir->type);
1909 inst->shadow_compare = ir->shadow_comparitor != NULL;
1911 if (ir->offset != NULL && ir->op != ir_txf)
1912 inst->texture_offset = brw_texture_offset(ir->offset->as_constant());
1917 if (ir->op == ir_txs) {
1924 for (i = 0; i < ir->coordinate->type->vector_elements; i++)
1929 if (ir->offset && ir->op == ir_txf) {
1935 ir_constant *offset = ir->offset->as_constant();
1938 for (int j = 0; j < ir->coordinate->type->vector_elements; j++) {
1944 emit(ADD(dst_reg(MRF, param_base, ir->coordinate->type, 1 << j),
1948 emit(MOV(dst_reg(MRF, param_base, ir->coordinate->type, coord_mask),
1951 emit(MOV(dst_reg(MRF, param_base, ir->coordinate->type, zero_mask),
1954 if (ir->shadow_comparitor) {
1955 emit(MOV(dst_reg(MRF, param_base + 1, ir->shadow_comparitor->type,
1962 if (ir->op == ir_tex || ir->op == ir_txl) {
1966 if (ir->shadow_comparitor) {
1978 } else if (ir->op == ir_txf) {
1981 } else if (ir->op == ir_txd) {
1991 if (ir->type->vector_elements == 3) {
2008 swizzle_result(ir, src_reg(inst->dst), sampler);
2012 vec4_visitor::swizzle_result(ir_texture *ir, src_reg orig_val, int sampler)
2016 this->result = src_reg(this, ir->type);
2019 if (ir->op == ir_txs || ir->type == glsl_type::float_type
2061 vec4_visitor::visit(ir_return *ir)
2067 vec4_visitor::visit(ir_discard *ir)
2073 vec4_visitor::visit(ir_if *ir)
2078 this->base_ir = ir->condition;
2081 emit_if_gen6(ir);
2084 emit_bool_to_cond_code(ir->condition, &predicate);
2088 visit_instructions(&ir->then_instructions);
2090 if (!ir->else_instructions.is_empty()) {
2091 this->base_ir = ir->condition;
2094 visit_instructions(&ir->else_instructions);
2097 this->base_ir = ir->condition;
2485 write->ir = inst->ir;
2538 base_ir = inst->ir;
2640 base_ir = inst->ir;