Cross Reference: /external/mesa3d/src/mesa/drivers/dri/r200/r200

Lines Matching refs:radeon
77    GLuint agp_mode = (rmesa->radeon.radeonScreen->card_type == RADEON_CARD_PCI)? 0 :
78       rmesa->radeon.radeonScreen->AGPMode;
88 	       !(rmesa->radeon.TclFallback & R200_TCL_FALLBACK_TCL_DISABLE)
146 static void r200_get_lock(radeonContextPtr radeon)
148    r200ContextPtr rmesa = (r200ContextPtr)radeon;
149    drm_radeon_sarea_t *sarea = radeon->sarea;
152    if (rmesa->radeon.sarea->tiling_enabled) {
157    if ( sarea->ctx_owner != rmesa->radeon.dri.hwContext ) {
158       sarea->ctx_owner = rmesa->radeon.dri.hwContext;
167 static void r200_emit_query_finish(radeonContextPtr radeon)
169    BATCH_LOCALS(radeon);
170    struct radeon_query_object *query = radeon->query.current;
181 static void r200_init_vtbl(radeonContextPtr radeon)
183    radeon->vtbl.get_lock = r200_get_lock;
184    radeon->vtbl.update_viewport_offset = r200UpdateViewportOffset;
185    radeon->vtbl.emit_cs_header = r200_vtbl_emit_cs_header;
186    radeon->vtbl.swtcl_flush = r200_swtcl_flush;
187    radeon->vtbl.fallback = r200Fallback;
188    radeon->vtbl.update_scissor = r200_vtbl_update_scissor;
189    radeon->vtbl.emit_query_finish = r200_emit_query_finish;
190    radeon->vtbl.check_blit = r200_check_blit;
191    radeon->vtbl.blit = r200_blit;
192    radeon->vtbl.is_format_renderable = radeonIsFormatRenderable;
244    rmesa->radeon.radeonScreen = screen;
245    r200_init_vtbl(&rmesa->radeon);
253    driParseConfigFiles (&rmesa->radeon.optionCache, &screen->optionCache,
255    rmesa->radeon.initialMaxAnisotropy = driQueryOptionf(&rmesa->radeon.optionCache,
259        && driQueryOptionb( &rmesa->radeon.optionCache, "hyperz" ) ) {
276    r200InitStateFuncs(&rmesa->radeon, &functions);
277    r200InitTextureFuncs(&rmesa->radeon, &functions);
281    if (!radeonInitContext(&rmesa->radeon, &functions,
289    rmesa->radeon.swtcl.RenderIndex = ~0;
290    rmesa->radeon.hw.all_dirty = 1;
292    ctx = rmesa->radeon.glCtx;
306    ctx->Const.MaxTextureUnits = driQueryOptioni (&rmesa->radeon.optionCache,
315    i = driQueryOptioni( &rmesa->radeon.optionCache, "allow_large_textures");
406    if (!(rmesa->radeon.radeonScreen->chip_flags & R200_CHIPSET_YCBCR_BROKEN)) {
411    if (rmesa->radeon.glCtx->Mesa_DXTn) {
415    else if (driQueryOptionb (&rmesa->radeon.optionCache, "force_s3tc_enable")) {
428       driQueryOptionb(&rmesa->radeon.optionCache, "nv_vertex_program");
443    radeon_fbo_init(&rmesa->radeon);
452    tcl_mode = driQueryOptioni(&rmesa->radeon.optionCache, "tcl_mode");
453    if (driQueryOptionb(&rmesa->radeon.optionCache, "no_rast")) {
458 	    !(rmesa->radeon.radeonScreen->chip_flags & RADEON_CHIPSET_TCL)) {
459       if (rmesa->radeon.radeonScreen->chip_flags & RADEON_CHIPSET_TCL) {
460 	 rmesa->radeon.radeonScreen->chip_flags &= ~RADEON_CHIPSET_TCL;
463       TCL_FALLBACK(rmesa->radeon.glCtx, R200_TCL_FALLBACK_TCL_DISABLE, 1);