Lines Matching defs:addr_reg
275 InstructionOperand addr_reg = g.TempRegister();
276 Emit(kMipsAdd | AddressingModeField::encode(kMode_None), addr_reg,
278 // Emit desired load opcode, using temp addr_reg.
280 g.DefineAsRegister(node), addr_reg, g.TempImmediate(0));
361 InstructionOperand addr_reg = g.TempRegister();
362 Emit(kMipsAdd | AddressingModeField::encode(kMode_None), addr_reg,
364 // Emit desired store opcode, using temp addr_reg.
366 addr_reg, g.TempImmediate(0), g.UseRegisterOrImmediateZero(value));
1243 InstructionOperand addr_reg = g.TempRegister();
1244 Emit(kMipsAdd | AddressingModeField::encode(kMode_None), addr_reg,
1246 // Emit desired load opcode, using temp addr_reg.
1248 g.DefineAsRegister(node), addr_reg, g.TempImmediate(0));
1294 InstructionOperand addr_reg = g.TempRegister();
1295 Emit(kMipsAdd | AddressingModeField::encode(kMode_None), addr_reg,
1297 // Emit desired store opcode, using temp addr_reg.
1299 addr_reg, g.TempImmediate(0), g.UseRegisterOrImmediateZero(value));
1840 InstructionOperand addr_reg = g.TempRegister();
1841 Emit(kMipsAdd | AddressingModeField::encode(kMode_None), addr_reg,
1843 // Emit desired load opcode, using temp addr_reg.
1845 g.DefineAsRegister(node), addr_reg, g.TempImmediate(0));
1876 InstructionOperand addr_reg = g.TempRegister();
1877 Emit(kMipsAdd | AddressingModeField::encode(kMode_None), addr_reg,
1879 // Emit desired store opcode, using temp addr_reg.
1881 addr_reg, g.TempImmediate(0), g.UseRegisterOrImmediateZero(value));