Lines Matching defs:lane
1408 /* Find the offset of the laneNo'th lane of type laneTy in the given
1409 Qreg. Since the host is little-endian, the least significant lane
1415 /* Since the host is little-endian, the least significant lane
1435 /* Put to the least significant lane of a Qreg. */
1450 /* Get from the least significant lane of a Qreg. */
1535 /* Put to a specified lane of a Qreg. */
1552 /* Get from a specified lane of a Qreg. */
3829 // First, interleave at the 64-bit lane size.
3844 // First, interleave at the 32-bit lane size.
3859 // First, interleave at the 16-bit lane size.
3966 // First deinterleave into lane-pairs
4171 (de)interleaving. The scheme is to clone each input lane in the
4173 at the next lane size up, and remove every other lane of the the
6146 /* ------ LD1/ST1 (single structure, to/from one lane) ------ */
6147 /* ------ LD2/ST2 (single structure, to/from one lane) ------ */
6148 /* ------ LD3/ST3 (single structure, to/from one lane) ------ */
6149 /* ------ LD4/ST4 (single structure, to/from one lane) ------ */
7177 and Iop_CatOdd* operators to 'src' so as to clone each lane into
7179 zero out all but the least significant lane. */
7392 /* A vector containing 15 in each 8-bit lane */
7395 /* A vector containing 16 in each 8-bit lane */
7398 /* A vector containing 32 in each 8-bit lane */
7401 /* A vector containing 48 in each 8-bit lane */
7404 /* A vector containing 64 in each 8-bit lane */
7586 of each lane, producing a single V128 value. */
7597 /* Return a temp which holds the vector dup of the lane of width
7641 /* Let |srcV| be a V128 value, and let |imm5| be a lane-and-size
7643 selected lane from |srcV| dup'd out to V128, and also return the
7644 lane number, log2 of the lane size in bytes, and width-character via
7693 /* Clone |imm| to every lane of a V128, with lane size log2 of |size|. */
7751 /* Compute vector SQABS at lane size |size| for |srcE|, returning
7774 /* Compute vector SQNEG at lane size |size| for |srcE|, returning
7788 /* Zero all except the least significant lane of |srcE|, where |size|
7789 indicates the lane size in the usual way. */
7802 isU==False. |size| is the narrow lane size indication. Optionally,
7803 the product may be added to or subtracted from vecD, at the wide lane
7888 have their lane width signedly widened, and they are then multiplied
8456 either case fold with add at twice the lane width.
8740 IRExpr* lane = getQRegLane(nn, laneNo, Ity_I8);
8741 res = isU ? unop(Iop_8Uto64, lane)
8742 : unop(Iop_32Uto64, unop(Iop_8Sto32, lane));
8747 IRExpr* lane = getQRegLane(nn, laneNo, Ity_I8);
8749 : unop(Iop_8Sto64, lane);
8754 IRExpr* lane = getQRegLane(nn, laneNo, Ity_I16);
8755 res = isU ? unop(Iop_16Uto64, lane)
8756 : unop(Iop_32Uto64, unop(Iop_16Sto32, lane));
8761 IRExpr* lane = getQRegLane(nn, laneNo, Ity_I16);
8763 : unop(Iop_16Sto64, lane);
8768 IRExpr* lane = getQRegLane(nn, laneNo, Ity_I32);
8769 res = isU ? unop(Iop_32Uto64, lane)
8775 IRExpr* lane = getQRegLane(nn, laneNo, Ity_I32);
8777 : unop(Iop_32Sto64, lane);
8782 IRExpr* lane = getQRegLane(nn, laneNo, Ity_I64);
8783 res = isU ? lane
9659 lane of the result, we zero out all the rest in the operands, so
12186 /* -------- 1,xx,10011 SHLL{2} #lane-width -------- */