Lines Matching refs:dd
2411 UInt dd = INSN(4,0);
2427 putIReg64orZR(dd, mkexpr(res));
2430 nm, nameIReg64orZR(dd), nameIReg64orSP(nn), uimm12);
2432 putIReg64orSP(dd, mkexpr(res));
2434 nm, nameIReg64orSP(dd), nameIReg64orSP(nn), uimm12);
2445 putIReg32orZR(dd, mkexpr(res));
2448 nm, nameIReg32orZR(dd), nameIReg32orSP(nn), uimm12);
2450 putIReg32orSP(dd, mkexpr(res));
2452 nm, nameIReg32orSP(dd), nameIReg32orSP(nn), uimm12);
2493 UInt dd = INSN(4,0);
2514 putIReg64orSP(dd, mkexpr(res));
2516 nameIReg64orSP(dd), nameIReg64orZR(nn), imm);
2518 putIReg64orZR(dd, mkexpr(res));
2521 nameIReg64orZR(dd), nameIReg64orZR(nn), imm);
2529 putIReg32orSP(dd, mkexpr(res));
2531 nameIReg32orSP(dd), nameIReg32orZR(nn), (UInt)imm);
2533 putIReg32orZR(dd, mkexpr(res));
2536 nameIReg32orZR(dd), nameIReg32orZR(nn), (UInt)imm);
2555 UInt dd = INSN(4,0);
2564 putIRegOrZR(is64, dd, is64 ? mkU64(imm64) : mkU32((UInt)imm64));
2565 DIP("movz %s, 0x%llx\n", nameIRegOrZR(is64, dd), imm64);
2571 putIRegOrZR(is64, dd, is64 ? mkU64(imm64) : mkU32((UInt)imm64));
2572 DIP("movn %s, 0x%llx\n", nameIRegOrZR(is64, dd), imm64);
2580 assign(old, getIReg64orZR(dd));
2586 putIReg64orZR(dd, res);
2588 nameIReg64orZR(dd), imm16, 16*hw);
2591 assign(old, getIReg32orZR(dd));
2598 putIReg32orZR(dd, res);
2600 nameIReg32orZR(dd), imm16, 16*hw);
2613 sf 10 100110 N immr imms nn dd
2617 sf 00 100110 N immr imms nn dd
2621 sf 01 100110 N immr imms nn dd
2632 UInt dd = INSN(4,0);
2665 assign(dst, inZero ? mkU(ty,0) : getIRegOrZR(is64, dd));
2678 putIRegOrZR(is64, dd, mkexpr(res));
2680 nm, nameIRegOrZR(is64, dd), nameIRegOrZR(is64, nn), immR, immS);
2695 UInt dd = INSN(4,0);
2717 putIRegOrZR(is64, dd, mkexpr(res));
2719 nameIRegOrZR(is64,dd),
2973 UInt dd = INSN(4,0);
2974 putIReg64orZR(dd, unop(Iop_128HIto64,
2979 nameIReg64orZR(dd), nameIReg64orZR(nn), nameIReg64orZR(mm));
2994 UInt dd = INSN(4,0);
2997 dd,
3003 dd,
3010 nameIRegOrZR(is64, dd), nameIRegOrZR(is64, nn),
3017 sf 00 1101 0100 mm cond 00 nn dd CSEL Rd,Rn,Rm
3018 sf 00 1101 0100 mm cond 01 nn dd CSINC Rd,Rn,Rm
3019 sf 10 1101 0100 mm cond 00 nn dd CSINV Rd,Rn,Rm
3020 sf 10 1101 0100 mm cond 01 nn dd CSNEG Rd,Rn,Rm
3030 UInt dd = INSN(4,0);
3051 is64, dd,
3057 nameIRegOrZR(is64, dd), nameIRegOrZR(is64, nn),
3103 UInt dd = INSN(4,0);
3154 putIReg64orZR(dd, mkexpr(res));
3157 putIReg64orSP(dd, mkexpr(res));
3163 putIReg32orZR(dd, unop(Iop_64to32, mkexpr(res)));
3168 putIReg32orSP(dd, unop(Iop_64to32, mkexpr(res)));
3173 setCC ? nameIRegOrZR(is64, dd) : nameIRegOrSP(is64, dd),
3292 UInt dd = INSN(4,0);
3312 putIReg64orZR(dd,
3317 putIReg64orZR(dd, mkexpr(dst));
3321 putIReg32orZR(dd, unop(Iop_64to32, mkexpr(dst)));
3324 nameIRegOrZR(is64,dd), nameIRegOrZR(is64,nn));
3340 UInt dd = INSN(4,0);
3366 putIReg64orZR(dd, mkexpr(dst));
3371 putIReg32orZR(dd, unop(Iop_64to32, mkexpr(dst)));
3374 nameIRegOrZR(is64, dd), nameIRegOrZR(is64, nn));
3391 UInt dd = INSN(4,0);
3430 putIRegOrZR(is64, dd, mkexpr(res));
3434 names[op], nameIRegOrZR(is64,dd),
3450 UInt dd = INSN(4,0);
3452 putIRegOrZR(is64, dd, binop(is64 ? Iop_DivS64 : Iop_DivS32,
3456 putIRegOrZR(is64, dd, binop(is64 ? Iop_DivU64 : Iop_DivU32,
3461 nameIRegOrZR(is64, dd),
3481 UInt dd = INSN(4,0);
3494 putIReg64orZR(dd, mkexpr(res));
3496 nameIReg64orZR(dd), nameIReg32orZR(nn),
7723 generate IR to put |new64| in the lower half of vector reg |dd| and zero
7725 half of vector reg |dd| and leave the lower half unchanged. This
7730 void putLO64andZUorPutHI64 ( Bool is2, UInt dd, IRTemp new64 )
7736 assign(t_zero_oldLO, unop(Iop_ZeroHI64ofV128, getQReg128(dd)));
7743 putQReg128(dd, mkexpr(res));
7746 putQReg128(dd, unop(Iop_ZeroHI64ofV128, mkexpr(new64)));
8215 UInt dd = INSN(4,0);
8232 putQReg128(dd, mkexpr(res));
8233 DIP("ext v%u.16b, v%u.16b, v%u.16b, #%u\n", dd, nn, mm, imm4);
8246 putQReg128(dd, unop(Iop_ZeroHI64ofV128, mkexpr(res)));
8247 DIP("ext v%u.8b, v%u.8b, v%u.8b, #%u\n", dd, nn, mm, imm4);
8278 UInt dd = INSN(4,0);
8291 assign(oor_values, isTBX ? getQReg128(dd) : mkV128(0));
8304 putQReg128(dd, math_MAYBE_ZERO_HI64(bitQ, res));
8308 nm, nameQReg128(dd), Ta, nn, (nn + len) % 32, nameQReg128(mm), Ta);
8336 UInt dd = INSN(4,0);
8357 putQReg128(dd, math_MAYBE_ZERO_HI64(bitQ, res));
8361 nameQReg128(dd), arr, nameQReg128(nn), arr, nameQReg128(mm), arr);
8380 putQReg128(dd, math_MAYBE_ZERO_HI64(bitQ, res));
8384 nameQReg128(dd), arr, nameQReg128(nn), arr, nameQReg128(mm), arr);
8413 putQReg128(dd, math_MAYBE_ZERO_HI64(bitQ, res));
8417 nameQReg128(dd), arr, nameQReg128(nn), arr, nameQReg128(mm), arr);
8444 UInt dd = INSN(4,0);
8473 putQReg128(dd, mkexpr(res));
8477 nameQReg128(dd), ch, nameQReg128(nn), arr);
8533 putQReg128(dd, mkexpr(res));
8538 nameQRegLO(dd, laneTy), nameQReg128(nn), arr);
8556 putQReg128(dd, mkexpr(res));
8558 isMIN ? "fmin" : "fmax", isNM ? "nm" : "", dd, nn);
8586 UInt dd = INSN(4,0);
8602 putQReg128(dd, math_MAYBE_ZERO_HI64(bitQ, res));
8605 nameQReg128(dd), arT, nameQReg128(nn), laneCh, laneNo);
8651 putQReg128(dd, binop(Iop_64HLtoV128,
8654 nameQReg128(dd), arT, nameIRegOrZR(laneTy == Ity_I64, nn));
8696 putQRegLane(dd, laneNo, src);
8698 nameQReg128(dd), ts, laneNo, nameIReg64orZR(nn));
8790 putIReg64orZR(dd, res);
8792 nameIRegOrZR(bitQ == 1, dd),
8842 putQRegLane(dd, ix1, getQRegLane(nn, ix2, ity));
8844 nameQReg128(dd), ts, ix1, nameQReg128(nn), ts, ix2);
8874 UInt dd = INSN(4,0);
8979 = binop(isORR ? Iop_OrV128 : Iop_AndV128, getQReg128(dd), immV128);
8982 putQReg128(dd, unop(Iop_ZeroHI64ofV128, res));
8983 DIP("%s %s.1d, %016llx\n", nm, nameQReg128(dd), imm64lo);
8985 putQReg128(dd, res);
8987 nameQReg128(dd), imm64lo, imm64lo);
8995 putQReg128(dd, immV128);
8996 DIP("mov %s, #0x%016llx'%016llx\n", nameQReg128(dd), imm64hi, imm64lo);
9024 UInt dd = INSN(4,0);
9062 putQReg128(dd, binop(Iop_64HLtoV128, mkU64(0), mkexpr(w0)));
9064 nameQRegLO(dd, laneTy), nameQReg128(nn), arTs, laneNo);
9093 UInt dd = INSN(4,0);
9101 putQReg128(dd, unop(Iop_ZeroHI64ofV128,
9103 DIP("addp d%u, %s.2d\n", dd, nameQReg128(nn));
9120 putQReg128(dd, unop(opZHI,
9123 DIP(isD ? "faddp d%u, v%u.2d\n" : "faddp s%u, v%u.2s\n", dd, nn);
9146 putQReg128(dd, unop(opZHI,
9150 isMIN ? "fmin" : "fmax", isNM ? "nm" : "", c, dd, nn, c);
9176 UInt dd = INSN(4,0);
9203 assign(res, isAcc ? binop(Iop_Add64x2, getQReg128(dd), mkexpr(shf))
9205 putQReg128(dd, unop(Iop_ZeroHI64ofV128, mkexpr(res)));
9208 DIP("%s d%u, d%u, #%u\n", nm, dd, nn, sh);
9231 assign(res, isAcc ? binop(Iop_Add64x2, getQReg128(dd), mkexpr(shf))
9233 putQReg128(dd, unop(Iop_ZeroHI64ofV128, mkexpr(res)));
9236 DIP("%s d%u, d%u, #%u\n", nm, dd, nn, sh);
9245 putQReg128(dd, unop(Iop_ZeroHI64ofV128, getQReg128(dd)));
9252 binop(Iop_AndV128, getQReg128(dd), nmaskV),
9254 putQReg128(dd, unop(Iop_ZeroHI64ofV128, mkexpr(res)));
9256 DIP("sri d%u, d%u, #%u\n", dd, nn, sh);
9264 putQReg128(dd,
9268 DIP("shl d%u, d%u, #%u\n", dd, nn, sh);
9277 putQReg128(dd, unop(Iop_ZeroHI64ofV128, getQReg128(nn)));
9284 binop(Iop_AndV128, getQReg128(dd), nmaskV),
9286 putQReg128(dd, unop(Iop_ZeroHI64ofV128, mkexpr(res)));
9288 DIP("sli d%u, d%u, #%u\n", dd, nn, sh);
9320 putQReg128(dd, mkexpr(res));
9323 DIP("%s %c%u, %c%u, #%u\n", nm, arr, dd, arr, nn, shift);
9371 putQReg128(dd, mkexpr(res64in128));
9381 DIP("%s %c%u, %c%u, #%u\n", nm, arrNarrow, dd, arrWide, nn, shift);
9412 putQRegLane(dd, 0, mkexpr(res));
9414 putQRegLane(dd, 1, mkU32(0));
9416 putQRegLane(dd, 1, mkU64(0));
9419 ch, dd, ch, nn, fbits);
9451 putQRegLane(dd, 0, mkexpr(res));
9453 putQRegLane(dd, 1, mkU32(0));
9455 putQRegLane(dd, 1, mkU64(0));
9458 ch, dd, ch, nn, fbits);
9487 UInt dd = INSN(4,0);
9512 assign(vecD, getQReg128(dd));
9517 putQReg128(dd, unop(opZHI, mkexpr(res)));
9528 nm, arrWide, dd, arrNarrow, nn, arrNarrow, mm);
9556 UInt dd = INSN(4,0);
9585 putQReg128(dd, mkexpr(qres));
9590 DIP("%s %c%u, %c%u, %c%u\n", nm, arr, dd, arr, nn, arr, mm);
9604 putQReg128(dd, unop(Iop_ZeroHI64ofV128, mkexpr(res)));
9606 nameQRegLO(dd, Ity_I64),
9621 putQReg128(dd, unop(Iop_ZeroHI64ofV128, mkexpr(res)));
9623 nameQRegLO(dd, Ity_I64),
9640 putQReg128(dd, unop(Iop_ZeroHI64ofV128, mkexpr(res)));
9644 nameQRegLO(dd, Ity_I64),
9675 putQReg128(dd, mkexpr(resSH));
9680 DIP("%s %c%u, %c%u, %c%u\n", nm, arr, dd, arr, nn, arr, mm);
9692 putQRegLane(dd, 0, mkexpr(res));
9693 putQRegLane(dd, 1, mkU64(0));
9695 nameQRegLO(dd, Ity_I64),
9712 putQReg128(dd, unop(Iop_ZeroHI64ofV128, mkexpr(res)));
9714 nameQRegLO(dd, Ity_I64),
9730 putQReg128(dd,
9737 DIP("%s %c%u, %c%u, %c%u\n", nm, arr, dd, arr, nn, arr, mm);
9749 putQReg128(dd, mkV128(0x0000));
9750 putQRegLO(dd, mkexpr(res));
9752 nameQRegLO(dd, ity), nameQRegLO(nn, ity), nameQRegLO(mm, ity));
9764 putQReg128(dd, mkV128(0x0000));
9765 putQRegLO(dd, mkexpr(res));
9767 nameQRegLO(dd, ity), nameQRegLO(nn, ity), nameQRegLO(mm, ity));
9782 putQReg128(dd, mkexpr(math_ZERO_ALL_EXCEPT_LOWEST_LANE(isD ? X11 : X10,
9785 nameQRegLO(dd, ity), nameQRegLO(nn, ity), nameQRegLO(mm, ity));
9796 putQReg128(dd, mkexpr(math_ZERO_ALL_EXCEPT_LOWEST_LANE(isD ? X11 : X10,
9799 nameQRegLO(dd, ity), nameQRegLO(nn, ity), nameQRegLO(mm, ity));
9815 putQReg128(dd, mkexpr(math_ZERO_ALL_EXCEPT_LOWEST_LANE(isD ? X11 : X10,
9818 nameQRegLO(dd, ity), nameQRegLO(nn, ity), nameQRegLO(mm, ity));
9831 putQReg128(dd, mkexpr(math_ZERO_ALL_EXCEPT_LOWEST_LANE(isD ? X11 : X10,
9835 c, dd, c, nn, c, mm);
9862 UInt dd = INSN(4,0);
9878 assign(argR, getQReg128(dd));
9883 putQReg128(dd, mkexpr(qres));
9886 DIP("%s %c%u, %c%u\n", isUSQADD ? "usqadd" : "suqadd", arr, dd, arr, nn);
9899 putQReg128(dd, mkexpr(qres));
9902 DIP("%s %c%u, %c%u\n", isNEG ? "sqneg" : "sqabs", arr, dd, arr, nn);
9915 putQReg128(dd, unop(Iop_ZeroHI64ofV128, mkexpr(res)));
9916 DIP("cm%s d%u, d%u, #0\n", isGT ? "gt" : "ge", dd, nn);
9930 putQReg128(dd, unop(Iop_ZeroHI64ofV128, mkexpr(res)));
9931 DIP("cm%s d%u, d%u, #0\n", isEQ ? "eq" : "le", dd, nn);
9937 putQReg128(dd, unop(Iop_ZeroHI64ofV128,
9940 DIP("cm%s d%u, d%u, #0\n", "lt", dd, nn);
9946 putQReg128(dd, unop(Iop_ZeroHI64ofV128,
9948 DIP("abs d%u, d%u\n", dd, nn);
9954 putQReg128(dd, unop(Iop_ZeroHI64ofV128,
9956 DIP("neg d%u, d%u\n", dd, nn);
9995 putQReg128(dd, mkexpr(math_ZERO_ALL_EXCEPT_LOWEST_LANE(isD ? X11 : X10,
9998 DIP("%s %s, %s, #0.0\n", nm, nameQRegLO(dd, ity), nameQRegLO(nn, ity));
10026 putQReg128(dd, mkexpr(resN));
10035 DIP("%s %c%u, %c%u\n", nm, arrNarrow, dd, arrWide, nn);
10043 putQRegLO(dd,
10046 putQRegLane(dd, 1, mkU32(0));
10047 putQRegLane(dd, 1, mkU64(0));
10048 DIP("fcvtxn s%u, d%u\n", dd, nn);
10093 putQRegLane(dd, 0, mkexpr(res)); /* bits 31-0 or 63-0 */
10095 putQRegLane(dd, 1, mkU32(0)); /* bits 63-32 */
10097 putQRegLane(dd, 1, mkU64(0)); /* bits 127-64 */
10100 sOrD, dd, sOrD, nn);
10113 putQRegLO(dd, binop(iop, mkexpr(rm), getQRegLO(nn, tyI)));
10115 putQRegLane(dd, 1, mkU32(0)); /* bits 63-32 */
10117 putQRegLane(dd, 1, mkU64(0)); /* bits 127-64 */
10119 DIP("%ccvtf %c%u, %c%u\n", isU ? 'u' : 's', c, dd, c, nn);
10132 putQReg128(dd, mkexpr(math_ZERO_ALL_EXCEPT_LOWEST_LANE(isD ? X11 : X10,
10135 DIP("%s %c%u, %c%u\n", isSQRT ? "frsqrte" : "frecpe", c, dd, c, nn);
10147 putQReg128(dd, mkV128(0x0000));
10148 putQRegLane(dd, 0, mkexpr(res));
10150 DIP("%s %c%u, %c%u\n", "frecpx", c, dd, c, nn);
10181 UInt dd = INSN(4,0);
10210 mkexpr(rm), getQReg128(dd), mkexpr(t1)));
10211 putQReg128(dd,
10216 c, dd, c, nn, nameQReg128(mm), c, index);
10240 putQReg128(dd,
10245 c, dd, c, nn, nameQReg128(mm), c, index);
10284 assign(vecD, getQReg128(dd));
10289 putQReg128(dd, unop(opZHI, mkexpr(res)));
10300 nm, arrWide, dd, arrNarrow, nn, dd, arrNarrow, ix);
10330 putQReg128(dd, unop(opZHI, mkexpr(res)));
10334 DIP("%s %c%u, %c%u, v%d.%c[%u]\n", nm, ch, dd, ch, nn, ch, (Int)dd, ix);
10361 UInt dd = INSN(4,0);
10399 assign(res, isAcc ? binop(mkVecADD(size), getQReg128(dd), mkexpr(shf))
10401 putQReg128(dd, math_MAYBE_ZERO_HI64(bitQ, res));
10407 nameQReg128(dd), nLanes, laneCh,
10442 assign(res, isAcc ? binop(mkVecADD(size), getQReg128(dd), mkexpr(shf))
10444 putQReg128(dd, math_MAYBE_ZERO_HI64(bitQ, res));
10450 nameQReg128(dd), nLanes, laneCh,
10475 assign(res, getQReg128(dd));
10483 binop(Iop_AndV128, getQReg128(dd), nmask)));
10486 putQReg128(dd, math_MAYBE_ZERO_HI64(bitQ, res));
10490 nameQReg128(dd), nLanes, laneCh,
10530 binop(Iop_AndV128, getQReg128(dd), nmask)));
10534 putQReg128(dd, math_MAYBE_ZERO_HI64(bitQ, res));
10539 nameQReg128(dd), nLanes, laneCh,
10571 putQReg128(dd, math_MAYBE_ZERO_HI64(bitQ, res));
10576 nameQReg128(dd), arr, nameQReg128(nn), arr, shift);
10602 putLO64andZUorPutHI64(is2, dd, t4);
10606 nameQReg128(dd), arrNarrow, nameQReg128(nn), arrWide, shift);
10655 putLO64andZUorPutHI64(is2, dd, res64in128);
10666 nameQReg128(dd), arrNarrow, nameQReg128(nn), arrWide, shift);
10729 putQReg128(dd, res);
10732 nameQReg128(dd), ta, nameQReg128(nn), tb, sh);
10773 putQRegLane(dd, i, mkexpr(res));
10776 putQRegLane(dd, 1, mkU64(0));
10780 nameQReg128(dd), arr, nameQReg128(nn), arr, fbits);
10820 putQRegLane(dd, i, mkexpr(res));
10823 putQRegLane(dd, 1, mkU64(0));
10827 nameQReg128(dd), arr, nameQReg128(nn), arr, fbits);
10857 UInt dd = INSN(4,0);
10876 putQReg128(dd, mkexpr(res));
10882 nameQReg128(dd), arrWide,
10901 putQReg128(dd, mkexpr(res));
10907 nameQReg128(dd), arrWide,
10940 putLO64andZUorPutHI64(is2, dd, new64);
10946 nameQReg128(dd), arrNarrow,
10965 assign(res, isACC ? binop(mkVecADD(size+1), mkexpr(abd), getQReg128(dd))
10967 putQReg128(dd, mkexpr(res));
10973 nameQReg128(dd), arrWide,
11003 assign(vecD, getQReg128(dd));
11007 putQReg128(dd, mkexpr(res));
11012 nameQReg128(dd), arrWide,
11039 assign(vecD, getQReg128(dd));
11043 putQReg128(dd, mkexpr(res));
11054 nameQReg128(dd), arrWide,
11066 putQReg128(dd, mkexpr(res));
11070 nameQReg128(dd), arrNarrow,
11100 UInt dd = INSN(4,0);
11136 putQReg128(dd, math_MAYBE_ZERO_HI64(bitQ, res));
11141 nameQReg128(dd), arr, nameQReg128(nn), arr, nameQReg128(mm), arr);
11155 putQReg128(dd, math_MAYBE_ZERO_HI64(bitQ, res));
11158 nameQReg128(dd), arr, nameQReg128(nn), arr, nameQReg128(mm), arr);
11189 putQReg128(dd, mkexpr(qres));
11195 nameQReg128(dd), arr, nameQReg128(nn), arr, nameQReg128(mm), arr);
11211 putQReg128(dd, math_MAYBE_ZERO_HI64(bitQ, res));
11215 nameQReg128(dd), ar, nameQReg128(nn), ar, nameQReg128(mm), ar);
11227 assign(argD, getQReg128(dd));
11259 putQReg128(dd, math_MAYBE_ZERO_HI64(bitQ, res));
11263 nameQReg128(dd), arr, nameQReg128(nn), arr, nameQReg128(mm), arr);
11278 putQReg128(dd, math_MAYBE_ZERO_HI64(bitQ, res));
11282 nameQReg128(dd), arr, nameQReg128(nn), arr, nameQReg128(mm), arr);
11297 putQReg128(dd, math_MAYBE_ZERO_HI64(bitQ, res));
11301 nameQReg128(dd), arr, nameQReg128(nn), arr, nameQReg128(mm), arr);
11317 putQReg128(dd, math_MAYBE_ZERO_HI64(bitQ, res));
11322 nameQReg128(dd), arr, nameQReg128(nn), arr, nameQReg128(mm), arr);
11353 putQReg128(dd, mkexpr(resSH));
11359 nameQReg128(dd), arr, nameQReg128(nn), arr, nameQReg128(mm), arr);
11375 putQReg128(dd, math_MAYBE_ZERO_HI64(bitQ, t));
11380 nameQReg128(dd), arr, nameQReg128(nn), arr, nameQReg128(mm), arr);
11395 assign(t2, isACC ? binop(mkVecADD(size), mkexpr(t1), getQReg128(dd))
11397 putQReg128(dd, math_MAYBE_ZERO_HI64(bitQ, t2));
11402 nameQReg128(dd), arr, nameQReg128(nn), arr, nameQReg128(mm), arr);
11414 putQReg128(dd, math_MAYBE_ZERO_HI64(bitQ, t));
11418 nameQReg128(dd), arr, nameQReg128(nn), arr, nameQReg128(mm), arr);
11435 putQReg128(dd, math_MAYBE_ZERO_HI64(bitQ, res));
11439 nameQReg128(dd), arr, nameQReg128(nn), arr, nameQReg128(mm), arr);
11453 getQReg128(dd),
11455 putQReg128(dd, math_MAYBE_ZERO_HI64(bitQ, res));
11458 nameQReg128(dd), arr, nameQReg128(nn), arr, nameQReg128(mm), arr);
11475 putQReg128(dd, math_MAYBE_ZERO_HI64(bitQ, res));
11478 nameQReg128(dd), arr, nameQReg128(nn), arr, nameQReg128(mm), arr);
11510 putQReg128(dd, res);
11515 nameQReg128(dd), arr, nameQReg128(nn), arr, nameQReg128(mm), arr);
11530 putQReg128(dd, math_MAYBE_ZERO_HI64(bitQ, res));
11536 nameQReg128(dd), arr, nameQReg128(nn), arr, nameQReg128(mm), arr);
11559 putQReg128(dd, res);
11562 nameQReg128(dd), arr, nameQReg128(nn), arr, nameQReg128(mm), arr);
11580 putQReg128(dd, math_MAYBE_ZERO_HI64(bitQ, res));
11584 nameQReg128(dd), arr, nameQReg128(nn), arr, nameQReg128(mm), arr);
11604 mkexpr(rm), getQReg128(dd), mkexpr(t1)));
11605 putQReg128(dd, math_MAYBE_ZERO_HI64(bitQ, t2));
11608 nameQReg128(dd), arr, nameQReg128(nn), arr, nameQReg128(mm), arr);
11626 putQReg128(dd, mkexpr(t2));
11629 nameQReg128(dd), arr, nameQReg128(nn), arr, nameQReg128(mm), arr);
11645 putQReg128(dd, math_MAYBE_ZERO_HI64(bitQ, t2));
11648 nameQReg128(dd), arr, nameQReg128(nn), arr, nameQReg128(mm), arr);
11663 putQReg128(dd, math_MAYBE_ZERO_HI64(bitQ, t1));
11666 nameQReg128(dd), arr, nameQReg128(nn), arr, nameQReg128(mm), arr);
11681 putQReg128(dd, math_MAYBE_ZERO_HI64(bitQ, t1));
11684 nameQReg128(dd), arr, nameQReg128(nn), arr, nameQReg128(mm), arr);
11695 putQReg128(dd, math_MAYBE_ZERO_HI64(bitQ, t1));
11698 nameQReg128(dd), arr, nameQReg128(nn), arr, nameQReg128(mm), arr);
11714 putQReg128(dd, math_MAYBE_ZERO_HI64(bitQ, t1));
11717 nameQReg128(dd), arr, nameQReg128(nn), arr, nameQReg128(mm), arr);
11742 dd, math_MAYBE_ZERO_HI64_fromE(
11748 nameQReg128(dd), arr, nameQReg128(nn), arr, nameQReg128(mm), arr);
11765 dd, math_MAYBE_ZERO_HI64_fromE(
11772 nameQReg128(dd), arr, nameQReg128(nn), arr, nameQReg128(mm), arr);
11788 putQReg128(dd, mkexpr(t2));
11791 nameQReg128(dd), arr, nameQReg128(nn), arr, nameQReg128(mm), arr);
11805 putQReg128(dd, math_MAYBE_ZERO_HI64(bitQ, res));
11808 nameQReg128(dd), arr, nameQReg128(nn), arr, nameQReg128(mm), arr);
11836 UInt dd = INSN(4,0);
11848 putQReg128(dd, math_MAYBE_ZERO_HI64(bitQ, res));
11851 nameQReg128(dd), arr, nameQReg128(nn), arr);
11862 putQReg128(dd, math_MAYBE_ZERO_HI64(bitQ, res));
11865 nameQReg128(dd), arr, nameQReg128(nn), arr);
11873 putQReg128(dd, math_MAYBE_ZERO_HI64(bitQ, res));
11876 nameQReg128(dd), arr, nameQReg128(nn), arr);
11899 assign(res, isACC ? binop(mkVecADD(size+1), mkexpr(sum), getQReg128(dd))
11901 putQReg128(dd, math_MAYBE_ZERO_HI64(bitQ, res));
11906 nameQReg128(dd), arrWide, nameQReg128(nn), arrNarrow);
11930 assign(argR, getQReg128(dd));
11935 putQReg128(dd, mkexpr(qres));
11939 nameQReg128(dd), arr, nameQReg128(nn), arr);
11953 putQReg128(dd, math_MAYBE_ZERO_HI64(bitQ, res));
11956 nameQReg128(dd), arr, nameQReg128(nn), arr);
11965 putQReg128(dd, math_MAYBE_ZERO_HI64(bitQ, res));
11968 nameQReg128(dd), arr, nameQReg128(nn), arr);
11976 putQReg128(dd, math_MAYBE_ZERO_HI64(bitQ, res));
11979 nameQReg128(dd), arr, nameQReg128(nn), arr);
11994 putQReg128(dd, mkexpr(qres));
11998 nameQReg128(dd), arr, nameQReg128(nn), arr);
12013 putQReg128(dd, math_MAYBE_ZERO_HI64(bitQ, res));
12016 nameQReg128(dd), arr, nameQReg128(nn), arr);
12031 putQReg128(dd, math_MAYBE_ZERO_HI64(bitQ, res));
12034 nameQReg128(dd), arr, nameQReg128(nn), arr);
12045 putQReg128(dd, math_MAYBE_ZERO_HI64(bitQ, res));
12048 nameQReg128(dd), arr, nameQReg128(nn), arr);
12057 putQReg128(dd, math_MAYBE_ZERO_HI64(bitQ, res));
12059 DIP("abs %s.%s, %s.%s\n", nameQReg128(dd), arr, nameQReg128(nn), arr);
12068 putQReg128(dd, math_MAYBE_ZERO_HI64(bitQ, res));
12070 DIP("neg %s.%s, %s.%s\n", nameQReg128(dd), arr, nameQReg128(nn), arr);
12109 putQReg128(dd, math_MAYBE_ZERO_HI64(bitQ, res));
12112 nameQReg128(dd), arr, nameQReg128(nn), arr);
12125 putQReg128(dd, math_MAYBE_ZERO_HI64(bitQ, res));
12128 nameQReg128(dd), arr, nameQReg128(nn), arr);
12140 putLO64andZUorPutHI64(is2, dd, resN);
12145 nameQReg128(dd), arrNarrow, nameQReg128(nn), arrWide);
12174 putLO64andZUorPutHI64(is2, dd, resN);
12181 nameQReg128(dd), arrNarrow, nameQReg128(nn), arrWide);
12197 putQReg128(dd, mkexpr(res));
12201 nameQReg128(dd), arrWide, nameQReg128(nn), arrNarrow, 8 << size);
12217 putQRegLane(dd, nLanes * bitQ + i,
12221 putQRegLane(dd, 1, mkU64(0));
12226 nameQReg128(dd), arrNarrow, nameQReg128(nn), arrWide);
12242 putQRegLane(dd, 2 * bitQ + i,
12246 putQRegLane(dd, 1, mkU64(0));
12251 nameQReg128(dd), arrNarrow, nameQReg128(nn), arrWide);
12266 putQRegLane(dd, i, unop(opCvt, mkexpr(src[i])));
12271 nameQReg128(dd), arrWide, nameQReg128(nn), arrNarrow);
12324 putQRegLane(dd, i, binop(opRND, mkexpr(irrm),
12330 putQRegLane(dd, i, binop(opRND, mkexpr(irrm),
12334 putQRegLane(dd, 1, mkU64(0)); // zero out lanes 2 and 3
12338 nameQReg128(dd), arr, nameQReg128(nn), arr);
12381 putQRegLane(dd, i, binop(cvt, mkU32(irrm),
12387 putQRegLane(dd, i, binop(cvt, mkU32(irrm),
12391 putQRegLane(dd, 1, mkU64(0)); // zero out lanes 2 and 3
12395 nameQReg128(dd), arr, nameQReg128(nn), arr);
12406 putQReg128(dd, math_MAYBE_ZERO_HI64(bitQ, res));
12410 nameQReg128(dd), arr, nameQReg128(nn), arr);
12439 putQRegLane(dd, i,
12443 putQRegLane(dd, 1, mkU64(0));
12446 nameQReg128(dd), arrSpec, nameQReg128(nn), arrSpec);
12462 putQReg128(dd, math_MAYBE_ZERO_HI64(bitQ, resV));
12465 nameQReg128(dd), arr, nameQReg128(nn), arr);
12477 putQReg128(dd, math_MAYBE_ZERO_HI64(bitQ, resV));
12480 nameQReg128(dd), arr, nameQReg128(nn), arr);
12512 UInt dd = INSN(4,0);
12542 mkexpr(rm), getQReg128(dd), mkexpr(t1)));
12543 putQReg128(dd, math_MAYBE_ZERO_HI64(bitQ, t2));
12546 nameQReg128(dd), arr, nameQReg128(nn), arr, nameQReg128(mm),
12572 putQReg128(dd, math_MAYBE_ZERO_HI64(bitQ, res));
12575 isMULX ? "fmulx" : "fmul", nameQReg128(dd), arr,
12610 assign(vecD, getQReg128(dd));
12618 putQReg128(dd, math_MAYBE_ZERO_HI64(bitQ, res));
12622 nameQReg128(dd), arr,
12623 nameQReg128(nn), arr, nameQReg128(dd), ch, ix);
12665 assign(vecD, getQReg128(dd));
12669 putQReg128(dd, mkexpr(res));
12676 nameQReg128(dd), arrWide,
12677 nameQReg128(nn), arrNarrow, nameQReg128(dd), ch, ix);
12717 assign(vecD, getQReg128(dd));
12721 putQReg128(dd, mkexpr(res));
12734 nameQReg128(dd), arrWide,
12735 nameQReg128(nn), arrNarrow, nameQReg128(dd), ch, ix);
12764 putQReg128(dd, math_MAYBE_ZERO_HI64(bitQ, res));
12771 nameQReg128(dd), arr, nameQReg128(nn), arr, nameQReg128(dd), ch, ix);
12964 UInt dd = INSN(4,0);
12977 putQReg128(dd, mkV128(0x0000));
12978 putQRegLO(dd, mkexpr(res));
12980 nameQRegLO(dd, ity), nameQRegLO(nn, ity), nameQRegLO(mm, ity),
13005 UInt dd = INSN(4,0);
13032 putQReg128(dd, mkV128(0x0000));
13033 putQRegLO(dd, mkexpr(res));
13034 DIP("%s %s, %s\n", nm, nameQRegLO(dd, ity), nameQRegLO(nn, ity));
13069 putQReg128(dd, mkV128(0x0000));
13070 putQRegLO(dd, mkexpr(res));
13072 nameQRegLO(dd, Ity_F64), nameQRegLO(nn, srcTy));
13083 putQReg128(dd, mkV128(0x0000));
13084 putQRegLO(dd, mkexpr(res));
13086 nameQRegLO(dd, dstTy), nameQRegLO(nn, Ity_F64));
13104 putQReg128(dd, mkV128(0x0000));
13105 putQRegLO(dd, mkexpr(res));
13107 nameQRegLO(dd, dstTy), nameQRegLO(nn, srcTy));
13169 putQReg128(dd, mkV128(0x0000));
13170 putQRegLO(dd, mkexpr(dst));
13172 ch, nameQRegLO(dd, ity), nameQRegLO(nn, ity));
13200 UInt dd = INSN(4,0);
13230 putQReg128(dd, mkV128(0));
13231 putQRegLO(dd, mkexpr(res));
13233 putQReg128(dd, unop(mkVecZEROHIxxOFV128(ty+2),
13237 nm, nameQRegLO(dd, ity), nameQRegLO(nn, ity), nameQRegLO(mm, ity));
13252 putQReg128(dd, mkV128(0));
13253 putQRegLO(dd, mkexpr(res));
13255 nm, nameQRegLO(dd, ity), nameQRegLO(nn, ity), nameQRegLO(mm, ity));
13282 UInt dd = INSN(4,0);
13324 putQReg128(dd, mkV128(0x0000));
13325 putQRegLO(dd, mkexpr(res));
13328 names[ix], nameQRegLO(dd, ity), nameQRegLO(nn, ity),
13353 UInt dd = INSN(4,0);
13363 putQReg128(dd, mkV128(0));
13364 putQRegLO(dd, isD ? mkU64(imm) : mkU32(imm & 0xFFFFFFFFULL));
13366 nameQRegLO(dd, isD ? Ity_F64 : Ity_F32), imm);
13396 UInt dd = INSN(4,0);
13432 putIRegOrZR(isI64, dd, res);
13435 isU ? 'u' : 's', nameIRegOrZR(isI64, dd),
13482 putQReg128(dd, mkV128(0));
13483 putQRegLO(dd, triop(opMUL, mkU32(Irrm_NEAREST), res, scaleE));
13486 isU ? 'u' : 's', nameQRegLO(dd, isF64 ? Ity_F64 : Ity_F32),
13516 UInt dd = INSN(4,0);
13629 putIRegOrZR(isI64, dd, mkexpr(dst));
13631 nameIRegOrZR(isI64, dd), nameQRegLO(nn, srcTy));
13664 putQReg128(dd, mkV128(0));
13665 putQRegLO(dd, res);
13667 isU ? 'u' : 's', nameQRegLO(dd, isF64 ? Ity_F64 : Ity_F32),
13708 putQReg128(dd, mkV128(0));
13709 putQRegLO(dd, getIReg32orZR(nn));
13710 DIP("fmov s%u, w%u\n", dd, nn);
13713 putQReg128(dd, mkV128(0));
13714 putQRegLO(dd, getIReg64orZR(nn));
13715 DIP("fmov d%u, x%u\n", dd, nn);
13718 putQRegHI64(dd, getIReg64orZR(nn));
13719 DIP("fmov v%u.d[1], x%u\n", dd, nn);
13722 putIReg32orZR(dd, getQRegLO(nn, Ity_I32));
13723 DIP("fmov w%u, s%u\n", dd, nn);
13726 putIReg64orZR(dd, getQRegLO(nn, Ity_I64));
13727 DIP("fmov x%u, d%u\n", dd, nn);
13730 putIReg64orZR(dd, getQRegHI64(nn));
13731 DIP("fmov x%u, v%u.d[1]\n", dd, nn);